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575 lines
17 KiB
ObjectPascal
575 lines
17 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
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Contains the base types for the i386 and x86-64 architecture
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* This code was inspired by the NASM sources
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The Netwide Assembler is Copyright (c) 1996 Simon Tatham and
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Julian Hall. All rights reserved.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{# Base unit for processor information. This unit contains
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enumerations of registers, opcodes, sizes, and other
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such things which are processor specific.
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}
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unit cpubase;
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{$i fpcdefs.inc}
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interface
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uses
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cutils,cclasses,
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globtype,globals,
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cpuinfo,
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aasmbase,
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cgbase
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;
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{*****************************************************************************
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Assembler Opcodes
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*****************************************************************************}
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type
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{$ifdef x86_64}
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TAsmOp={$i x8664op.inc}
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{$else x86_64}
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TAsmOp={$i i386op.inc}
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{$endif x86_64}
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{ This should define the array of instructions as string }
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op2strtable=array[tasmop] of string[11];
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const
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{ First value of opcode enumeration }
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firstop = low(tasmop);
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{ Last value of opcode enumeration }
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lastop = high(tasmop);
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{*****************************************************************************
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Registers
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*****************************************************************************}
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const
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{ Invalid register number }
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RS_INVALID = $ff;
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{ Integer Super registers }
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RS_RAX = $00; {EAX}
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RS_RCX = $01; {ECX}
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RS_RDX = $02; {EDX}
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RS_RBX = $03; {EBX}
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RS_RSI = $04; {ESI}
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RS_RDI = $05; {EDI}
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RS_RBP = $06; {EBP}
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RS_RSP = $07; {ESP}
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RS_R8 = $08; {R8}
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RS_R9 = $09; {R9}
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RS_R10 = $0a; {R10}
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RS_R11 = $0b; {R11}
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RS_R12 = $0c; {R12}
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RS_R13 = $0d; {R13}
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RS_R14 = $0e; {R14}
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RS_R15 = $0f; {R15}
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{ create aliases to allow code sharing between x86-64 and i386 }
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RS_EAX = RS_RAX;
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RS_EBX = RS_RBX;
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RS_ECX = RS_RCX;
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RS_EDX = RS_RDX;
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RS_ESI = RS_RSI;
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RS_EDI = RS_RDI;
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RS_EBP = RS_RBP;
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RS_ESP = RS_RSP;
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{ Number of first imaginary register }
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first_int_imreg = $10;
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{ Float Super registers }
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RS_ST0 = $00;
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RS_ST1 = $01;
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RS_ST2 = $02;
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RS_ST3 = $03;
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RS_ST4 = $04;
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RS_ST5 = $05;
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RS_ST6 = $06;
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RS_ST7 = $07;
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{ Number of first imaginary register }
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first_fpu_imreg = $08;
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{ MM Super registers }
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RS_XMM0 = $00;
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RS_XMM1 = $01;
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RS_XMM2 = $02;
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RS_XMM3 = $03;
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RS_XMM4 = $04;
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RS_XMM5 = $05;
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RS_XMM6 = $06;
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RS_XMM7 = $07;
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RS_XMM8 = $08;
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RS_XMM9 = $09;
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RS_XMM10 = $0a;
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RS_XMM11 = $0b;
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RS_XMM12 = $0c;
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RS_XMM13 = $0d;
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RS_XMM14 = $0e;
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RS_XMM15 = $0f;
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{ Number of first imaginary register }
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{$ifdef x86_64}
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first_mm_imreg = $10;
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{$else x86_64}
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first_mm_imreg = $08;
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{$endif x86_64}
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{ The subregister that specifies the entire register }
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{$ifdef x86_64}
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R_SUBWHOLE = R_SUBQ; {Hammer}
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{$else x86_64}
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R_SUBWHOLE = R_SUBD; {i386}
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{$endif x86_64}
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{ Available Registers }
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{$ifdef x86_64}
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{$i r8664con.inc}
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{$else x86_64}
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{$i r386con.inc}
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{$endif x86_64}
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type
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{ Number of registers used for indexing in tables }
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{$ifdef x86_64}
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tregisterindex=0..{$i r8664nor.inc}-1;
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{$else x86_64}
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tregisterindex=0..{$i r386nor.inc}-1;
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{$endif x86_64}
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const
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{$warning TODO Calculate bsstart}
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regnumber_count_bsstart = 64;
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regnumber_table : array[tregisterindex] of tregister = (
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{$ifdef x86_64}
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{$i r8664num.inc}
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{$else x86_64}
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{$i r386num.inc}
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{$endif x86_64}
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);
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regstabs_table : array[tregisterindex] of shortint = (
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{$ifdef x86_64}
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{$i r8664stab.inc}
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{$else x86_64}
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{$i r386stab.inc}
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{$endif x86_64}
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);
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regdwarf_table : array[tregisterindex] of shortint = (
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{$ifdef x86_64}
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{$i r8664dwrf.inc}
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{$else x86_64}
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{$i r386dwrf.inc}
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{$endif x86_64}
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);
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type
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totherregisterset = set of tregisterindex;
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{*****************************************************************************
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Conditions
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*****************************************************************************}
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type
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TAsmCond=(C_None,
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C_A,C_AE,C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_NA,C_NAE,
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C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_NO,C_NP,
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C_NS,C_NZ,C_O,C_P,C_PE,C_PO,C_S,C_Z
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);
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const
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cond2str:array[TAsmCond] of string[3]=('',
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'a','ae','b','be','c','e','g','ge','l','le','na','nae',
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'nb','nbe','nc','ne','ng','nge','nl','nle','no','np',
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'ns','nz','o','p','pe','po','s','z'
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);
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inverse_cond:array[TAsmCond] of TAsmCond=(C_None,
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C_NA,C_NAE,C_NB,C_NBE,C_NC,C_NE,C_NG,C_NGE,C_NL,C_NLE,C_A,C_AE,
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C_B,C_BE,C_C,C_E,C_G,C_GE,C_L,C_LE,C_O,C_P,
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C_S,C_Z,C_NO,C_NP,C_NP,C_P,C_NS,C_NZ
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);
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{*****************************************************************************
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Flags
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*****************************************************************************}
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type
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TResFlags = (F_E,F_NE,F_G,F_L,F_GE,F_LE,F_C,F_NC,
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F_A,F_AE,F_B,F_BE,
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F_S,F_NS,F_O,F_NO);
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{*****************************************************************************
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Reference
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*****************************************************************************}
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type
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{ reference record, reordered for best alignment }
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preference = ^treference;
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treference = record
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offset : aint;
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symbol,
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relsymbol : tasmsymbol;
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segment,
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base,
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index : tregister;
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refaddr : trefaddr;
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scalefactor : byte;
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end;
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{ reference record }
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pparareference = ^tparareference;
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tparareference = packed record
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index : tregister;
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offset : aint;
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end;
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{*****************************************************************************
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Generic Location
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*****************************************************************************}
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type
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{ tparamlocation describes where a parameter for a procedure is stored.
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References are given from the caller's point of view. The usual
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TLocation isn't used, because contains a lot of unnessary fields.
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}
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tparalocation = record
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size : TCGSize;
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loc : TCGLoc;
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{ Location type of registerhigh, for x86_64 this can
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be different from loc when pushing structures of 16 bytes }
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lochigh : TCGLoc;
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alignment : byte;
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case TCGLoc of
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LOC_REFERENCE : (reference : tparareference);
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{ segment in reference at the same place as in loc_register }
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LOC_REGISTER,LOC_CREGISTER : (
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case longint of
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1 : (register,registerhigh : tregister);
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{ overlay a registerlow }
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2 : (registerlow : tregister);
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{$ifndef cpu64bit}
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{ overlay a 64 Bit register type }
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3 : (register64 : tregister64);
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{$endif cpu64bit}
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);
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{ it's only for better handling }
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LOC_MMXREGISTER,LOC_CMMXREGISTER : (
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case longint of
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0: (mmxreg : tregister);
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1: (mmxregset : Tregistermmxset);
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);
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end;
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tlocation = packed record
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loc : TCGLoc;
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size : TCGSize;
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case TCGLoc of
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LOC_FLAGS : (resflags : tresflags);
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LOC_CONSTANT : (
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case longint of
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1 : (value : AInt);
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{ can't do this, this layout depends on the host cpu. Use }
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{ lo(valueqword)/hi(valueqword) instead (JM) }
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{ overlay a complete 64 Bit value }
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2 : (value64 : Int64);
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);
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LOC_CREFERENCE,
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LOC_REFERENCE : (reference : treference);
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{ segment in reference at the same place as in loc_register }
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LOC_REGISTER,LOC_CREGISTER : (
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case longint of
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1 : (register,registerhigh,segment : tregister);
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{ overlay a registerlow }
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2 : (registerlow : tregister);
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{ overlay a 64 Bit register type }
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3 : (register64 : tregister64);
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);
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{ it's only for better handling }
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LOC_MMXREGISTER,LOC_CMMXREGISTER : (mmxreg : tregister);
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end;
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{*****************************************************************************
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Constants
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*****************************************************************************}
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const
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{ declare aliases }
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LOC_SSEREGISTER = LOC_MMREGISTER;
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LOC_CSSEREGISTER = LOC_CMMREGISTER;
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max_operands = 3;
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maxfpuregs = 8;
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{*****************************************************************************
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CPU Dependent Constants
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*****************************************************************************}
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{$i cpubase.inc}
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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function cgsize2subreg(s:Tcgsize):Tsubregister;
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function reg2opsize(r:Tregister):topsize;
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function reg_cgsize(const reg: tregister): tcgsize;
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function is_calljmp(o:tasmop):boolean;
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procedure inverse_flags(var f: TResFlags);
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function flags_to_cond(const f: TResFlags) : TAsmCond;
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function is_segment_reg(r:tregister):boolean;
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function findreg_by_number(r:Tregister):tregisterindex;
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function std_regnum_search(const s:string):Tregister;
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function std_regname(r:Tregister):string;
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implementation
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uses
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rgbase,verbose;
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const
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{$ifdef x86_64}
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std_regname_table : array[tregisterindex] of string[7] = (
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{$i r8664std.inc}
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);
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i r8664rni.inc}
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);
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i r8664sri.inc}
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);
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{$else x86_64}
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std_regname_table : array[tregisterindex] of string[7] = (
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{$i r386std.inc}
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);
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i r386rni.inc}
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);
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i r386sri.inc}
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);
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{$endif x86_64}
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{*****************************************************************************
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Helpers
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*****************************************************************************}
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function cgsize2subreg(s:Tcgsize):Tsubregister;
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begin
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case s of
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OS_8,OS_S8:
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cgsize2subreg:=R_SUBL;
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OS_16,OS_S16:
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cgsize2subreg:=R_SUBW;
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OS_32,OS_S32:
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cgsize2subreg:=R_SUBD;
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OS_64,OS_S64:
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cgsize2subreg:=R_SUBQ;
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OS_M64:
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cgsize2subreg:=R_SUBNONE;
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OS_F32,OS_F64,OS_C64,
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OS_M128,OS_MS128:
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cgsize2subreg:=R_SUBWHOLE;
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else
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internalerror(200301231);
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end;
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end;
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function reg_cgsize(const reg: tregister): tcgsize;
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const subreg2cgsize:array[Tsubregister] of Tcgsize =
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(OS_NO,OS_8,OS_8,OS_16,OS_32,OS_64,OS_NO,OS_NO,OS_NO);
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begin
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case getregtype(reg) of
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R_INTREGISTER :
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reg_cgsize:=subreg2cgsize[getsubreg(reg)];
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R_FPUREGISTER :
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reg_cgsize:=OS_F80;
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R_MMXREGISTER:
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reg_cgsize:=OS_M64;
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R_MMREGISTER:
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reg_cgsize:=OS_M128;
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R_SPECIALREGISTER :
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case reg of
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NR_CS,NR_DS,NR_ES,NR_SS,NR_FS,NR_GS:
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reg_cgsize:=OS_16
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else
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reg_cgsize:=OS_32
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end
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else
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internalerror(200303181);
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end;
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end;
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function reg2opsize(r:Tregister):topsize;
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const
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subreg2opsize : array[tsubregister] of topsize =
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(S_NO,S_B,S_B,S_W,S_L,S_Q,S_NO,S_NO,S_NO);
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begin
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reg2opsize:=S_L;
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case getregtype(r) of
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R_INTREGISTER :
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reg2opsize:=subreg2opsize[getsubreg(r)];
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R_FPUREGISTER :
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reg2opsize:=S_FL;
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R_MMXREGISTER,
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R_MMREGISTER :
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reg2opsize:=S_MD;
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R_SPECIALREGISTER :
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begin
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case r of
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NR_CS,NR_DS,NR_ES,
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NR_SS,NR_FS,NR_GS :
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reg2opsize:=S_W;
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end;
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end;
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else
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internalerror(200303181);
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end;
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end;
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function is_calljmp(o:tasmop):boolean;
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begin
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case o of
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A_CALL,
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A_JCXZ,
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A_JECXZ,
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A_JMP,
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A_LOOP,
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A_LOOPE,
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A_LOOPNE,
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A_LOOPNZ,
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A_LOOPZ,
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A_Jcc :
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is_calljmp:=true;
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else
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is_calljmp:=false;
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end;
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end;
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procedure inverse_flags(var f: TResFlags);
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const
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inv_flags: array[TResFlags] of TResFlags =
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(F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
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F_BE,F_B,F_AE,F_A,
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F_NS,F_S,F_NO,F_O);
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begin
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f:=inv_flags[f];
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end;
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function flags_to_cond(const f: TResFlags) : TAsmCond;
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const
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flags_2_cond : array[TResFlags] of TAsmCond =
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(C_E,C_NE,C_G,C_L,C_GE,C_LE,C_C,C_NC,C_A,C_AE,C_B,C_BE,C_S,C_NS,C_O,C_NO);
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begin
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result := flags_2_cond[f];
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end;
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function is_segment_reg(r:tregister):boolean;
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begin
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result:=false;
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case r of
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NR_CS,NR_DS,NR_ES,
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NR_SS,NR_FS,NR_GS :
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result:=true;
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end;
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end;
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function findreg_by_number(r:Tregister):tregisterindex;
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begin
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result:=findreg_by_number_table(r,regnumber_index);
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end;
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function std_regnum_search(const s:string):Tregister;
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begin
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result:=regnumber_table[findreg_by_name_table(s,std_regname_table,std_regname_index)];
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end;
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function std_regname(r:Tregister):string;
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var
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p : tregisterindex;
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begin
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p:=findreg_by_number_table(r,regnumber_index);
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if p<>0 then
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result:=std_regname_table[p]
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else
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result:=generic_regname(r);
|
|
end;
|
|
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.48 2004-10-25 15:36:47 peter
|
|
* save standard registers moved to tcgobj
|
|
|
|
Revision 1.47 2004/10/15 09:22:23 mazen
|
|
- remove $IFDEF DELPHI and related code
|
|
- remove $IFDEF FPCPROCVAR and related code
|
|
|
|
Revision 1.46 2004/08/24 21:23:11 florian
|
|
* fixed i386 compilation
|
|
|
|
Revision 1.45 2004/07/09 23:30:13 jonas
|
|
* changed first_sse_imreg to first_mm_imreg
|
|
|
|
Revision 1.44 2004/06/20 08:55:32 florian
|
|
* logs truncated
|
|
|
|
Revision 1.43 2004/06/16 20:07:11 florian
|
|
* dwarf branch merged
|
|
|
|
Revision 1.42.2.5 2004/05/28 20:29:50 florian
|
|
* fixed currency trouble on x86-64
|
|
|
|
Revision 1.42.2.4 2004/05/01 16:02:10 peter
|
|
* POINTER_SIZE replaced with sizeof(aint)
|
|
* aint,aword,tconst*int moved to globtype
|
|
|
|
Revision 1.42.2.3 2004/05/01 11:12:24 florian
|
|
* spilling of registers with size<>4 fixed
|
|
|
|
Revision 1.42.2.2 2004/04/27 18:18:26 peter
|
|
* aword -> aint
|
|
|
|
}
|