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https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-10-31 06:11:29 +01:00
878 lines
27 KiB
ObjectPascal
878 lines
27 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by Florian Klaempfl
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Type checking and register allocation for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit nmat;
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{$i fpcdefs.inc}
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interface
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uses
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node;
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type
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tmoddivnode = class(tbinopnode)
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function pass_1 : tnode;override;
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function det_resulttype:tnode;override;
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protected
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{$ifndef cpu64bit}
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{ override the following if you want to implement }
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{ parts explicitely in the code generator (JM) }
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function first_moddiv64bitint: tnode; virtual;
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{$endif cpu64bit}
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function firstoptimize: tnode; virtual;
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function first_moddivint: tnode; virtual;
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end;
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tmoddivnodeclass = class of tmoddivnode;
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tshlshrnode = class(tbinopnode)
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function pass_1 : tnode;override;
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function det_resulttype:tnode;override;
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{$ifndef cpu64bit}
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{ override the following if you want to implement }
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{ parts explicitely in the code generator (CEC)
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Should return nil, if everything will be handled
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in the code generator
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}
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function first_shlshr64bitint: tnode; virtual;
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{$endif cpu64bit}
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end;
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tshlshrnodeclass = class of tshlshrnode;
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tunaryminusnode = class(tunarynode)
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constructor create(expr : tnode);virtual;
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function pass_1 : tnode;override;
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function det_resulttype:tnode;override;
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end;
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tunaryminusnodeclass = class of tunaryminusnode;
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tnotnode = class(tunarynode)
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constructor create(expr : tnode);virtual;
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function pass_1 : tnode;override;
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function det_resulttype:tnode;override;
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{$ifdef state_tracking}
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function track_state_pass(exec_known:boolean):boolean;override;
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{$endif}
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end;
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tnotnodeclass = class of tnotnode;
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var
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cmoddivnode : tmoddivnodeclass;
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cshlshrnode : tshlshrnodeclass;
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cunaryminusnode : tunaryminusnodeclass;
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cnotnode : tnotnodeclass;
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implementation
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uses
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systems,
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verbose,globals,cutils,
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globtype,
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symconst,symtype,symdef,defutil,
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htypechk,pass_1,
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cgbase,
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ncon,ncnv,ncal,nadd;
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{****************************************************************************
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TMODDIVNODE
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****************************************************************************}
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function tmoddivnode.det_resulttype:tnode;
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var
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hp,t : tnode;
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rd,ld : torddef;
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rv,lv : tconstexprint;
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begin
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result:=nil;
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resulttypepass(left);
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resulttypepass(right);
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set_varstate(left,vs_used,true);
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set_varstate(right,vs_used,true);
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if codegenerror then
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exit;
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{ we need 2 orddefs always }
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if (left.resulttype.def.deftype<>orddef) then
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inserttypeconv(right,sinttype);
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if (right.resulttype.def.deftype<>orddef) then
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inserttypeconv(right,sinttype);
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if codegenerror then
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exit;
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rd:=torddef(right.resulttype.def);
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ld:=torddef(left.resulttype.def);
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{ check for division by zero }
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if is_constintnode(right) then
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begin
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rv:=tordconstnode(right).value;
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if (rv=0) then
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begin
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Message(parser_e_division_by_zero);
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{ recover }
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rv:=1;
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end;
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if is_constintnode(left) then
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begin
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lv:=tordconstnode(left).value;
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case nodetype of
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modn:
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if (torddef(ld).typ <> u64bit) or
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(torddef(rd).typ <> u64bit) then
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t:=genintconstnode(lv mod rv)
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else
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t:=genintconstnode(int64(qword(lv) mod qword(rv)));
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divn:
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if (torddef(ld).typ <> u64bit) or
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(torddef(rd).typ <> u64bit) then
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t:=genintconstnode(lv div rv)
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else
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t:=genintconstnode(int64(qword(lv) div qword(rv)));
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end;
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result:=t;
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exit;
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end;
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end;
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{ allow operator overloading }
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t:=self;
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if isbinaryoverloaded(t) then
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begin
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result:=t;
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exit;
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end;
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{ if one operand is a cardinal and the other is a positive constant, convert the }
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{ constant to a cardinal as well so we don't have to do a 64bit division (JM) }
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{ Do the same for qwords and positive constants as well, otherwise things like }
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{ "qword mod 10" are evaluated with int64 as result, which is wrong if the }
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{ "qword" was > high(int64) (JM) }
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if (rd.typ in [u32bit,u64bit]) and
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is_constintnode(left) and
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(tordconstnode(left).value >= 0) then
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begin
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inserttypeconv(left,right.resulttype);
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ld:=torddef(left.resulttype.def);
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end;
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if (ld.typ in [u32bit,u64bit]) and
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is_constintnode(right) and
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(tordconstnode(right).value >= 0) then
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begin
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inserttypeconv(right,left.resulttype);
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rd:=torddef(right.resulttype.def);
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end;
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{ when there is one currency value, everything is done
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using currency }
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if (ld.typ=scurrency) or
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(rd.typ=scurrency) then
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begin
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if (ld.typ<>scurrency) then
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inserttypeconv(left,s64currencytype);
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if (rd.typ<>scurrency) then
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inserttypeconv(right,s64currencytype);
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resulttype:=left.resulttype;
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end
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else
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{$ifndef cpu64bit}
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{ when there is one 64bit value, everything is done
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in 64bit }
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if (is_64bitint(left.resulttype.def) or
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is_64bitint(right.resulttype.def)) then
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begin
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if is_signed(rd) or is_signed(ld) then
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begin
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if (ld.typ<>s64bit) then
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inserttypeconv(left,s64inttype);
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if (rd.typ<>s64bit) then
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inserttypeconv(right,s64inttype);
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end
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else
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begin
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if (ld.typ<>u64bit) then
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inserttypeconv(left,u64inttype);
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if (rd.typ<>u64bit) then
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inserttypeconv(right,u64inttype);
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end;
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resulttype:=left.resulttype;
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end
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else
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{ when mixing cardinals and signed numbers, convert everythign to 64bit (JM) }
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if ((rd.typ = u32bit) and
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is_signed(ld)) or
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((ld.typ = u32bit) and
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is_signed(rd)) then
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begin
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CGMessage(type_w_mixed_signed_unsigned);
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if (ld.typ<>s64bit) then
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inserttypeconv(left,s64inttype);
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if (rd.typ<>s64bit) then
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inserttypeconv(right,s64inttype);
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resulttype:=left.resulttype;
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end
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else
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{$endif cpu64bit}
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begin
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{ Make everything always default singed int }
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if not(rd.typ in [torddef(sinttype.def).typ,torddef(uinttype.def).typ]) then
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inserttypeconv(right,sinttype);
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if not(ld.typ in [torddef(sinttype.def).typ,torddef(uinttype.def).typ]) then
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inserttypeconv(left,sinttype);
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resulttype:=right.resulttype;
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end;
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{ when the result is currency we need some extra code for
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division. this should not be done when the divn node is
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created internally }
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if (nodetype=divn) and
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not(nf_is_currency in flags) and
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is_currency(resulttype.def) then
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begin
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hp:=caddnode.create(muln,getcopy,cordconstnode.create(10000,s64currencytype,false));
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include(hp.flags,nf_is_currency);
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result:=hp;
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end;
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end;
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function tmoddivnode.first_moddivint: tnode;
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{$ifdef cpuneedsdiv32helper}
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var
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procname: string[31];
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begin
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result := nil;
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{ otherwise create a call to a helper }
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if nodetype = divn then
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procname := 'fpc_div_'
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else
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procname := 'fpc_mod_';
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{ only qword needs the unsigned code, the
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signed code is also used for currency }
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if is_signed(resulttype.def) then
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procname := procname + 'longint'
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else
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procname := procname + 'dword';
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result := ccallnode.createintern(procname,ccallparanode.create(left,
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ccallparanode.create(right,nil)));
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left := nil;
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right := nil;
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firstpass(result);
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end;
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{$else cpuneedsdiv32helper}
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begin
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result:=nil;
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end;
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{$endif cpuneedsdiv32helper}
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{$ifndef cpu64bit}
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function tmoddivnode.first_moddiv64bitint: tnode;
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var
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procname: string[31];
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begin
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result := nil;
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{ when currency is used set the result of the
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parameters to s64bit, so they are not converted }
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if is_currency(resulttype.def) then
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begin
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left.resulttype:=s64inttype;
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right.resulttype:=s64inttype;
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end;
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{ otherwise create a call to a helper }
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if nodetype = divn then
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procname := 'fpc_div_'
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else
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procname := 'fpc_mod_';
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{ only qword needs the unsigned code, the
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signed code is also used for currency }
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if is_signed(resulttype.def) then
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procname := procname + 'int64'
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else
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procname := procname + 'qword';
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result := ccallnode.createintern(procname,ccallparanode.create(left,
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ccallparanode.create(right,nil)));
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left := nil;
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right := nil;
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firstpass(result);
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end;
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{$endif cpu64bit}
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function tmoddivnode.firstoptimize: tnode;
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var
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power{,shiftval} : longint;
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newtype: tnodetype;
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begin
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result := nil;
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{ divide/mod a number by a constant which is a power of 2? }
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if (cs_optimize in aktglobalswitches) and
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(right.nodetype = ordconstn) and
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{ ((nodetype = divn) or
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not is_signed(resulttype.def)) and}
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(not is_signed(resulttype.def)) and
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ispowerof2(tordconstnode(right).value,power) then
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begin
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if nodetype = divn then
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begin
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(*
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if is_signed(resulttype.def) then
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begin
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if is_64bitint(left.resulttype.def) then
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if not (cs_littlesize in aktglobalswitches) then
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shiftval := 63
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else
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{ the shift code is a lot bigger than the call to }
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{ the divide helper }
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exit
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else
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shiftval := 31;
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{ we reuse left twice, so create once a copy of it }
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{ !!! if left is a call is -> call gets executed twice }
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left := caddnode.create(addn,left,
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caddnode.create(andn,
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cshlshrnode.create(sarn,left.getcopy,
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cordconstnode.create(shiftval,sinttype,false)),
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cordconstnode.create(tordconstnode(right).value-1,
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right.resulttype,false)));
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newtype := sarn;
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end
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else
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*)
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newtype := shrn;
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tordconstnode(right).value := power;
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result := cshlshrnode.create(newtype,left,right)
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end
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else
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begin
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dec(tordconstnode(right).value);
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result := caddnode.create(andn,left,right);
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end;
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{ left and right are reused }
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left := nil;
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right := nil;
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firstpass(result);
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exit;
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end;
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end;
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function tmoddivnode.pass_1 : tnode;
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begin
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result:=nil;
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firstpass(left);
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firstpass(right);
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if codegenerror then
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exit;
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{ Try to optimize mod/div }
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result := firstoptimize;
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if assigned(result) then
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exit;
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{$ifndef cpu64bit}
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{ 64bit }
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if (left.resulttype.def.deftype=orddef) and
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(right.resulttype.def.deftype=orddef) and
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(is_64bitint(left.resulttype.def) or is_64bitint(right.resulttype.def)) then
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begin
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result := first_moddiv64bitint;
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if assigned(result) then
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exit;
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expectloc:=LOC_REGISTER;
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calcregisters(self,2,0,0);
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end
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else
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{$endif cpu64bit}
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begin
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result := first_moddivint;
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if assigned(result) then
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exit;
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left_right_max;
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if left.registersint<=right.registersint then
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inc(registersint);
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end;
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expectloc:=LOC_REGISTER;
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end;
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{****************************************************************************
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TSHLSHRNODE
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****************************************************************************}
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function tshlshrnode.det_resulttype:tnode;
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var
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t : tnode;
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begin
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result:=nil;
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resulttypepass(left);
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resulttypepass(right);
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set_varstate(right,vs_used,true);
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set_varstate(left,vs_used,true);
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if codegenerror then
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exit;
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{ constant folding }
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if is_constintnode(left) and is_constintnode(right) then
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begin
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case nodetype of
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shrn:
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t:=genintconstnode(tordconstnode(left).value shr tordconstnode(right).value);
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shln:
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t:=genintconstnode(tordconstnode(left).value shl tordconstnode(right).value);
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end;
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result:=t;
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exit;
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end;
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{ allow operator overloading }
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t:=self;
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if isbinaryoverloaded(t) then
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begin
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result:=t;
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exit;
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end;
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{ calculations for ordinals < 32 bit have to be done in
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32 bit for backwards compatibility. That way 'shl 33' is
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the same as 'shl 1'. It's ugly but compatible with delphi/tp/gcc }
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if (not is_64bit(left.resulttype.def)) and
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(torddef(left.resulttype.def).typ<>u32bit) then
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inserttypeconv(left,s32inttype);
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inserttypeconv(right,sinttype);
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resulttype:=left.resulttype;
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end;
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{$ifndef cpu64bit}
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function tshlshrnode.first_shlshr64bitint: tnode;
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var
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procname: string[31];
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begin
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result := nil;
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{ otherwise create a call to a helper }
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if nodetype = shln then
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procname := 'fpc_shl_int64'
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else
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procname := 'fpc_shr_int64';
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{ this order of parameters works at least for the arm,
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however it should work for any calling conventions (FK) }
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result := ccallnode.createintern(procname,ccallparanode.create(right,
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ccallparanode.create(left,nil)));
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left := nil;
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right := nil;
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firstpass(result);
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end;
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{$endif cpu64bit}
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function tshlshrnode.pass_1 : tnode;
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var
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regs : longint;
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begin
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result:=nil;
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firstpass(left);
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firstpass(right);
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if codegenerror then
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exit;
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{$ifndef cpu64bit}
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{ 64 bit ints have their own shift handling }
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if is_64bit(left.resulttype.def) then
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begin
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result := first_shlshr64bitint;
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if assigned(result) then
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exit;
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regs:=2;
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end
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else
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{$endif cpu64bit}
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begin
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regs:=1
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end;
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if (right.nodetype<>ordconstn) then
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inc(regs);
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expectloc:=LOC_REGISTER;
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calcregisters(self,regs,0,0);
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end;
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{****************************************************************************
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TUNARYMINUSNODE
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****************************************************************************}
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|
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constructor tunaryminusnode.create(expr : tnode);
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begin
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inherited create(unaryminusn,expr);
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end;
|
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|
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function tunaryminusnode.det_resulttype : tnode;
|
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var
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t : tnode;
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begin
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result:=nil;
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resulttypepass(left);
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set_varstate(left,vs_used,true);
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if codegenerror then
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exit;
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|
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{ constant folding }
|
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if is_constintnode(left) then
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begin
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result:=genintconstnode(-tordconstnode(left).value);
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exit;
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end;
|
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if is_constrealnode(left) then
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begin
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trealconstnode(left).value_real:=-trealconstnode(left).value_real;
|
|
result:=left;
|
|
left:=nil;
|
|
exit;
|
|
end;
|
|
|
|
resulttype:=left.resulttype;
|
|
if (left.resulttype.def.deftype=floatdef) then
|
|
begin
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and
|
|
is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
{ if saturation is on, left.resulttype.def isn't
|
|
"mmx able" (FK)
|
|
if (cs_mmx_saturation in aktlocalswitches^) and
|
|
(torddef(tarraydef(resulttype.def).definition).typ in
|
|
[s32bit,u32bit]) then
|
|
CGMessage(type_e_mismatch);
|
|
}
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
{$ifndef cpu64bit}
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
end
|
|
{$endif cpu64bit}
|
|
else if (left.resulttype.def.deftype=orddef) then
|
|
begin
|
|
inserttypeconv(left,sinttype);
|
|
resulttype:=left.resulttype;
|
|
end
|
|
else
|
|
begin
|
|
{ allow operator overloading }
|
|
t:=self;
|
|
if isunaryoverloaded(t) then
|
|
begin
|
|
result:=t;
|
|
exit;
|
|
end;
|
|
|
|
CGMessage(type_e_mismatch);
|
|
end;
|
|
end;
|
|
|
|
{ generic code }
|
|
{ overridden by: }
|
|
{ i386 }
|
|
function tunaryminusnode.pass_1 : tnode;
|
|
begin
|
|
result:=nil;
|
|
firstpass(left);
|
|
if codegenerror then
|
|
exit;
|
|
|
|
registersint:=left.registersint;
|
|
registersfpu:=left.registersfpu;
|
|
{$ifdef SUPPORT_MMX}
|
|
registersmmx:=left.registersmmx;
|
|
{$endif SUPPORT_MMX}
|
|
|
|
if (left.resulttype.def.deftype=floatdef) then
|
|
begin
|
|
if (left.expectloc<>LOC_REGISTER) and
|
|
(registersfpu<1) then
|
|
registersfpu:=1;
|
|
expectloc:=LOC_FPUREGISTER;
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and
|
|
is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
if (left.expectloc<>LOC_MMXREGISTER) and
|
|
(registersmmx<1) then
|
|
registersmmx:=1;
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
{$ifndef cpu64bit}
|
|
else if is_64bit(left.resulttype.def) then
|
|
begin
|
|
if (left.expectloc<>LOC_REGISTER) and
|
|
(registersint<2) then
|
|
registersint:=2;
|
|
expectloc:=LOC_REGISTER;
|
|
end
|
|
{$endif cpu64bit}
|
|
else if (left.resulttype.def.deftype=orddef) then
|
|
begin
|
|
if (left.expectloc<>LOC_REGISTER) and
|
|
(registersint<1) then
|
|
registersint:=1;
|
|
expectloc:=LOC_REGISTER;
|
|
end;
|
|
end;
|
|
|
|
|
|
{****************************************************************************
|
|
TNOTNODE
|
|
****************************************************************************}
|
|
|
|
const
|
|
boolean_reverse:array[ltn..unequaln] of Tnodetype=(
|
|
gten,gtn,lten,ltn,unequaln,equaln
|
|
);
|
|
|
|
constructor tnotnode.create(expr : tnode);
|
|
begin
|
|
inherited create(notn,expr);
|
|
end;
|
|
|
|
|
|
function tnotnode.det_resulttype : tnode;
|
|
var
|
|
t : tnode;
|
|
tt : ttype;
|
|
v : tconstexprint;
|
|
begin
|
|
result:=nil;
|
|
resulttypepass(left);
|
|
set_varstate(left,vs_used,true);
|
|
if codegenerror then
|
|
exit;
|
|
|
|
resulttype:=left.resulttype;
|
|
|
|
{ Try optmimizing ourself away }
|
|
if left.nodetype=notn then
|
|
begin
|
|
{ Double not. Remove both }
|
|
result:=Tnotnode(left).left;
|
|
Tnotnode(left).left:=nil;
|
|
exit;
|
|
end;
|
|
|
|
if (left.nodetype in [ltn,lten,equaln,unequaln,gtn,gten]) then
|
|
begin
|
|
{ Not of boolean expression. Turn around the operator and remove
|
|
the not. This is not allowed for sets with the gten/lten,
|
|
because there is no ltn/gtn support }
|
|
if (taddnode(left).left.resulttype.def.deftype<>setdef) or
|
|
(left.nodetype in [equaln,unequaln]) then
|
|
begin
|
|
result:=left;
|
|
left.nodetype:=boolean_reverse[left.nodetype];
|
|
left:=nil;
|
|
exit;
|
|
end;
|
|
end;
|
|
|
|
{ constant folding }
|
|
if (left.nodetype=ordconstn) then
|
|
begin
|
|
v:=tordconstnode(left).value;
|
|
tt:=left.resulttype;
|
|
case torddef(left.resulttype.def).typ of
|
|
bool8bit,
|
|
bool16bit,
|
|
bool32bit :
|
|
begin
|
|
{ here we do a boolean(byte(..)) type cast because }
|
|
{ boolean(<int64>) is buggy in 1.00 }
|
|
v:=byte(not(boolean(byte(v))));
|
|
end;
|
|
uchar,
|
|
uwidechar,
|
|
u8bit,
|
|
s8bit,
|
|
u16bit,
|
|
s16bit,
|
|
u32bit,
|
|
s32bit,
|
|
s64bit,
|
|
u64bit :
|
|
begin
|
|
v:=int64(not int64(v)); { maybe qword is required }
|
|
int_to_type(v,tt);
|
|
end;
|
|
else
|
|
CGMessage(type_e_mismatch);
|
|
end;
|
|
t:=cordconstnode.create(v,tt,true);
|
|
result:=t;
|
|
exit;
|
|
end;
|
|
|
|
if is_boolean(resulttype.def) then
|
|
begin
|
|
end
|
|
else
|
|
{$ifdef SUPPORT_MMX}
|
|
if (cs_mmx in aktlocalswitches) and
|
|
is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
end
|
|
else
|
|
{$endif SUPPORT_MMX}
|
|
{$ifndef cpu64bit}
|
|
if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
end
|
|
else
|
|
{$endif cpu64bit}
|
|
if is_integer(left.resulttype.def) then
|
|
begin
|
|
end
|
|
else
|
|
begin
|
|
{ allow operator overloading }
|
|
t:=self;
|
|
if isunaryoverloaded(t) then
|
|
begin
|
|
result:=t;
|
|
exit;
|
|
end;
|
|
|
|
CGMessage(type_e_mismatch);
|
|
end;
|
|
end;
|
|
|
|
|
|
function tnotnode.pass_1 : tnode;
|
|
begin
|
|
result:=nil;
|
|
firstpass(left);
|
|
if codegenerror then
|
|
exit;
|
|
|
|
expectloc:=left.expectloc;
|
|
registersint:=left.registersint;
|
|
{$ifdef SUPPORT_MMX}
|
|
registersmmx:=left.registersmmx;
|
|
{$endif SUPPORT_MMX}
|
|
if is_boolean(resulttype.def) then
|
|
begin
|
|
if (expectloc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then
|
|
begin
|
|
expectloc:=LOC_REGISTER;
|
|
if (registersint<1) then
|
|
registersint:=1;
|
|
end;
|
|
{ before loading it into flags we need to load it into
|
|
a register thus 1 register is need PM }
|
|
{$ifdef cpuflags}
|
|
if left.expectloc<>LOC_JUMP then
|
|
expectloc:=LOC_FLAGS;
|
|
{$endif def cpuflags}
|
|
end
|
|
else
|
|
{$ifdef SUPPORT_MMX}
|
|
if (cs_mmx in aktlocalswitches) and
|
|
is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
if (left.expectloc<>LOC_MMXREGISTER) and
|
|
(registersmmx<1) then
|
|
registersmmx:=1;
|
|
end
|
|
else
|
|
{$endif SUPPORT_MMX}
|
|
{$ifndef cpu64bit}
|
|
if is_64bit(left.resulttype.def) then
|
|
begin
|
|
if (expectloc in [LOC_REFERENCE,LOC_CREFERENCE,LOC_CREGISTER]) then
|
|
begin
|
|
expectloc:=LOC_REGISTER;
|
|
if (registersint<2) then
|
|
registersint:=2;
|
|
end;
|
|
end
|
|
else
|
|
{$endif cpu64bit}
|
|
if is_integer(left.resulttype.def) then
|
|
begin
|
|
if (left.expectloc<>LOC_REGISTER) and
|
|
(registersint<1) then
|
|
registersint:=1;
|
|
expectloc:=LOC_REGISTER;
|
|
end;
|
|
end;
|
|
|
|
{$ifdef state_tracking}
|
|
function Tnotnode.track_state_pass(exec_known:boolean):boolean;
|
|
begin
|
|
track_state_pass:=true;
|
|
if left.track_state_pass(exec_known) then
|
|
begin
|
|
left.resulttype.def:=nil;
|
|
do_resulttypepass(left);
|
|
end;
|
|
end;
|
|
{$endif}
|
|
|
|
begin
|
|
cmoddivnode:=tmoddivnode;
|
|
cshlshrnode:=tshlshrnode;
|
|
cunaryminusnode:=tunaryminusnode;
|
|
cnotnode:=tnotnode;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.65 2004-06-20 08:55:29 florian
|
|
* logs truncated
|
|
|
|
Revision 1.64 2004/06/16 20:07:09 florian
|
|
* dwarf branch merged
|
|
|
|
Revision 1.63 2004/05/28 21:14:34 peter
|
|
* fixed div qword
|
|
|
|
Revision 1.62 2004/05/19 23:29:25 peter
|
|
* don't change sign for unsigned shl/shr operations
|
|
* cleanup for u32bit
|
|
|
|
Revision 1.61.2.1 2004/05/03 16:27:38 peter
|
|
* fixed shl for x86-64
|
|
|
|
Revision 1.61 2004/03/29 14:44:10 peter
|
|
* fixes to previous constant integer commit
|
|
|
|
}
|