mirror of
https://gitlab.com/freepascal.org/fpc/source.git
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+ RTL support:
o VFP exceptions are disabled by default on Darwin,
because they cause kernel panics on iPhoneOS 2.2.1 at least
o all denormals are truncated to 0 on Darwin, because disabling
that also causes kernel panics on iPhoneOS 2.2.1 (probably
because otherwise denormals can also cause exceptions)
* set softfloat rounding mode correctly for non-wince/darwin/vfp
targets
+ compiler support: only half the number of single precision
registers is available due to limitations of the register
allocator
+ added a number of comments about why the stackframe on ARM is
set up the way it is by the compiler
+ added regtype and subregtype info to regsets, because they're
also used for VFP registers (+ support in assembler reader)
+ various generic support routines for dealing with floating point
values located in integer registers that have to be transferred to
mm registers (needed for VFP)
* renamed use_sse() to use_vectorfpu() and also use it for
ARM/vfp support
o only superficially tested for Linux (compiler compiled with -Cpvfpv6
-Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
the fpu exception handler still needs to be implemented), Darwin has
been tested more thoroughly
+ added ARMv6 cpu type and made it default for Darwin/ARM
+ ARMv6+ implementations of atomic operations using ldrex/strex
* don't use r9 on Darwin/ARM, as it's reserved under certain
circumstances (don't know yet which ones)
* changed C-test object files for ARM/Darwin to ARMv6 versions
* check in assembler reader that regsets are not empty, because
instructions with a regset operand have undefined behaviour in that
case
* fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
int64->single type conversion
* fixed constant pool locations in case 64 bit constants are generated,
and/or when vfp instructions with limited reach are present
WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
code with -Cparmv6 (or higher), or you will get crashes. The reason is
that storing/restoring multiple VFP registers must happen using
different instructions on pre/post-ARMv6.
git-svn-id: trunk@14317 -
162 lines
3.9 KiB
ObjectPascal
162 lines
3.9 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by the Free Pascal development team
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Basic Processor information for the ARM
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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**********************************************************************}
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Unit CPUInfo;
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Interface
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uses
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globtype;
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Type
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bestreal = double;
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ts32real = single;
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ts64real = double;
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ts80real = type extended;
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ts128real = type extended;
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ts64comp = comp;
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pbestreal=^bestreal;
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{ possible supported processors for this target }
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tcputype =
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(cpu_none,
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cpu_armv3,
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cpu_armv4,
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cpu_armv5,
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cpu_armv6,
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cpu_armv7m,
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cpu_cortexm3
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);
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Const
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cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv5];
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cpu_thumb = [];
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cpu_thumb2 = [cpu_armv7m,cpu_cortexm3];
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Type
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tfputype =
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(fpu_none,
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fpu_soft,
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fpu_libgcc,
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fpu_fpa,
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fpu_fpa10,
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fpu_fpa11,
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fpu_vfpv2,
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fpu_vfpv3
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);
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tcontrollertype =
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(ct_none,
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{ Phillips }
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ct_lpc2114,
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ct_lpc2124,
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ct_lpc2194,
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{ ATMEL }
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ct_at91sam7s256,
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ct_at91sam7se256,
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ct_at91sam7x256,
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ct_at91sam7xc256,
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{ STMicroelectronics }
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ct_stm32f103re
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);
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Const
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{# Size of native extended floating point type }
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extended_size = 12;
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{# Size of a multimedia register }
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mmreg_size = 16;
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{ target cpu string (used by compiler options) }
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target_cpu_string = 'arm';
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{ calling conventions supported by the code generator }
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supported_calling_conventions : tproccalloptions = [
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pocall_internproc,
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pocall_safecall,
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pocall_stdcall,
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{ same as stdcall only different name mangling }
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pocall_cdecl,
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{ same as stdcall only different name mangling }
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pocall_cppdecl,
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{ same as stdcall but floating point numbers are handled like equal sized integers }
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pocall_softfloat,
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{ same as stdcall (requires that all const records are passed by
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reference, but that's already done for stdcall) }
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pocall_mwpascal
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];
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cputypestr : array[tcputype] of string[8] = ('',
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'ARMV3',
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'ARMV4',
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'ARMV5',
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'ARMV6',
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'ARMV7M',
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'CORTEXM3'
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);
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fputypestr : array[tfputype] of string[6] = ('',
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'SOFT',
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'LIBGCC',
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'FPA',
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'FPA10',
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'FPA11',
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'VFPV2',
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'VFPV3'
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);
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controllertypestr : array[tcontrollertype] of string[20] =
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('',
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'LPC2114',
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'LPC2124',
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'LPC2194',
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'AT91SAM7S256',
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'AT91SAM7SE256',
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'AT91SAM7X256',
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'AT91SAM7XC256',
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'STM32F103RE'
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);
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controllerunitstr : array[tcontrollertype] of string[20] =
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('',
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'LPC21x4',
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'LPC21x4',
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'LPC21x4',
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'AT91SAM7x256',
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'AT91SAM7x256',
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'AT91SAM7x256',
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'AT91SAM7x256',
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'STM32F103'
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);
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vfp_scalar = [fpu_vfpv2,fpu_vfpv3];
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{ Supported optimizations, only used for information }
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supported_optimizerswitches = genericlevel1optimizerswitches+
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genericlevel2optimizerswitches+
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genericlevel3optimizerswitches-
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{ no need to write info about those }
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[cs_opt_level1,cs_opt_level2,cs_opt_level3]+
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[cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,cs_opt_stackframe];
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level1optimizerswitches = genericlevel1optimizerswitches;
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level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion];
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level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
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Implementation
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end.
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