fpc/compiler/arm/cpuinfo.pas
Jonas Maebe d1538ab023 o added ARM VPFv2/VFPv3 support:
+ RTL support:
      o VFP exceptions are disabled by default on Darwin,
        because they cause kernel panics on iPhoneOS 2.2.1 at least
      o all denormals are truncated to 0 on Darwin, because disabling
        that also causes kernel panics on iPhoneOS 2.2.1 (probably
        because otherwise denormals can also cause exceptions)
    * set softfloat rounding mode correctly for non-wince/darwin/vfp
      targets
    + compiler support: only half the number of single precision
      registers is available due to limitations of the register
      allocator
    + added a number of comments about why the stackframe on ARM is
      set up the way it is by the compiler
    + added regtype and subregtype info to regsets, because they're
      also used for VFP registers (+ support in assembler reader)
    + various generic support routines for dealing with floating point
      values located in integer registers that have to be transferred to
      mm registers (needed for VFP)
    * renamed use_sse() to use_vectorfpu() and also use it for
      ARM/vfp support
    o only superficially tested for Linux (compiler compiled with -Cpvfpv6
      -Cfvfpv2 works on a Cortex-A8, no testsuite run performed -- at least
      the fpu exception handler still needs to be implemented), Darwin has
      been tested more thoroughly
  + added ARMv6 cpu type and made it default for Darwin/ARM
  + ARMv6+ implementations of atomic operations using ldrex/strex
  * don't use r9 on Darwin/ARM, as it's reserved under certain
    circumstances (don't know yet which ones)
  * changed C-test object files for ARM/Darwin to ARMv6 versions
  * check in assembler reader that regsets are not empty, because
    instructions with a regset operand have undefined behaviour in that
    case
  * fixed resultdef of tarmtypeconvnode.first_int_to_real in case of
    int64->single type conversion
  * fixed constant pool locations in case 64 bit constants are generated,
    and/or when vfp instructions with limited reach are present

  WARNING: when using VFP on an ARMv6 or later cpu, you *must* compile all
    code with -Cparmv6 (or higher), or you will get crashes. The reason is
    that storing/restoring multiple VFP registers must happen using
    different instructions on pre/post-ARMv6.

git-svn-id: trunk@14317 -
2009-12-03 22:46:30 +00:00

162 lines
3.9 KiB
ObjectPascal

{
Copyright (c) 1998-2002 by the Free Pascal development team
Basic Processor information for the ARM
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}
Unit CPUInfo;
Interface
uses
globtype;
Type
bestreal = double;
ts32real = single;
ts64real = double;
ts80real = type extended;
ts128real = type extended;
ts64comp = comp;
pbestreal=^bestreal;
{ possible supported processors for this target }
tcputype =
(cpu_none,
cpu_armv3,
cpu_armv4,
cpu_armv5,
cpu_armv6,
cpu_armv7m,
cpu_cortexm3
);
Const
cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv5];
cpu_thumb = [];
cpu_thumb2 = [cpu_armv7m,cpu_cortexm3];
Type
tfputype =
(fpu_none,
fpu_soft,
fpu_libgcc,
fpu_fpa,
fpu_fpa10,
fpu_fpa11,
fpu_vfpv2,
fpu_vfpv3
);
tcontrollertype =
(ct_none,
{ Phillips }
ct_lpc2114,
ct_lpc2124,
ct_lpc2194,
{ ATMEL }
ct_at91sam7s256,
ct_at91sam7se256,
ct_at91sam7x256,
ct_at91sam7xc256,
{ STMicroelectronics }
ct_stm32f103re
);
Const
{# Size of native extended floating point type }
extended_size = 12;
{# Size of a multimedia register }
mmreg_size = 16;
{ target cpu string (used by compiler options) }
target_cpu_string = 'arm';
{ calling conventions supported by the code generator }
supported_calling_conventions : tproccalloptions = [
pocall_internproc,
pocall_safecall,
pocall_stdcall,
{ same as stdcall only different name mangling }
pocall_cdecl,
{ same as stdcall only different name mangling }
pocall_cppdecl,
{ same as stdcall but floating point numbers are handled like equal sized integers }
pocall_softfloat,
{ same as stdcall (requires that all const records are passed by
reference, but that's already done for stdcall) }
pocall_mwpascal
];
cputypestr : array[tcputype] of string[8] = ('',
'ARMV3',
'ARMV4',
'ARMV5',
'ARMV6',
'ARMV7M',
'CORTEXM3'
);
fputypestr : array[tfputype] of string[6] = ('',
'SOFT',
'LIBGCC',
'FPA',
'FPA10',
'FPA11',
'VFPV2',
'VFPV3'
);
controllertypestr : array[tcontrollertype] of string[20] =
('',
'LPC2114',
'LPC2124',
'LPC2194',
'AT91SAM7S256',
'AT91SAM7SE256',
'AT91SAM7X256',
'AT91SAM7XC256',
'STM32F103RE'
);
controllerunitstr : array[tcontrollertype] of string[20] =
('',
'LPC21x4',
'LPC21x4',
'LPC21x4',
'AT91SAM7x256',
'AT91SAM7x256',
'AT91SAM7x256',
'AT91SAM7x256',
'STM32F103'
);
vfp_scalar = [fpu_vfpv2,fpu_vfpv3];
{ Supported optimizations, only used for information }
supported_optimizerswitches = genericlevel1optimizerswitches+
genericlevel2optimizerswitches+
genericlevel3optimizerswitches-
{ no need to write info about those }
[cs_opt_level1,cs_opt_level2,cs_opt_level3]+
[cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,cs_opt_stackframe];
level1optimizerswitches = genericlevel1optimizerswitches;
level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion];
level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
Implementation
end.