mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-07-25 16:46:03 +02:00
56524f33df
+ dataflow analyzer finished
+ start of CSE units
+ aoptbase which contains a base object for all optimizer objects
* some constants and type definitions moved around to avoid circular
dependencies
* moved some methods from base objects to specialized objects because
they're not used anywhere else
377 lines
16 KiB
ObjectPascal
377 lines
16 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1999 by Jonas Maebe, member of the Free Pascal
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Development Team
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This unit contains the common subexpression elimination object of the
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assembler optimizer.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aoptcs;
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interface
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uses aasm, aoptcpu, aoptobj;
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{ ************************************************************************* }
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{ info about the equivalence of registers when comparing two code sequences }
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{ ************************************************************************* }
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TRegInfo = Object(TAoptBaseCpu)
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{ registers encountered in the new and old sequence }
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NewRegsEncountered, OldRegsEncountered,
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{ registers which only have been loaded for use as base or index in a }
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{ reference later on }
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RegsLoadedForRef: TRegSet;
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{ to which register in the old sequence corresponds every register in }
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{ the new sequence }
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New2OldReg: TRegArray;
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Constructor init;
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{ clear all information store in the object }
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Procedure Clear;
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{ the contents of OldReg in the old sequence are now being loaded into }
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{ NewReg in the new sequence }
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Procedure AddReg(OldReg, NewReg: TRegister); Virtual;
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{ the contents of OldOp in the old sequence are now being loaded into }
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{ NewOp in the new sequence. It is assumed that OldOp and NewOp are }
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{ equivalent }
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Procedure AddOp(const OldOp, NewOp:Toper);
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{ check if a register in the old sequence (OldReg) can be equivalent to }
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{ a register in the new sequence (NewReg) if the operation OpAct is }
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{ performed on it. The RegInfo is updated (not necessary to call AddReg }
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{ afterwards) }
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Function RegsEquivalent(OldReg, NewReg: TRegister; OpAct: TopAction):
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Boolean;
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{ check if a reference in the old sequence (OldRef) can be equivalent }
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{ to a reference in the new sequence (NewRef) if the operation OpAct is }
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{ performed on it. The RegInfo is updated (not necessary to call AddOp }
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{ afterwards) }
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Function RefsEquivalent(Const OldRef, NewRef: TReference; OpAct:
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TOpAction): Boolean;
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{ check if an operand in the old sequence (OldOp) can be equivalent to }
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{ an operand in the new sequence (NewOp) if the operation OpAct is }
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{ performed on it. The RegInfo is updated (not necessary to call AddOp }
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{ afterwards) }
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Function OpsEquivalent(const OldOp, NewOp: toper; OpAct: TopAction):
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Boolean;
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{ check if an instruction in the old sequence (OldP) can be equivalent }
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{ to an instruction in the new sequence (Newp). The RegInfo is updated }
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Function InstructionsEquivalent(OldP, NewP: Pai): Boolean;
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End;
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{ ************************************************************************* }
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{ *************** The common subexpression elimination object ************* }
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{ ************************************************************************* }
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Type TAoptCSE = Object(TAoptObj)
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{ returns true if the instruction p1 modifies the register Reg }
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Function RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
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End;
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Implementation
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{ ************************************************************************* }
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{ ******************************* TReginfo ******************************** }
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{ ************************************************************************* }
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Constructor TRegInfo.Init;
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Begin
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Clear;
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End;
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Procedure TRegInfo.Clear;
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Begin
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RegsLoadedForRef := [];
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NewRegsEncountered := [ProcInfo.FramePointer, stack_pointer];
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OldRegsEncountered := [ProcInfo.FramePointer, stack_pointer];
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New2OldReg[ProcInfo.FramePointer] := ProcInfo.FramePointer;
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New2OldReg[R_ESP] := R_ESP;
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End;
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Procedure TRegInfo.AddReg(OldReg, NewReg: TRegister);
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{ updates the ???RegsEncountered and ???2???Reg fields of RegInfo. Assumes }
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{ that OldReg and NewReg have the same size (has to be chcked in advance }
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{ with RegsSameSize) and that neither equals R_NO }
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{ has to be overridden for architectures like the 80x86 when not all GP }
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{ regs are of the same size }
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Begin
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NewRegsEncountered := NewRegsEncountered + [NewReg];
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OldRegsEncountered := OldRegsEncountered + [OldReg];
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New2OldReg[NewReg] := OldReg;
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End;
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Procedure TRegInfo.AddOp(const OldOp, NewOp:Toper);
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Begin
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Case OldOp.typ Of
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Top_Reg:
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If (OldOp.reg <> R_NO) Then
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AddReg(OldOp.reg, NewOp.reg);
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Top_Ref:
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Begin
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If OldOp.ref^.base <> R_NO Then
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AddReg(OldOp.ref^.base, NewOp.ref^.base);
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{$ifdef RefsHaveIndexReg}
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If OldOp.ref^.index <> R_NO Then
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AddReg(OldOp.ref^.index, NewOp.ref^.index);
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{$endif RefsHaveIndexReg}
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End;
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End;
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End;
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Function TRegInfo.RegsEquivalent(OldReg, NewReg: TRegister;
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OPAct: TOpAction): Boolean;
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Begin
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If Not((OldReg = R_NO) Or (NewReg = R_NO)) Then
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If RegsSameSize(OldReg, NewReg) Then
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{ here we always check for the 32 bit component, because it is possible }
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{ that the 8 bit component has not been set, event though NewReg already }
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{ has been processed. This happens if it has been compared with a register }
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{ that doesn't have an 8 bit component (such as EDI). In that case the 8 }
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{ bit component is still set to R_NO and the comparison in the Else-part }
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{ will fail }
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If (RegMaxSize(OldReg) in OldRegsEncountered) Then
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If (RegMaxSize(NewReg) in NewRegsEncountered) Then
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RegsEquivalent := (OldReg = New2OldReg[NewReg])
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{ If we haven't encountered the new register yet, but we have encountered }
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{ the old one already, the new one can only be correct if it's being }
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{ written to (and consequently the old one is also being written to), }
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{ otherwise }
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{ }
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{ movl -8(%ebp), %eax and movl -8(%ebp), %eax }
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{ movl (%eax), %eax movl (%edx), %edx }
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{ }
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{ are considered equivalent }
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Else
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If (OpAct = OpAct_Write) Then
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Begin
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AddReg(OldReg, NewReg);
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RegsEquivalent := True
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End
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Else Regsequivalent := False
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Else
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If Not(RegMaxSize(NewReg) in NewRegsEncountered) Then
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Begin
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AddReg(OldReg, NewReg);
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RegsEquivalent := True
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End
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Else RegsEquivalent := False
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Else RegsEquivalent := False
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Else RegsEquivalent := OldReg = NewReg
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End;
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Function TRegInfo.RefsEquivalent(Const OldRef, NewRef: TReference;
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OpAct: TOpAction): Boolean;
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Begin
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If OldRef.is_immediate Then
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RefsEquivalent := NewRef.is_immediate and (OldRef.Offset = NewRef.Offset)
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Else
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RefsEquivalent := (OldRef.Offset+OldRef.OffsetFixup =
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NewRef.Offset+NewRef.OffsetFixup) And
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RegsEquivalent(OldRef.Base, NewRef.Base, OpAct)
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{$ifdef RefsHaveindexReg}
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And RegsEquivalent(OldRef.Index, NewRef.Index, OpAct)
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{$endif RefsHaveIndexReg}
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{$ifdef RefsHaveScale}
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And (OldRef.ScaleFactor = NewRef.ScaleFactor)
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{$endif RefsHaveScale}
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And (OldRef.Symbol = NewRef.Symbol)
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{$ifdef RefsHaveSegment}
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And (OldRef.Segment = NewRef.Segment)
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{$endif RefsHaveSegment}
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;
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End;
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Function TRegInfo.OpsEquivalent(const OldOp, NewOp: toper; OpAct: TopAction):
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Boolean;
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Begin
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OpsEquivalent := False;
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if OldOp.typ=NewOp.typ then
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Case OldOp.typ Of
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Top_Const: OpsEquivalent := OldOp.val = NewOp.val;
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Top_Reg: OpsEquivalent := RegsEquivalent(OldOp.reg,NewOp.reg, OpAct);
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Top_Ref: OpsEquivalent := RefsEquivalent(OldOp.ref^, NewOp.ref^, OpAct);
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Top_None: OpsEquivalent := True
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End;
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End;
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Function TRegInfo.InstructionsEquivalent(OldP, NewP: Pai): Boolean;
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Function OperandTypesEqual: Boolean;
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Var Count: AWord;
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Begin
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OperandTypesEqual := False;
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For Count := 0 to max_operands-1 Do
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If (PInstr(OldP)^.oper[Count].typ <> PInstr(NewP)^.oper[Count].typ) Then
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Exit;
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OperandTypesEqual := True
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End;
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Var Count: AWord;
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TmpResult: Boolean;
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Begin
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If Assigned(OldP) And Assigned(NewP) And
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(Pai(OldP)^.typ = ait_instruction) And
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(Pai(NewP)^.typ = ait_instruction) And
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(PInstr(OldP)^.opcode = PInstr(NewP)^.opcode) And
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OperandTypesEqual
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Then
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{ both instructions have the same structure: }
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{ "<operator> <operand of type1>, <operand of type 2>, ..." }
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If IsLoadMemReg(OldP) Then
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{ then also NewP = loadmemreg because of the previous check }
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If Not(RegInRef(PInstr(OldP)^.oper[LoadDst].reg,
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PInstr(OldP)^.oper[LoadSrc].ref^)) Then
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{ the "old" instruction is a load of a register with a new value, not with }
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{ a value based on the contents of this register (so no "mov (reg), reg") }
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If Not(RegInRef(PInstr(NewP)^.oper[LoadDst].reg,
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PInstr(NewP)^.oper[LoadSrc].ref^)) And
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RefsEqual(PInstr(OldP)^.oper[LoadSrc].ref^,
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PInstr(NewP)^.oper[LoadSrc].ref^)
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Then
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{ the "new" instruction is also a load of a register with a new value, and }
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{ this value is fetched from the same memory location }
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Begin
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With PInstr(NewP)^.oper[LoadSrc].ref^ Do
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Begin
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If Not(Base in [ProcInfo.FramePointer, R_NO, stack_pointer])
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{ it won't do any harm if the register is already in RegsLoadedForRef }
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Then RegsLoadedForRef := RegsLoadedForRef + [Base];
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{$ifdef RefsHaveIndexReg}
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If Not(Index in [ProcInfo.FramePointer, R_NO, stack_pointer])
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Then RegsLoadedForRef := RegsLoadedForRef + [Index];
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{$endif RefsHaveIndexReg}
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End;
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{ add the registers from the reference (.oper[Src]) to the RegInfo, all }
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{ registers from the reference are the same in the old and in the new }
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{ instruction sequence (refsequal returned true) }
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AddOp(PInstr(OldP)^.oper[LoadSrc], PInstr(OldP)^.oper[LoadSrc]);
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{ the registers from .oper[Dest] have to be equivalent, but not necessarily }
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{ equal }
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InstructionsEquivalent :=
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RegsEquivalent(PInstr(OldP)^.oper[LoadDst].reg,
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PInstr(NewP)^.oper[LoadDst].reg, OpAct_Write);
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End
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{ the registers are loaded with values from different memory locations. If }
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{ this were allowed, the instructions "mov -4(%esi),%eax" and }
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{ "mov -4(%ebp),%eax" would be considered equivalent }
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Else InstructionsEquivalent := False
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Else
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{ load register with a value based on the current value of this register }
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Begin
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With PInstr(NewP)^.oper[0].ref^ Do
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{ Assume the registers occurring in the reference have only been loaded with }
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{ the value they contain now to calculate an address (so the value they have }
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{ now, won't be stored to memory later on) }
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Begin
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If Not(Base in [ProcInfo.FramePointer,
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RegMaxSize(PInstr(NewP)^.oper[LoadDst].reg),
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R_NO,stack_pointer])
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{ It won't do any harm if the register is already in RegsLoadedForRef }
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Then
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Begin
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RegsLoadedForRef := RegsLoadedForRef + [Base];
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{$ifdef csdebug}
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Writeln(att_reg2str[base], ' added');
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{$endif csdebug}
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end;
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{$Ifdef RefsHaveIndexReg}
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If Not(Index in [ProcInfo.FramePointer,
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RegMaxSize(PInstr(NewP)^.oper[LoadDst].reg),
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R_NO,StackPtr])
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Then
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Begin
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RegsLoadedForRef := RegsLoadedForRef + [Index];
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{$ifdef csdebug}
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Writeln(att_reg2str[index], ' added');
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{$endif csdebug}
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end;
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{$endif RefsHaveIndexReg}
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End;
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{ now, remove the destination register of the load from the }
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{ RegsLoadedForReg, since if it's loaded with a new value, it certainly }
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{ will still be used later on }
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If Not(RegMaxSize(PInstr(NewP)^.oper[LoadDst].reg) In
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[ProcInfo.FramePointer,R_NO,stack_pointer])
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Then
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Begin
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RegsLoadedForRef := RegsLoadedForRef -
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[RegMaxSize(PInstr(NewP)^.oper[LoadDst].reg)];
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{$ifdef csdebug}
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Writeln(att_reg2str[RegMaxSize(PInstr(NewP)^.oper[1].reg)], ' removed');
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{$endif csdebug}
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end;
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InstructionsEquivalent :=
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OpsEquivalent(PInstr(OldP)^.oper[LoadSrc],
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PInstr(NewP)^.oper[LoadSrc], OpAct_Read) And
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OpsEquivalent(PInstr(OldP)^.oper[LoadDst],
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PInstr(NewP)^.oper[LoadDst], OpAct_Write)
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End
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Else
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{ OldP and NewP are not a load instruction, but have the same structure }
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{ (opcode, operand types), so they're equivalent if all operands are }
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{ equivalent }
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Begin
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Count := 0;
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TmpResult := true;
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Repeat
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TmpResult :=
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OpsEquivalent(PInstr(OldP)^.oper[Count], PInstr(NewP)^.oper[Count],
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OpAct_Unknown);
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Inc(Count)
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Until (Count = MaxOps) or not(TmpResult);
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InstructionsEquivalent := TmpResult
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End
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{ the instructions haven't even got the same structure, so they're certainly }
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{ not equivalent }
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Else InstructionsEquivalent := False;
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End;
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{ ************************************************************************* }
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{ ******************************* TAOptCSE ******************************** }
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{ ************************************************************************* }
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Function TAOptCSE.RegModifiedByInstruction(Reg: TRegister; p1: Pai): Boolean;
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Var hp: Pai;
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Begin
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If GetLastInstruction(p1, hp)
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Then
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RegModifiedByInstruction :=
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PPAiProp(p1^.OptInfo)^.GetWState <>
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PPAiProp(hp^.OptInfo)^.GetWState
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Else RegModifiedByInstruction := True;
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End;
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End.
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{
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$Log$
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Revision 1.1 1999-08-18 14:32:21 jonas
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+ compilable!
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+ dataflow analyzer finished
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|
+ start of CSE units
|
|
+ aoptbase which contains a base object for all optimizer objects
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* some constants and type definitions moved around to avoid circular
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dependencies
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* moved some methods from base objects to specialized objects because
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they're not used anywhere else
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} |