svenbarth c48d572996 Implement support for saving and restoring address registers. ... cgobj.pas, tcg: * g_save_registers: add the amount of used address registers to size as well * g_save_registers: save all used address registers * g_restore_registers: restore all stored address registers m68k/cpubase.pas: * rename saved_standard_address_registers to saved_address_registers all other platform's cpubase.{inc,pas} (except alpha, ia64 and vis which are not up to date): * add a saved_address_registers variable with one entry of RS_INVALID At least a "make fullcycle" did complete. git-svn-id: trunk@25664 -		2013-10-05 21:43:42 +00:00
..
aopt386.pas
cgcpu.pas	* tsettings.enablecld converted to a targetswitch ts_cld	2013-09-28 13:41:58 +00:00
cpubase.inc	Implement support for saving and restoring address registers.	2013-10-05 21:43:42 +00:00
cpuelf.pas	* Add android to supported targets for assemblers. It fixes assembling for i386-android.	2013-01-18 14:51:09 +00:00
cpuinfo.pas	* basic avx support for floating point operations (use -Cfavx to activate)	2013-06-14 20:03:01 +00:00
cpunode.pas
cpupara.pas	* missing part of r24776, using a build server also has pitfalls :/	2013-06-02 14:35:29 +00:00
cpupi.pas
cputarg.pas	* Sync with trunk r23404.	2013-01-16 13:21:51 +00:00
csopt386.pas
daopt386.pas
hlcgcpu.pas
i386att.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
i386atts.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
i386int.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
i386nop.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
i386op.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
i386prop.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
i386tab.inc	+ added a few BMI instructions to see if they can be encoded	2013-06-16 09:35:21 +00:00
n386add.pas
n386cal.pas	* Turn off special handling of interrupt calling convention for i386-android.	2013-01-22 14:43:42 +00:00
n386inl.pas
n386mat.pas
n386mem.pas	+ added support for special versions of near data pointers associated with a x86 segment register. They are supported on all x86 platforms: i8086, i386 and x86_64	2013-05-05 17:22:37 +00:00
n386set.pas	* cleanup of unused units	2013-07-07 20:00:33 +00:00
popt386.pas	* use add/sub instead of inc/dec on modern CPUs when optimizing for speed	2013-07-07 19:50:13 +00:00
r386ari.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386att.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386con.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386dwrf.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386int.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386iri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386nasm.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386nor.inc
r386nri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386num.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386ot.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386rni.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386sri.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
r386stab.inc
r386std.inc	* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.	2013-10-03 08:08:04 +00:00
ra386att.pas
ra386int.pas
rgcpu.pas
rropt386.pas