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https://gitlab.com/freepascal.org/fpc/source.git
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1131 lines
45 KiB
ObjectPascal
1131 lines
45 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2000 by Florian Klaempfl
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Generate i386 assembler for math nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit n386mat;
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{$i defines.inc}
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interface
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uses
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node,nmat;
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type
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ti386moddivnode = class(tmoddivnode)
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procedure pass_2;override;
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end;
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ti386shlshrnode = class(tshlshrnode)
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procedure pass_2;override;
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end;
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ti386unaryminusnode = class(tunaryminusnode)
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function pass_1 : tnode;override;
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procedure pass_2;override;
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end;
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ti386notnode = class(tnotnode)
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procedure pass_2;override;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,aasm,types,
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cgbase,temp_gen,pass_1,pass_2,
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ncon,
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cpubase,
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cga,tgcpu,n386util;
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{*****************************************************************************
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TI386MODDIVNODE
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*****************************************************************************}
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procedure ti386moddivnode.pass_2;
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var
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unusedregisters : tregisterset;
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usablecount, regstopush : byte;
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hreg1 : tregister;
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hreg2 : tregister;
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shrdiv, andmod, pushed,popeax,popedx : boolean;
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power : longint;
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hl : tasmlabel;
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hloc : tlocation;
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pushedreg : tpushed;
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typename,opname : string[6];
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begin
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shrdiv := false;
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andmod := false;
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secondpass(left);
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pushed:=maybe_push(right.registers32,left,is_64bitint(left.resulttype.def));
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secondpass(right);
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if pushed then
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restore(left,is_64bitint(left.resulttype.def));
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set_location(location,left.location);
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if is_64bitint(resulttype.def) then
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begin
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regstopush := $ff;
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remove_non_regvars_from_loc(location,regstopush);
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remove_non_regvars_from_loc(right.location,regstopush);
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{ ugly hack because in *this* case, the pushed register }
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{ must not be allocated later on (JM) }
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unusedregisters:=unused;
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usablecount:=usablereg32;
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pushusedregisters(pushedreg,regstopush);
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unused:=unusedregisters;
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usablereg32:=usablecount;
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emit_pushq_loc(location);
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release_qword_loc(location);
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clear_location(location);
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emit_pushq_loc(right.location);
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release_qword_loc(right.location);
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if torddef(resulttype.def).typ=u64bit then
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typename:='QWORD'
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else
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typename:='INT64';
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if nodetype=divn then
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opname:='DIV_'
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else
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opname:='MOD_';
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saveregvars($ff);
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emitcall('FPC_'+opname+typename);
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{ make sure we don't overwrite any results (JM) }
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if R_EDX in unused then
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begin
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location.registerhigh:=getexplicitregister32(R_EDX);
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location.registerlow:=getexplicitregister32(R_EAX);
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end
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else
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begin
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location.registerlow:=getexplicitregister32(R_EAX);
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location.registerhigh:=getexplicitregister32(R_EDX);
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end;
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location.loc:=LOC_REGISTER;
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emit_reg_reg(A_MOV,S_L,R_EAX,location.registerlow);
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emit_reg_reg(A_MOV,S_L,R_EDX,location.registerhigh);
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popusedregisters(pushedreg);
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end
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else
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begin
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{ put numerator in register }
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if left.location.loc<>LOC_REGISTER then
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begin
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if left.location.loc=LOC_CREGISTER then
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begin
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hreg1:=getregister32;
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emit_reg_reg(A_MOV,S_L,left.location.register,hreg1);
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end
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else
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begin
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del_reference(left.location.reference);
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hreg1:=getregister32;
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emit_ref_reg(A_MOV,S_L,newreference(left.location.reference),
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hreg1);
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end;
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clear_location(left.location);
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left.location.loc:=LOC_REGISTER;
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left.location.register:=hreg1;
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end
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else hreg1:=left.location.register;
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if (nodetype=divn) and (right.nodetype=ordconstn) and
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ispowerof2(tordconstnode(right).value,power) then
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Begin
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shrdiv := true;
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{for signed numbers, the numerator must be adjusted before the
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shift instruction, but not wih unsigned numbers! Otherwise,
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"Cardinal($ffffffff) div 16" overflows! (JM)}
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If is_signed(left.resulttype.def) Then
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Begin
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If (aktOptProcessor <> class386) and
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not(CS_LittleSize in aktglobalswitches) then
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{ use a sequence without jumps, saw this in
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comp.compilers (JM) }
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begin
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{ no jumps, but more operations }
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if (hreg1 = R_EAX) and
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(R_EDX in unused) then
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begin
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hreg2 := getexplicitregister32(R_EDX);
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emit_none(A_CDQ,S_NO);
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end
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else
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begin
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getexplicitregister32(R_EDI);
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hreg2 := R_EDI;
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emit_reg_reg(A_MOV,S_L,hreg1,R_EDI);
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{ if the left value is signed, R_EDI := $ffffffff,
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otherwise 0 }
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emit_const_reg(A_SAR,S_L,31,R_EDI);
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{ if signed, R_EDI := right value-1, otherwise 0 }
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end;
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emit_const_reg(A_AND,S_L,tordconstnode(right).value-1,hreg2);
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{ add to the left value }
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emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
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{ release EDX if we used it }
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{ also releas EDI }
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ungetregister32(hreg2);
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{ do the shift }
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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else
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begin
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{ a jump, but less operations }
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emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
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getlabel(hl);
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emitjmp(C_NS,hl);
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if power=1 then
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emit_reg(A_INC,S_L,hreg1)
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else
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emit_const_reg(A_ADD,S_L,tordconstnode(right).value-1,hreg1);
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emitlab(hl);
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emit_const_reg(A_SAR,S_L,power,hreg1);
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end
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End
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Else
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emit_const_reg(A_SHR,S_L,power,hreg1);
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End
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else
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if (nodetype=modn) and (right.nodetype=ordconstn) and
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ispowerof2(tordconstnode(right).value,power) and Not(is_signed(left.resulttype.def)) Then
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{is there a similar trick for MOD'ing signed numbers? (JM)}
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Begin
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emit_const_reg(A_AND,S_L,tordconstnode(right).value-1,hreg1);
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andmod := true;
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End
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else
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begin
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{ bring denominator to EDI }
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{ EDI is always free, it's }
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{ only used for temporary }
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{ purposes }
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getexplicitregister32(R_EDI);
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if (right.location.loc<>LOC_REGISTER) and
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(right.location.loc<>LOC_CREGISTER) then
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begin
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del_reference(right.location.reference);
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left.location.loc:=LOC_REGISTER;
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emit_ref_reg(A_MOV,S_L,newreference(right.location.reference),R_EDI);
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end
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else
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begin
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emit_reg_reg(A_MOV,S_L,right.location.register,R_EDI);
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ungetregister32(right.location.register);
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end;
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popedx:=false;
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popeax:=false;
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if hreg1=R_EDX then
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begin
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if not(R_EAX in unused) then
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begin
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emit_reg(A_PUSH,S_L,R_EAX);
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popeax:=true;
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end
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else
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getexplicitregister32(R_EAX);
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emit_reg_reg(A_MOV,S_L,R_EDX,R_EAX);
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end
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else
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begin
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if not(R_EDX in unused) then
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begin
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emit_reg(A_PUSH,S_L,R_EDX);
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popedx:=true;
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end
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else
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getexplicitregister32(R_EDX);
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if hreg1<>R_EAX then
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begin
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if not(R_EAX in unused) then
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begin
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emit_reg(A_PUSH,S_L,R_EAX);
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popeax:=true;
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end
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else
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getexplicitregister32(R_EAX);
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emit_reg_reg(A_MOV,S_L,hreg1,R_EAX);
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end;
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end;
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{ sign extension depends on the left type }
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if torddef(left.resulttype.def).typ=u32bit then
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emit_reg_reg(A_XOR,S_L,R_EDX,R_EDX)
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else
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emit_none(A_CDQ,S_NO);
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{ division depends on the right type }
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if torddef(right.resulttype.def).typ=u32bit then
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emit_reg(A_DIV,S_L,R_EDI)
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else
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emit_reg(A_IDIV,S_L,R_EDI);
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ungetregister32(R_EDI);
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if nodetype=divn then
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begin
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{ if result register is busy then copy }
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if popeax then
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begin
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if hreg1=R_EAX then
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internalerror(112);
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emit_reg_reg(A_MOV,S_L,R_EAX,hreg1)
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end
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else
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if hreg1<>R_EAX then
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Begin
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ungetregister32(hreg1);
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{ no need to allocate eax, that's already done before }
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{ the div (JM) }
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hreg1 := R_EAX;
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end;
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if not popedx and (hreg1 <> R_EDX) then
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ungetregister(R_EDX);
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end
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else
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{if we did the mod by an "and", the result is in hreg1 and
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EDX certainly hasn't been pushed (JM)}
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if not(andmod) Then
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begin
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if popedx then
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{the mod was done by an (i)div (so the result is now in
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edx), but edx was occupied prior to the division, so
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move the result into a safe place (JM)}
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emit_reg_reg(A_MOV,S_L,R_EDX,hreg1)
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else
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Begin
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if hreg1 <> R_EDX then
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ungetregister32(hreg1);
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hreg1 := R_EDX
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End;
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if not popeax and (hreg1 <> R_EAX)then
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ungetregister(R_EAX);
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end;
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if popeax then
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emit_reg(A_POP,S_L,R_EAX);
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if popedx then
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emit_reg(A_POP,S_L,R_EDX);
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end;
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If not(andmod or shrdiv) then
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{andmod and shrdiv only use hreg1 (which is already in usedinproc,
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since it was acquired with getregister), the others also use both
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EAX and EDX (JM)}
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Begin
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usedinproc:=usedinproc or ($80 shr byte(R_EAX));
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usedinproc:=usedinproc or ($80 shr byte(R_EDX));
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End;
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clear_location(location);
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location.loc:=LOC_REGISTER;
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location.register:=hreg1;
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end;
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end;
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{*****************************************************************************
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TI386SHLRSHRNODE
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*****************************************************************************}
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procedure ti386shlshrnode.pass_2;
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var
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hregister1,hregister2,hregister3,
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hregisterhigh,hregisterlow : tregister;
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pushed,popecx : boolean;
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op : tasmop;
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l1,l2,l3 : tasmlabel;
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begin
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popecx:=false;
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secondpass(left);
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pushed:=maybe_push(right.registers32,left,is_64bitint(left.resulttype.def));
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secondpass(right);
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if pushed then
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restore(left,is_64bitint(left.resulttype.def));
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if is_64bitint(left.resulttype.def) then
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begin
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{ load left operator in a register }
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if left.location.loc<>LOC_REGISTER then
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begin
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if left.location.loc=LOC_CREGISTER then
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begin
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hregisterlow:=getregister32;
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hregisterhigh:=getregister32;
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emit_reg_reg(A_MOV,S_L,left.location.registerlow,
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hregisterlow);
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emit_reg_reg(A_MOV,S_L,left.location.registerhigh,
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hregisterlow);
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end
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else
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begin
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del_reference(left.location.reference);
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hregisterlow:=getregister32;
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hregisterhigh:=getregister32;
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emit_mov_ref_reg64(left.location.reference,
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hregisterlow,
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hregisterhigh);
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end;
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end
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else
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begin
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hregisterlow:=left.location.registerlow;
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hregisterhigh:=left.location.registerhigh;
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end;
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{ shifting by a constant directly coded: }
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if (right.nodetype=ordconstn) then
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begin
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{ shrd/shl works only for values <=31 !! }
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if tordconstnode(right).value>31 then
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begin
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if nodetype=shln then
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begin
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emit_reg_reg(A_XOR,S_L,hregisterhigh,
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hregisterhigh);
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emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
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hregisterlow);
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end
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else
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begin
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emit_reg_reg(A_XOR,S_L,hregisterlow,
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hregisterlow);
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emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
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hregisterhigh);
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end;
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location.registerhigh:=hregisterlow;
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location.registerlow:=hregisterhigh;
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end
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else
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begin
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if nodetype=shln then
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begin
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emit_const_reg_reg(A_SHLD,S_L,tordconstnode(right).value and 31,
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hregisterlow,hregisterhigh);
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emit_const_reg(A_SHL,S_L,tordconstnode(right).value and 31,
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hregisterlow);
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end
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else
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begin
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emit_const_reg_reg(A_SHRD,S_L,tordconstnode(right).value and 31,
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hregisterhigh,hregisterlow);
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emit_const_reg(A_SHR,S_L,tordconstnode(right).value and 31,
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hregisterhigh);
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end;
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location.registerlow:=hregisterlow;
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location.registerhigh:=hregisterhigh;
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end;
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location.loc:=LOC_REGISTER;
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end
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else
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begin
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{ load right operators in a register }
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if right.location.loc<>LOC_REGISTER then
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begin
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if right.location.loc=LOC_CREGISTER then
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begin
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hregister2:=getexplicitregister32(R_ECX);
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emit_reg_reg(A_MOV,S_L,right.location.register,
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hregister2);
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end
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else
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begin
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del_reference(right.location.reference);
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hregister2:=getexplicitregister32(R_ECX);
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emit_ref_reg(A_MOV,S_L,newreference(right.location.reference),
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hregister2);
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end;
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end
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else
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hregister2:=right.location.register;
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{ left operator is already in a register }
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{ hence are both in a register }
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{ is it in the case ECX ? }
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if (hregisterlow=R_ECX) then
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begin
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{ then only swap }
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emit_reg_reg(A_XCHG,S_L,hregisterlow,hregister2);
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hregister3:=hregisterlow;
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hregisterlow:=hregister2;
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hregister2:=hregister3;
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end
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else if (hregisterhigh=R_ECX) then
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begin
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{ then only swap }
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emit_reg_reg(A_XCHG,S_L,hregisterhigh,hregister2);
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hregister3:=hregisterhigh;
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hregisterhigh:=hregister2;
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hregister2:=hregister3;
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end
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{ if second operator not in ECX ? }
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else if (hregister2<>R_ECX) then
|
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begin
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{ ECX occupied then push it }
|
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if not (R_ECX in unused) then
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begin
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popecx:=true;
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emit_reg(A_PUSH,S_L,R_ECX);
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end
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else
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getexplicitregister32(R_ECX);
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emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
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end;
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|
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if hregister2 <> R_ECX then
|
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ungetregister32(hregister2);
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{ the damned shift instructions work only til a count of 32 }
|
|
{ so we've to do some tricks here }
|
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if nodetype=shln then
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begin
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getlabel(l1);
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getlabel(l2);
|
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getlabel(l3);
|
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emit_const_reg(A_CMP,S_L,64,R_ECX);
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emitjmp(C_L,l1);
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emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
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emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
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emitjmp(C_None,l3);
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emitlab(l1);
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emit_const_reg(A_CMP,S_L,32,R_ECX);
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|
emitjmp(C_L,l2);
|
|
emit_const_reg(A_SUB,S_L,32,R_ECX);
|
|
emit_reg_reg(A_SHL,S_L,R_CL,
|
|
hregisterlow);
|
|
emit_reg_reg(A_MOV,S_L,hregisterlow,hregisterhigh);
|
|
emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
|
|
emitjmp(C_None,l3);
|
|
emitlab(l2);
|
|
emit_reg_reg_reg(A_SHLD,S_L,R_CL,
|
|
hregisterlow,hregisterhigh);
|
|
emit_reg_reg(A_SHL,S_L,R_CL,
|
|
hregisterlow);
|
|
emitlab(l3);
|
|
end
|
|
else
|
|
begin
|
|
getlabel(l1);
|
|
getlabel(l2);
|
|
getlabel(l3);
|
|
emit_const_reg(A_CMP,S_L,64,R_ECX);
|
|
emitjmp(C_L,l1);
|
|
emit_reg_reg(A_XOR,S_L,hregisterlow,hregisterlow);
|
|
emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
|
|
emitjmp(C_None,l3);
|
|
emitlab(l1);
|
|
emit_const_reg(A_CMP,S_L,32,R_ECX);
|
|
emitjmp(C_L,l2);
|
|
emit_const_reg(A_SUB,S_L,32,R_ECX);
|
|
emit_reg_reg(A_SHR,S_L,R_CL,
|
|
hregisterhigh);
|
|
emit_reg_reg(A_MOV,S_L,hregisterhigh,hregisterlow);
|
|
emit_reg_reg(A_XOR,S_L,hregisterhigh,hregisterhigh);
|
|
emitjmp(C_None,l3);
|
|
emitlab(l2);
|
|
emit_reg_reg_reg(A_SHRD,S_L,R_CL,
|
|
hregisterhigh,hregisterlow);
|
|
emit_reg_reg(A_SHR,S_L,R_CL,
|
|
hregisterhigh);
|
|
emitlab(l3);
|
|
|
|
end;
|
|
|
|
{ maybe put ECX back }
|
|
if popecx then
|
|
emit_reg(A_POP,S_L,R_ECX)
|
|
else ungetregister32(R_ECX);
|
|
|
|
location.registerlow:=hregisterlow;
|
|
location.registerhigh:=hregisterhigh;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
{ load left operators in a register }
|
|
if left.location.loc<>LOC_REGISTER then
|
|
begin
|
|
if left.location.loc=LOC_CREGISTER then
|
|
begin
|
|
hregister1:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,left.location.register,
|
|
hregister1);
|
|
end
|
|
else
|
|
begin
|
|
del_reference(left.location.reference);
|
|
hregister1:=getregister32;
|
|
emit_ref_reg(A_MOV,S_L,newreference(left.location.reference),
|
|
hregister1);
|
|
end;
|
|
end
|
|
else
|
|
hregister1:=left.location.register;
|
|
|
|
{ determine operator }
|
|
if nodetype=shln then
|
|
op:=A_SHL
|
|
else
|
|
op:=A_SHR;
|
|
|
|
{ shifting by a constant directly coded: }
|
|
if (right.nodetype=ordconstn) then
|
|
begin
|
|
{ l shl 32 should 0 imho, but neither TP nor Delphi do it in this way (FK)
|
|
if right.value<=31 then
|
|
}
|
|
emit_const_reg(op,S_L,tordconstnode(right).value and 31,
|
|
hregister1);
|
|
{
|
|
else
|
|
emit_reg_reg(A_XOR,S_L,hregister1,
|
|
hregister1);
|
|
}
|
|
location.loc:=LOC_REGISTER;
|
|
location.register:=hregister1;
|
|
end
|
|
else
|
|
begin
|
|
{ load right operators in a register }
|
|
if right.location.loc<>LOC_REGISTER then
|
|
begin
|
|
if right.location.loc=LOC_CREGISTER then
|
|
begin
|
|
hregister2:=getexplicitregister32(R_ECX);
|
|
emit_reg_reg(A_MOV,S_L,right.location.register,
|
|
hregister2);
|
|
end
|
|
else
|
|
begin
|
|
del_reference(right.location.reference);
|
|
hregister2:=getexplicitregister32(R_ECX);
|
|
emit_ref_reg(A_MOV,S_L,newreference(right.location.reference),
|
|
hregister2);
|
|
end;
|
|
end
|
|
else
|
|
hregister2:=right.location.register;
|
|
|
|
{ left operator is already in a register }
|
|
{ hence are both in a register }
|
|
{ is it in the case ECX ? }
|
|
if (hregister1=R_ECX) then
|
|
begin
|
|
{ then only swap }
|
|
emit_reg_reg(A_XCHG,S_L,hregister1,hregister2);
|
|
hregister3:=hregister1;
|
|
hregister1:=hregister2;
|
|
hregister2:=hregister3;
|
|
end
|
|
{ if second operator not in ECX ? }
|
|
else if (hregister2<>R_ECX) then
|
|
begin
|
|
{ ECX occupied then push it }
|
|
if not (R_ECX in unused) then
|
|
begin
|
|
popecx:=true;
|
|
emit_reg(A_PUSH,S_L,R_ECX);
|
|
end
|
|
else
|
|
getexplicitregister32(R_ECX);
|
|
emit_reg_reg(A_MOV,S_L,hregister2,R_ECX);
|
|
end;
|
|
ungetregister32(hregister2);
|
|
{ right operand is in ECX }
|
|
emit_reg_reg(op,S_L,R_CL,hregister1);
|
|
{ maybe ECX back }
|
|
if popecx then
|
|
emit_reg(A_POP,S_L,R_ECX)
|
|
else
|
|
ungetregister32(R_ECX);
|
|
location.register:=hregister1;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
TI386UNARYMINUSNODE
|
|
*****************************************************************************}
|
|
|
|
function ti386unaryminusnode.pass_1 : tnode;
|
|
begin
|
|
result:=nil;
|
|
firstpass(left);
|
|
if codegenerror then
|
|
exit;
|
|
|
|
registers32:=left.registers32;
|
|
registersfpu:=left.registersfpu;
|
|
{$ifdef SUPPORT_MMX}
|
|
registersmmx:=left.registersmmx;
|
|
{$endif SUPPORT_MMX}
|
|
|
|
if (left.resulttype.def.deftype=floatdef) then
|
|
begin
|
|
location.loc:=LOC_FPU;
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and
|
|
is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
if (left.location.loc<>LOC_MMXREGISTER) and
|
|
(registersmmx<1) then
|
|
registersmmx:=1;
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
if (left.location.loc<>LOC_REGISTER) and
|
|
(registers32<2) then
|
|
registers32:=2;
|
|
location.loc:=LOC_REGISTER;
|
|
end
|
|
else if (left.resulttype.def.deftype=orddef) then
|
|
begin
|
|
if (left.location.loc<>LOC_REGISTER) and
|
|
(registers32<1) then
|
|
registers32:=1;
|
|
location.loc:=LOC_REGISTER;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure ti386unaryminusnode.pass_2;
|
|
{$ifdef SUPPORT_MMX}
|
|
procedure do_mmx_neg;
|
|
var
|
|
op : tasmop;
|
|
begin
|
|
location.loc:=LOC_MMXREGISTER;
|
|
if cs_mmx_saturation in aktlocalswitches then
|
|
case mmx_type(resulttype.def) of
|
|
mmxs8bit:
|
|
op:=A_PSUBSB;
|
|
mmxu8bit:
|
|
op:=A_PSUBUSB;
|
|
mmxs16bit,mmxfixed16:
|
|
op:=A_PSUBSW;
|
|
mmxu16bit:
|
|
op:=A_PSUBUSW;
|
|
end
|
|
else
|
|
case mmx_type(resulttype.def) of
|
|
mmxs8bit,mmxu8bit:
|
|
op:=A_PSUBB;
|
|
mmxs16bit,mmxu16bit,mmxfixed16:
|
|
op:=A_PSUBW;
|
|
mmxs32bit,mmxu32bit:
|
|
op:=A_PSUBD;
|
|
end;
|
|
emit_reg_reg(op,S_NO,location.register,R_MM7);
|
|
emit_reg_reg(A_MOVQ,S_NO,R_MM7,location.register);
|
|
end;
|
|
{$endif}
|
|
|
|
begin
|
|
if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
secondpass(left);
|
|
clear_location(location);
|
|
location.loc:=LOC_REGISTER;
|
|
case left.location.loc of
|
|
LOC_REGISTER :
|
|
begin
|
|
location.registerlow:=left.location.registerlow;
|
|
location.registerhigh:=left.location.registerhigh;
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
location.registerlow:=getregister32;
|
|
location.registerhigh:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,left.location.registerlow,location.registerlow);
|
|
emit_reg_reg(A_MOV,S_L,left.location.registerhigh,location.registerhigh);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM :
|
|
begin
|
|
del_reference(left.location.reference);
|
|
location.registerlow:=getregister32;
|
|
location.registerhigh:=getregister32;
|
|
emit_mov_ref_reg64(left.location.reference,
|
|
location.registerlow,
|
|
location.registerhigh);
|
|
end;
|
|
end;
|
|
{
|
|
emit_reg(A_NEG,S_L,location.registerlow);
|
|
emit_const_reg(A_ADC,S_L,0,location.registerhigh);
|
|
emit_reg(A_NEG,S_L,location.registerhigh);
|
|
}
|
|
emit_reg(A_NOT,S_L,location.registerhigh);
|
|
emit_reg(A_NEG,S_L,location.registerlow);
|
|
emit_const_reg(A_SBB,S_L,-1,location.registerhigh);
|
|
end
|
|
else
|
|
begin
|
|
secondpass(left);
|
|
location.loc:=LOC_REGISTER;
|
|
case left.location.loc of
|
|
LOC_REGISTER:
|
|
begin
|
|
location.register:=left.location.register;
|
|
emit_reg(A_NEG,S_L,location.register);
|
|
end;
|
|
LOC_CREGISTER:
|
|
begin
|
|
location.register:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,location.register,
|
|
location.register);
|
|
emit_reg(A_NEG,S_L,location.register);
|
|
end;
|
|
{$ifdef SUPPORT_MMX}
|
|
LOC_MMXREGISTER:
|
|
begin
|
|
set_location(location,left.location);
|
|
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
|
|
do_mmx_neg;
|
|
end;
|
|
LOC_CMMXREGISTER:
|
|
begin
|
|
location.register:=getregistermmx;
|
|
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
|
|
emit_reg_reg(A_MOVQ,S_NO,left.location.register,
|
|
location.register);
|
|
do_mmx_neg;
|
|
end;
|
|
{$endif SUPPORT_MMX}
|
|
LOC_REFERENCE,LOC_MEM:
|
|
begin
|
|
del_reference(left.location.reference);
|
|
if (left.resulttype.def.deftype=floatdef) then
|
|
begin
|
|
location.loc:=LOC_FPU;
|
|
floatload(tfloatdef(left.resulttype.def).typ,
|
|
left.location.reference);
|
|
emit_none(A_FCHS,S_NO);
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else if (cs_mmx in aktlocalswitches) and is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
location.register:=getregistermmx;
|
|
emit_reg_reg(A_PXOR,S_NO,R_MM7,R_MM7);
|
|
emit_ref_reg(A_MOVQ,S_NO,
|
|
newreference(left.location.reference),
|
|
location.register);
|
|
do_mmx_neg;
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else
|
|
begin
|
|
location.register:=getregister32;
|
|
emit_ref_reg(A_MOV,S_L,
|
|
newreference(left.location.reference),
|
|
location.register);
|
|
emit_reg(A_NEG,S_L,location.register);
|
|
end;
|
|
end;
|
|
LOC_FPU:
|
|
begin
|
|
location.loc:=LOC_FPU;
|
|
emit_none(A_FCHS,S_NO);
|
|
end;
|
|
LOC_CFPUREGISTER:
|
|
begin
|
|
emit_reg(A_FLD,S_NO,
|
|
correct_fpuregister(left.location.register,fpuvaroffset));
|
|
inc(fpuvaroffset);
|
|
location.loc:=LOC_FPU;
|
|
emit_none(A_FCHS,S_NO);
|
|
end;
|
|
end;
|
|
end;
|
|
{ Here was a problem... }
|
|
{ Operand to be negated always }
|
|
{ seems to be converted to signed }
|
|
{ 32-bit before doing neg!! }
|
|
{ So this is useless... }
|
|
{ that's not true: -2^31 gives an overflow error if it is negaded (FK) }
|
|
{ emitoverflowcheck(p);}
|
|
end;
|
|
|
|
|
|
{*****************************************************************************
|
|
TI386NOTNODE
|
|
*****************************************************************************}
|
|
|
|
procedure ti386notnode.pass_2;
|
|
const
|
|
flagsinvers : array[F_E..F_BE] of tresflags =
|
|
(F_NE,F_E,F_LE,F_GE,F_L,F_G,F_NC,F_C,
|
|
F_BE,F_B,F_AE,F_A);
|
|
var
|
|
hl : tasmlabel;
|
|
opsize : topsize;
|
|
begin
|
|
if is_boolean(resulttype.def) then
|
|
begin
|
|
opsize:=def_opsize(resulttype.def);
|
|
{ the second pass could change the location of left }
|
|
{ if it is a register variable, so we've to do }
|
|
{ this before the case statement }
|
|
if left.location.loc in [LOC_REFERENCE,LOC_MEM,
|
|
LOC_FLAGS,LOC_REGISTER,LOC_CREGISTER] then
|
|
secondpass(left);
|
|
case left.location.loc of
|
|
LOC_JUMP :
|
|
begin
|
|
hl:=truelabel;
|
|
truelabel:=falselabel;
|
|
falselabel:=hl;
|
|
secondpass(left);
|
|
maketojumpbool(left);
|
|
hl:=truelabel;
|
|
truelabel:=falselabel;
|
|
falselabel:=hl;
|
|
end;
|
|
LOC_FLAGS :
|
|
location.resflags:=flagsinvers[left.location.resflags];
|
|
LOC_REGISTER :
|
|
begin
|
|
{location.register:=left.location.register;
|
|
emit_const_reg(A_XOR,opsize,1,location.register);}
|
|
location.loc:=LOC_FLAGS;
|
|
location.resflags:=F_E;
|
|
emit_reg_reg(A_TEST,opsize,
|
|
left.location.register,left.location.register);
|
|
ungetregister(left.location.register);
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
clear_location(location);
|
|
location.loc:=LOC_REGISTER;
|
|
location.register:=def_getreg(resulttype.def);
|
|
emit_reg_reg(A_MOV,opsize,left.location.register,location.register);
|
|
emit_reg_reg(A_TEST,opsize,location.register,location.register);
|
|
ungetregister(location.register);
|
|
location.loc:=LOC_FLAGS;
|
|
location.resflags:=F_E;
|
|
end;
|
|
LOC_REFERENCE,
|
|
LOC_MEM :
|
|
begin
|
|
clear_location(location);
|
|
location.loc:=LOC_REGISTER;
|
|
del_reference(left.location.reference);
|
|
{ this was placed before del_ref => internaalerror(10) }
|
|
location.register:=def_getreg(resulttype.def);
|
|
emit_ref_reg(A_MOV,opsize,
|
|
newreference(left.location.reference),location.register);
|
|
emit_reg_reg(A_TEST,opsize,location.register,location.register);
|
|
ungetregister(location.register);
|
|
location.loc:=LOC_FLAGS;
|
|
location.resflags:=F_E;
|
|
end;
|
|
end;
|
|
end
|
|
{$ifdef SUPPORT_MMX}
|
|
else
|
|
if (cs_mmx in aktlocalswitches) and is_mmx_able_array(left.resulttype.def) then
|
|
begin
|
|
secondpass(left);
|
|
location.loc:=LOC_MMXREGISTER;
|
|
{ prepare EDI }
|
|
getexplicitregister32(R_EDI);
|
|
emit_const_reg(A_MOV,S_L,longint($ffffffff),R_EDI);
|
|
{ load operand }
|
|
case left.location.loc of
|
|
LOC_MMXREGISTER:
|
|
set_location(location,left.location);
|
|
LOC_CMMXREGISTER:
|
|
begin
|
|
location.register:=getregistermmx;
|
|
emit_reg_reg(A_MOVQ,S_NO,left.location.register,location.register);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM:
|
|
begin
|
|
del_reference(left.location.reference);
|
|
location.register:=getregistermmx;
|
|
emit_ref_reg(A_MOVQ,S_NO,
|
|
newreference(left.location.reference),location.register);
|
|
end;
|
|
end;
|
|
{ load mask }
|
|
emit_reg_reg(A_MOVD,S_NO,R_EDI,R_MM7);
|
|
ungetregister32(R_EDI);
|
|
{ lower 32 bit }
|
|
emit_reg_reg(A_PXOR,S_D,R_MM7,location.register);
|
|
{ shift mask }
|
|
emit_const_reg(A_PSLLQ,S_NO,32,R_MM7);
|
|
{ higher 32 bit }
|
|
emit_reg_reg(A_PXOR,S_D,R_MM7,location.register);
|
|
end
|
|
{$endif SUPPORT_MMX}
|
|
else if is_64bitint(left.resulttype.def) then
|
|
begin
|
|
secondpass(left);
|
|
clear_location(location);
|
|
location.loc:=LOC_REGISTER;
|
|
case left.location.loc of
|
|
LOC_REGISTER :
|
|
begin
|
|
location.registerlow:=left.location.registerlow;
|
|
location.registerhigh:=left.location.registerhigh;
|
|
emit_reg(A_NOT,S_L,location.registerlow);
|
|
emit_reg(A_NOT,S_L,location.registerhigh);
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
location.registerlow:=getregister32;
|
|
location.registerhigh:=getregister32;
|
|
emit_reg_reg(A_MOV,S_L,left.location.registerlow,location.registerlow);
|
|
emit_reg_reg(A_MOV,S_L,left.location.registerhigh,location.registerhigh);
|
|
emit_reg(A_NOT,S_L,location.registerlow);
|
|
emit_reg(A_NOT,S_L,location.registerhigh);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM :
|
|
begin
|
|
del_reference(left.location.reference);
|
|
location.registerlow:=getregister32;
|
|
location.registerhigh:=getregister32;
|
|
emit_mov_ref_reg64(left.location.reference,
|
|
location.registerlow,
|
|
location.registerhigh);
|
|
emit_reg(A_NOT,S_L,location.registerlow);
|
|
emit_reg(A_NOT,S_L,location.registerhigh);
|
|
end;
|
|
end;
|
|
end
|
|
else
|
|
begin
|
|
secondpass(left);
|
|
clear_location(location);
|
|
opsize:=def_opsize(resulttype.def);
|
|
location.loc:=LOC_REGISTER;
|
|
case left.location.loc of
|
|
LOC_REGISTER :
|
|
begin
|
|
location.register:=left.location.register;
|
|
emit_reg(A_NOT,opsize,location.register);
|
|
end;
|
|
LOC_CREGISTER :
|
|
begin
|
|
location.register:=def_getreg(resulttype.def);
|
|
emit_reg_reg(A_MOV,opsize,left.location.register,location.register);
|
|
emit_reg(A_NOT,opsize,location.register);
|
|
end;
|
|
LOC_REFERENCE,LOC_MEM :
|
|
begin
|
|
del_reference(left.location.reference);
|
|
location.register:=def_getreg(resulttype.def);
|
|
emit_ref_reg(A_MOV,opsize,
|
|
newreference(left.location.reference),location.register);
|
|
emit_reg(A_NOT,opsize,location.register);
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
begin
|
|
cmoddivnode:=ti386moddivnode;
|
|
cshlshrnode:=ti386shlshrnode;
|
|
cunaryminusnode:=ti386unaryminusnode;
|
|
cnotnode:=ti386notnode;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.15 2001-08-29 12:03:23 jonas
|
|
* fixed wrong regalloc info around FPC_MUL/DIV/MOD_INT64/QWORD calls
|
|
* fixed partial result overwriting with the above calls too
|
|
|
|
Revision 1.14 2001/08/26 13:37:00 florian
|
|
* some cg reorganisation
|
|
* some PPC updates
|
|
|
|
Revision 1.13 2001/04/13 01:22:19 peter
|
|
* symtable change to classes
|
|
* range check generation and errors fixed, make cycle DEBUG=1 works
|
|
* memory leaks fixed
|
|
|
|
Revision 1.12 2001/04/04 22:37:06 peter
|
|
* fix for not with no 32bit values
|
|
|
|
Revision 1.11 2001/04/02 21:20:38 peter
|
|
* resulttype rewrite
|
|
|
|
Revision 1.10 2001/02/03 12:52:34 jonas
|
|
* fixed web bug 1383
|
|
|
|
Revision 1.9 2000/12/07 17:19:46 jonas
|
|
* new constant handling: from now on, hex constants >$7fffffff are
|
|
parsed as unsigned constants (otherwise, $80000000 got sign extended
|
|
and became $ffffffff80000000), all constants in the longint range
|
|
become longints, all constants >$7fffffff and <=cardinal($ffffffff)
|
|
are cardinals and the rest are int64's.
|
|
* added lots of longint typecast to prevent range check errors in the
|
|
compiler and rtl
|
|
* type casts of symbolic ordinal constants are now preserved
|
|
* fixed bug where the original resulttype.def wasn't restored correctly
|
|
after doing a 64bit rangecheck
|
|
|
|
Revision 1.8 2000/12/05 11:44:33 jonas
|
|
+ new integer regvar handling, should be much more efficient
|
|
|
|
Revision 1.7 2000/11/29 00:30:48 florian
|
|
* unused units removed from uses clause
|
|
* some changes for widestrings
|
|
|
|
Revision 1.6 2000/11/20 14:05:50 jonas
|
|
* fixed bug in my changes to fix the regalloc info for div/mod ("merged")
|
|
|
|
Revision 1.5 2000/10/31 22:02:56 peter
|
|
* symtable splitted, no real code changes
|
|
|
|
Revision 1.4 2000/10/19 16:26:52 jonas
|
|
* fixed wrong regalloc info for secondmoddiv ("merged", also small
|
|
correction made afterwards in fixes branch)
|
|
|
|
Revision 1.3 2000/10/17 15:41:48 jonas
|
|
* fixed stupid error in previous commit :/
|
|
|
|
Revision 1.1 2000/10/15 09:33:32 peter
|
|
* moved n386*.pas to i386/ cpu_target dir
|
|
|
|
Revision 1.4 2000/10/14 10:14:49 peter
|
|
* moehrendorf oct 2000 rewrite
|
|
|
|
Revision 1.3 2000/09/30 16:08:45 peter
|
|
* more cg11 updates
|
|
|
|
Revision 1.2 2000/09/24 15:06:18 peter
|
|
* use defines.inc
|
|
|
|
Revision 1.1 2000/09/22 22:24:37 florian
|
|
* initial revision
|
|
|
|
}
|