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912 lines
31 KiB
ObjectPascal
912 lines
31 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 1998-2000 by Florian Klaempfl
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This unit implements the code generator for the i386
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cgcpu;
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{$i defines.inc}
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interface
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uses
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cgbase,cgobj,cg64f32,aasm,cpuasm,cpubase,cpuinfo;
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type
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tcg386 = class(tcg64f32)
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{ passing parameters, per default the parameter is pushed }
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{ nr gives the number of the parameter (enumerated from }
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{ left to right), this allows to move the parameter to }
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{ register, if the cpu supports register calling }
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{ conventions }
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procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;nr : longint);override;
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procedure a_param_const(list : taasmoutput;size : tcgsize;a : aword;nr : longint);override;
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procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;nr : longint);override;
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procedure a_paramaddr_ref(list : taasmoutput;const r : treference;nr : longint);override;
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procedure a_call_name(list : taasmoutput;const s : string;
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offset : longint);override;
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procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister); override;
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procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; const ref: TReference); override;
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procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
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procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); override;
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procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference); override;
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procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg;
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size: tcgsize; a: aword; src, dst: tregister); override;
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procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
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size: tcgsize; src1, src2, dst: tregister); override;
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{ move instructions }
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procedure a_load_const_reg(list : taasmoutput; size: tcgsize; a : aword;reg : tregister);override;
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procedure a_load_const_ref(list : taasmoutput; size: tcgsize; a : aword;const ref : treference);override;
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procedure a_load_reg_ref(list : taasmoutput; size: tcgsize; reg : tregister;const ref : treference);override;
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procedure a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref : treference;reg : tregister);override;
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procedure a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);override;
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procedure a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister); override;
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{ comparison operations }
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procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
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l : tasmlabel);override;
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procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const ref : treference;
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l : tasmlabel);override;
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procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
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procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference; reg : tregister; l : tasmlabel); override;
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procedure a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel); override;
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procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); override;
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procedure g_flags2reg(list: taasmoutput; const f: tresflags; reg: TRegister); override;
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procedure g_stackframe_entry(list : taasmoutput;localsize : longint);override;
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procedure g_restore_frame_pointer(list : taasmoutput);override;
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procedure g_push_exception_value_reg(list : taasmoutput;reg : tregister);override;
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procedure g_push_exception_value_const(list : taasmoutput;reg : tregister);override;
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procedure g_pop_exception_value_reg(list : taasmoutput;reg : tregister);override;
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procedure g_return_from_proc(list : taasmoutput;parasize : aword); override;
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procedure a_loadaddress_ref_reg(list : taasmoutput;const ref : treference;r : tregister);override;
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procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);override;
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function makeregsize(var reg: tregister; size: tcgsize): topsize; override;
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class function reg_cgsize(const reg: tregister): tcgsize; override;
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private
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procedure sizes2load(s1: tcgsize; s2: topsize; var op: tasmop; var s3: topsize);
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end;
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const
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TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_ADD,A_AND,A_DIV,
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A_IDIV,A_MUL, A_IMUL, A_NEG,A_NOT,A_OR,
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A_SAR,A_SHL,A_SHR,A_SUB,A_XOR);
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TOpCmp2AsmCond: Array[topcmp] of TAsmCond = (C_NONE,C_E,C_G,
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C_L,C_GE,C_LE,C_NE,C_BE,C_B,C_AE,C_A);
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TCGSize2OpSize: Array[tcgsize] of topsize = (S_NO,S_B,S_W,S_L,S_L,
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S_B,S_W,S_L,S_L);
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implementation
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uses
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globtype,globals,verbose,systems,cutils,cga,tgcpu;
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{ we implement the following routines because otherwise we can't }
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{ instantiate the class since it's abstract }
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procedure tcg386.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;nr : longint);
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begin
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runerror(211);
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end;
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procedure tcg386.a_param_const(list : taasmoutput;size : tcgsize;a : aword;nr : longint);
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begin
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runerror(211);
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end;
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procedure tcg386.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;nr : longint);
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var
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tmpreg: tregister;
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begin
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case size of
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OS_8,OS_S8,OS_16,OS_S16:
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begin
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tmpreg := get_scratch_reg(list);
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a_load_ref_reg(list,size,r,tmpreg);
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if target_info.alignment.paraalign = 2 then
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list.concat(taicpu.op_reg(A_PUSH,S_W,makereg16(tmpreg)))
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else
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list.concat(taicpu.op_reg(A_PUSH,S_L,tmpreg));
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end;
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OS_32,OS_S32:
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list.concat(taicpu.op_ref(A_PUSH,S_L,newreference(r)));
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else
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internalerror(200109301);
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end;
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end;
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procedure tcg386.a_paramaddr_ref(list : taasmoutput;const r : treference;nr : longint);
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begin
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runerror(211);
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end;
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procedure tcg386.a_call_name(list : taasmoutput;const s : string;
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offset : longint);
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begin
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list.concat(taicpu.op_sym_ofs(A_CALL,S_NO,newasmsymbol(s),offset));
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end;
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{********************** load instructions ********************}
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procedure tcg386.a_load_const_reg(list : taasmoutput; size: TCGSize; a : aword; reg : TRegister);
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begin
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{ the optimizer will change it to "xor reg,reg" when loading zero, }
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{ no need to do it here too (JM) }
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list.concat(taicpu.op_const_reg(A_MOV,TCGSize2OpSize[size],
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longint(a),reg))
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end;
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procedure tcg386.a_load_const_ref(list : taasmoutput; size: tcgsize; a : aword;const ref : treference);
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begin
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{ zero is often used several times in succession -> load it in a }
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{ register and then store it to memory, so the optimizer can then }
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{ remove the unnecessary loads of registers and you get smaller }
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{ (and faster) code }
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if (a = 0) and
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(size in [OS_32,OS_S32]) then
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inherited a_load_const_ref(list,size,a,ref)
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else
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list.concat(taicpu.op_const_ref(A_MOV,TCGSize2OpSize[size],
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longint(a),newreference(ref)));
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end;
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procedure tcg386.a_load_reg_ref(list : taasmoutput; size: TCGSize; reg : tregister;const ref : treference);
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begin
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list.concat(taicpu.op_reg_ref(A_MOV,TCGSize2OpSize[size],reg,
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newreference(ref)));
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End;
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procedure tcg386.a_load_ref_reg(list : taasmoutput;size : tcgsize;const ref: treference;reg : tregister);
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var
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op: tasmop;
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s: topsize;
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begin
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if ref.is_immediate then
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a_load_const_reg(list,size,aword(ref.offset),reg)
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else
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begin
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sizes2load(size,regsize(reg),op,s);
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list.concat(taicpu.op_ref_reg(op,s,newreference(ref),reg));
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end;
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end;
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procedure tcg386.a_load_reg_reg(list : taasmoutput;size : tcgsize;reg1,reg2 : tregister);
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var
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op: tasmop;
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s: topsize;
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begin
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sizes2load(size,regsize(reg2),op,s);
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if (makereg32(reg1) = makereg32(reg2)) then
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{ "mov reg1, reg1" doesn't make sense }
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if op = A_MOV then
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exit
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else if (op = A_MOVZX) then
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case size of
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OS_8:
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begin
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list.concat(taicpu.op_const_reg(A_AND,regsize(reg2),255,reg2));
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exit;
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end;
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OS_16:
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begin
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list.concat(taicpu.op_const_reg(A_AND,S_L,65535,reg1));
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exit;
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end;
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end;
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list.concat(taicpu.op_reg_reg(op,s,reg1,reg2));
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end;
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procedure tcg386.a_load_sym_ofs_reg(list: taasmoutput; const sym: tasmsymbol; ofs: longint; reg: tregister);
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begin
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list.concat(taicpu.op_sym_ofs_reg(A_MOV,S_L,sym,ofs,reg));
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end;
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procedure tcg386.a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister);
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var
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opcode: tasmop;
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power: longint;
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scratch_register: TRegister;
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begin
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Case Op of
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OP_DIV, OP_IDIV:
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Begin
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if ispowerof2(longint(a),power) then
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begin
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case op of
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OP_DIV:
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opcode := A_SHR;
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OP_IDIV:
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opcode := A_SAR;
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end;
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list.concat(taicpu.op_const_reg(opcode,regsize(reg),power,
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reg));
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exit;
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end;
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{ the rest should be handled specifically in the code }
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{ generator because of the silly register usage restraints }
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internalerror(200109224);
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End;
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OP_MUL,OP_IMUL:
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begin
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if not(cs_check_overflow in aktlocalswitches) and
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ispowerof2(longint(a),power) then
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begin
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list.concat(taicpu.op_const_reg(A_SHL,regsize(reg),power,
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reg));
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exit;
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end;
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if op = OP_IMUL then
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list.concat(taicpu.op_const_reg(A_IMUL,regsize(reg),
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longint(a),reg))
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else
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{ OP_MUL should be handled specifically in the code }
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{ generator because of the silly register usage restraints }
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internalerror(200109225);
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end;
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OP_ADD, OP_AND, OP_OR, OP_SUB, OP_XOR:
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if (a = 1) and
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(op in [OP_ADD,OP_SUB]) then
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if op = OP_ADD then
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list.concat(taicpu.op_reg(A_INC,regsize(reg),reg))
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else
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list.concat(taicpu.op_reg(A_DEC,regsize(reg),reg))
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else if (a = 0) then
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if (op <> OP_AND) then
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exit
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else
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list.concat(taicpu.op_const_reg(A_MOV,regsize(reg),0,reg))
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else
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list.concat(taicpu.op_const_reg(TOpCG2AsmOp[op],regsize(reg),
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longint(a),reg));
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OP_SHL,OP_SHR,OP_SAR:
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begin
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if (a and 31) <> 0 Then
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list.concat(taicpu.op_const_reg(
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TOpCG2AsmOp[op],regsize(reg),a and 31,reg));
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if (a shr 5) <> 0 Then
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internalerror(68991);
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end
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else internalerror(68992);
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end;
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end;
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procedure tcg386.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: AWord; const ref: TReference);
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var
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opcode: tasmop;
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power: longint;
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scratch_register: TRegister;
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begin
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Case Op of
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OP_DIV, OP_IDIV:
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Begin
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if ispowerof2(longint(a),power) then
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begin
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case op of
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OP_DIV:
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opcode := A_SHR;
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OP_IDIV:
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opcode := A_SAR;
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end;
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list.concat(taicpu.op_const_ref(opcode,
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TCgSize2OpSize[size],power,newreference(ref)));
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exit;
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end;
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{ the rest should be handled specifically in the code }
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{ generator because of the silly register usage restraints }
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internalerror(200109231);
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End;
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OP_MUL,OP_IMUL:
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begin
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if not(cs_check_overflow in aktlocalswitches) and
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ispowerof2(longint(a),power) then
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begin
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list.concat(taicpu.op_const_ref(A_SHL,TCgSize2OpSize[size],
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power,newreference(ref)));
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exit;
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end;
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{ can't multiply a memory location directly with a constant }
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if op = OP_IMUL then
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inherited a_op_const_ref(list,op,size,a,ref)
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else
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{ OP_MUL should be handled specifically in the code }
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{ generator because of the silly register usage restraints }
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internalerror(200109232);
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end;
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OP_ADD, OP_AND, OP_OR, OP_SUB, OP_XOR:
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if (a = 1) and
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(op in [OP_ADD,OP_SUB]) then
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if op = OP_ADD then
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list.concat(taicpu.op_ref(A_INC,TCgSize2OpSize[size],
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newreference(ref)))
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else
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list.concat(taicpu.op_ref(A_DEC,TCgSize2OpSize[size],
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newreference(ref)))
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else if (a = 0) then
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if (op <> OP_AND) then
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exit
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else
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a_load_const_ref(list,size,0,ref)
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else
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list.concat(taicpu.op_const_ref(TOpCG2AsmOp[op],
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TCgSize2OpSize[size],longint(a),newreference(ref)));
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OP_SHL,OP_SHR,OP_SAR:
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begin
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if (a and 31) <> 0 Then
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list.concat(taicpu.op_const_ref(
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TOpCG2AsmOp[op],TCgSize2OpSize[size],a and 31,newreference(ref)));
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if (a shr 5) <> 0 Then
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internalerror(68991);
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end
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else internalerror(68992);
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end;
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end;
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procedure tcg386.a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; src, dst: TRegister);
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var
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regloadsize: tcgsize;
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dstsize: topsize;
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tmpreg : tregister;
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popecx : boolean;
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begin
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dstsize := makeregsize(dst,size);
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case op of
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OP_NEG,OP_NOT:
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begin
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if src <> R_NO then
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internalerror(200112291);
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list.concat(taicpu.op_reg(TOpCG2AsmOp[op],dstsize,dst));
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end;
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OP_MUL,OP_DIV,OP_IDIV:
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{ special stuff, needs separate handling inside code }
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{ generator }
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internalerror(200109233);
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OP_SHR,OP_SHL,OP_SAR:
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begin
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tmpreg := R_NO;
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{ we need cl to hold the shift count, so if the destination }
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{ is ecx, save it to a temp for now }
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if dst in [R_ECX,R_CX,R_CL] then
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begin
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case regsize(dst) of
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S_B: regloadsize := OS_8;
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S_W: regloadsize := OS_16;
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else regloadsize := OS_32;
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end;
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tmpreg := get_scratch_reg(list);
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a_load_reg_reg(list,regloadsize,src,tmpreg);
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end;
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if not(src in [R_ECX,R_CX,R_CL]) then
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begin
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{ is ecx still free (it's also free if it was allocated }
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{ to dst, since we've moved dst somewhere else already) }
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if not((dst = R_ECX) or
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((R_ECX in unused) and
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{ this will always be true, it's just here to }
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{ allocate ecx }
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(getexplicitregister32(R_ECX) = R_ECX))) then
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begin
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list.concat(taicpu.op_reg(A_PUSH,S_L,R_ECX));
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popecx := true;
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end;
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a_load_reg_reg(list,OS_8,makereg8(src),R_CL);
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end
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else
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src := R_CL;
|
|
{ do the shift }
|
|
if tmpreg = R_NO then
|
|
list.concat(taicpu.op_reg_reg(TOpCG2AsmOp[op],dstsize,
|
|
R_CL,dst))
|
|
else
|
|
begin
|
|
list.concat(taicpu.op_reg_reg(TOpCG2AsmOp[op],S_L,
|
|
R_CL,tmpreg));
|
|
{ move result back to the destination }
|
|
a_load_reg_reg(list,OS_32,tmpreg,R_ECX);
|
|
free_scratch_reg(list,tmpreg);
|
|
end;
|
|
if popecx then
|
|
list.concat(taicpu.op_reg(A_POP,S_L,R_ECX))
|
|
else if not (dst in [R_ECX,R_CX,R_CL]) then
|
|
ungetregister32(R_ECX);
|
|
end;
|
|
else
|
|
begin
|
|
if regsize(src) <> dstsize then
|
|
internalerror(200109226);
|
|
list.concat(taicpu.op_reg_reg(TOpCG2AsmOp[op],dstsize,
|
|
src,dst));
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure tcg386.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
|
|
|
|
var
|
|
opsize: topsize;
|
|
|
|
begin
|
|
if ref.is_immediate then
|
|
a_op_const_reg(list,op,aword(ref.offset),reg)
|
|
else
|
|
begin
|
|
case op of
|
|
OP_NEG,OP_NOT,OP_IMUL:
|
|
begin
|
|
inherited a_op_ref_reg(list,op,size,ref,reg);
|
|
end;
|
|
OP_MUL,OP_DIV,OP_IDIV:
|
|
{ special stuff, needs separate handling inside code }
|
|
{ generator }
|
|
internalerror(200109239);
|
|
else
|
|
begin
|
|
opsize := makeregsize(reg,size);
|
|
list.concat(taicpu.op_ref_reg(TOpCG2AsmOp[op],opsize,
|
|
newreference(ref),reg));
|
|
end;
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure tcg386.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
|
|
|
|
var
|
|
opsize: topsize;
|
|
|
|
begin
|
|
case op of
|
|
OP_NEG,OP_NOT:
|
|
begin
|
|
if reg <> R_NO then
|
|
internalerror(200109237);
|
|
list.concat(taicpu.op_ref(TOpCG2AsmOp[op],tcgsize2opsize[size],
|
|
newreference(ref)));
|
|
end;
|
|
OP_IMUL:
|
|
begin
|
|
{ this one needs a load/imul/store, which is the default }
|
|
inherited a_op_ref_reg(list,op,size,ref,reg);
|
|
end;
|
|
OP_MUL,OP_DIV,OP_IDIV:
|
|
{ special stuff, needs separate handling inside code }
|
|
{ generator }
|
|
internalerror(200109238);
|
|
else
|
|
begin
|
|
opsize := tcgsize2opsize[size];
|
|
list.concat(taicpu.op_reg_ref(TOpCG2AsmOp[op],opsize,reg,
|
|
newreference(ref)));
|
|
end;
|
|
end;
|
|
end;
|
|
|
|
|
|
procedure tcg386.a_op_const_reg_reg(list: taasmoutput; op: TOpCg;
|
|
size: tcgsize; a: aword; src, dst: tregister);
|
|
var
|
|
tmpref: treference;
|
|
power: longint;
|
|
opsize: topsize;
|
|
begin
|
|
opsize := regsize(src);
|
|
if (opsize <> S_L) or
|
|
not (size in [OS_32,OS_S32]) then
|
|
begin
|
|
inherited a_op_const_reg_reg(list,op,size,a,src,dst);
|
|
exit;
|
|
end;
|
|
{ if we get here, we have to do a 32 bit calculation, guaranteed }
|
|
Case Op of
|
|
OP_DIV, OP_IDIV, OP_MUL, OP_AND, OP_OR, OP_XOR, OP_SHL, OP_SHR,
|
|
OP_SAR:
|
|
{ can't do anything special for these }
|
|
inherited a_op_const_reg_reg(list,op,size,a,src,dst);
|
|
OP_IMUL:
|
|
begin
|
|
if not(cs_check_overflow in aktlocalswitches) and
|
|
ispowerof2(longint(a),power) then
|
|
{ can be done with a shift }
|
|
inherited a_op_const_reg_reg(list,op,size,a,src,dst);
|
|
list.concat(taicpu.op_const_reg_reg(A_IMUL,S_L,longint(a),src,dst));
|
|
end;
|
|
OP_ADD, OP_SUB:
|
|
if (a = 0) then
|
|
a_load_reg_reg(list,size,src,dst)
|
|
else
|
|
begin
|
|
reset_reference(tmpref);
|
|
tmpref.base := src;
|
|
tmpref.offset := longint(a);
|
|
if op = OP_SUB then
|
|
tmpref.offset := -tmpref.offset;
|
|
list.concat(taicpu.op_ref_reg(A_LEA,S_L,newreference(tmpref),
|
|
dst));
|
|
end
|
|
else internalerror(200112302);
|
|
end;
|
|
end;
|
|
|
|
procedure tcg386.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
|
|
size: tcgsize; src1, src2, dst: tregister);
|
|
var
|
|
tmpref: treference;
|
|
power: longint;
|
|
opsize: topsize;
|
|
begin
|
|
opsize := regsize(src1);
|
|
if (opsize <> S_L) or
|
|
(regsize(src2) <> S_L) or
|
|
not (size in [OS_32,OS_S32]) then
|
|
begin
|
|
inherited a_op_reg_reg_reg(list,op,size,src1,src2,dst);
|
|
exit;
|
|
end;
|
|
{ if we get here, we have to do a 32 bit calculation, guaranteed }
|
|
Case Op of
|
|
OP_DIV, OP_IDIV, OP_MUL, OP_AND, OP_OR, OP_XOR, OP_SHL, OP_SHR,
|
|
OP_SAR,OP_SUB,OP_NOT,OP_NEG:
|
|
{ can't do anything special for these }
|
|
inherited a_op_reg_reg_reg(list,op,size,src1,src2,dst);
|
|
OP_IMUL:
|
|
list.concat(taicpu.op_reg_reg_reg(A_IMUL,S_L,src1,src2,dst));
|
|
OP_ADD:
|
|
begin
|
|
reset_reference(tmpref);
|
|
tmpref.base := src1;
|
|
tmpref.index := src2;
|
|
tmpref.scalefactor := 1;
|
|
list.concat(taicpu.op_ref_reg(A_LEA,S_L,newreference(tmpref),
|
|
dst));
|
|
end
|
|
else internalerror(200112303);
|
|
end;
|
|
end;
|
|
|
|
{*************** compare instructructions ****************}
|
|
|
|
procedure tcg386.a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;reg : tregister;
|
|
l : tasmlabel);
|
|
|
|
begin
|
|
if a <> 0 then
|
|
list.concat(taicpu.op_const_reg(A_CMP,regsize(reg),longint(a),
|
|
reg))
|
|
else
|
|
list.concat(taicpu.op_reg_reg(A_TEST,regsize(reg),reg,reg));
|
|
a_jmp_cond(list,cmp_op,l);
|
|
end;
|
|
|
|
procedure tcg386.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aword;const ref : treference;
|
|
l : tasmlabel);
|
|
|
|
begin
|
|
list.concat(taicpu.op_const_ref(A_CMP,TCgSize2OpSize[size],
|
|
longint(a),newreference(ref)));
|
|
a_jmp_cond(list,cmp_op,l);
|
|
end;
|
|
|
|
procedure tcg386.a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;
|
|
reg1,reg2 : tregister;l : tasmlabel);
|
|
|
|
begin
|
|
if regsize(reg1) <> regsize(reg2) then
|
|
internalerror(200109226);
|
|
list.concat(taicpu.op_reg_reg(A_CMP,regsize(reg1),reg1,reg2));
|
|
a_jmp_cond(list,cmp_op,l);
|
|
end;
|
|
|
|
procedure tcg386.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference; reg : tregister;l : tasmlabel);
|
|
|
|
var
|
|
opsize: topsize;
|
|
|
|
begin
|
|
opsize := makeregsize(reg,size);
|
|
list.concat(taicpu.op_ref_reg(A_CMP,opsize,newreference(ref),reg));
|
|
a_jmp_cond(list,cmp_op,l);
|
|
end;
|
|
|
|
procedure tcg386.a_jmp_cond(list : taasmoutput;cond : TOpCmp;l: tasmlabel);
|
|
|
|
var
|
|
ai : taicpu;
|
|
|
|
begin
|
|
if cond=OC_None then
|
|
ai := Taicpu.Op_sym(A_JMP,S_NO,l)
|
|
else
|
|
begin
|
|
ai:=Taicpu.Op_sym(A_Jcc,S_NO,l);
|
|
ai.SetCondition(TOpCmp2AsmCond[cond]);
|
|
end;
|
|
ai.is_jmp:=true;
|
|
list.concat(ai);
|
|
end;
|
|
|
|
procedure tcg386.a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel);
|
|
var
|
|
ai : taicpu;
|
|
begin
|
|
ai := Taicpu.op_sym(A_Jcc,S_NO,l);
|
|
ai.SetCondition(flags_to_cond(f));
|
|
ai.is_jmp := true;
|
|
list.concat(ai);
|
|
end;
|
|
|
|
procedure tcg386.g_flags2reg(list: taasmoutput; const f: tresflags; reg: TRegister);
|
|
|
|
var
|
|
ai : taicpu;
|
|
hreg : tregister;
|
|
begin
|
|
hreg := makereg8(reg);
|
|
ai:=Taicpu.Op_reg(A_Setcc,S_B,hreg);
|
|
ai.SetCondition(flags_to_cond(f));
|
|
list.concat(ai);
|
|
if hreg<>reg then
|
|
begin
|
|
if reg in regset16bit then
|
|
emit_to_reg16(hreg)
|
|
else
|
|
emit_to_reg32(hreg);
|
|
end;
|
|
end;
|
|
|
|
|
|
{ *********** entry/exit code and address loading ************ }
|
|
|
|
procedure tcg386.g_stackframe_entry(list : taasmoutput;localsize : longint);
|
|
|
|
begin
|
|
runerror(211);
|
|
end;
|
|
|
|
|
|
procedure tcg386.g_restore_frame_pointer(list : taasmoutput);
|
|
|
|
begin
|
|
runerror(211);
|
|
end;
|
|
|
|
|
|
procedure tcg386.g_push_exception_value_reg(list : taasmoutput;reg : tregister);
|
|
|
|
begin
|
|
runerror(211);
|
|
end;
|
|
|
|
|
|
procedure tcg386.g_push_exception_value_const(list : taasmoutput;reg : tregister);
|
|
|
|
begin
|
|
runerror(211);
|
|
end;
|
|
|
|
|
|
procedure tcg386.g_pop_exception_value_reg(list : taasmoutput;reg : tregister);
|
|
|
|
begin
|
|
runerror(211);
|
|
end;
|
|
|
|
|
|
procedure tcg386.g_return_from_proc(list : taasmoutput;parasize : aword);
|
|
|
|
begin
|
|
runerror(211);
|
|
end;
|
|
|
|
procedure tcg386.a_loadaddress_ref_reg(list : taasmoutput;const ref : treference;r : tregister);
|
|
|
|
begin
|
|
list.concat(taicpu.op_ref_reg(A_LEA,S_L,newreference(ref),r));
|
|
end;
|
|
|
|
function tcg386.makeregsize(var reg: tregister; size: tcgsize): topsize;
|
|
|
|
begin
|
|
{ this function only allows downsizing a register, because otherwise }
|
|
{ we may start working with garbage (JM) }
|
|
case size of
|
|
OS_32,OS_S32:
|
|
begin
|
|
if not (reg in [R_EAX..R_EDI]) then
|
|
internalerror(2001092313);
|
|
result := S_L;
|
|
end;
|
|
OS_8,OS_S8:
|
|
begin
|
|
reg := makereg8(reg);
|
|
result := S_B;
|
|
end;
|
|
OS_16,OS_S16:
|
|
begin
|
|
if reg in [R_AL..R_BH] then
|
|
internalerror(2001092314);
|
|
reg := makereg16(reg);
|
|
result := S_W;
|
|
end;
|
|
else
|
|
internalerror(2001092312);
|
|
end;
|
|
end;
|
|
|
|
|
|
|
|
{ ************* concatcopy ************ }
|
|
|
|
procedure tcg386.g_concatcopy(list : taasmoutput;const source,dest : treference;len : aword; delsource,loadref : boolean);
|
|
|
|
{ temp implementation, until it's permanenty moved here from cga.pas }
|
|
|
|
var
|
|
oldlist: taasmoutput;
|
|
|
|
begin
|
|
if list <> exprasmlist then
|
|
begin
|
|
oldlist := exprasmlist;
|
|
exprasmlist := list;
|
|
end;
|
|
cga.concatcopy(source,dest,len,delsource,loadref);
|
|
if list <> exprasmlist then
|
|
list := oldlist;
|
|
end;
|
|
|
|
|
|
function tcg386.reg_cgsize(const reg: tregister): tcgsize;
|
|
const
|
|
regsize_2_cgsize: array[S_B..S_L] of tcgsize = (OS_8,OS_16,OS_32);
|
|
begin
|
|
result := regsize_2_cgsize[regsize(reg)];
|
|
end;
|
|
|
|
|
|
{***************** This is private property, keep out! :) *****************}
|
|
|
|
procedure tcg386.sizes2load(s1: tcgsize; s2: topsize; var op: tasmop; var s3: topsize);
|
|
|
|
begin
|
|
case s2 of
|
|
S_B:
|
|
if S1 in [OS_8,OS_S8] then
|
|
s3 := S_B
|
|
else internalerror(200109221);
|
|
S_W:
|
|
case s1 of
|
|
OS_8,OS_S8:
|
|
s3 := S_BW;
|
|
OS_16,OS_S16:
|
|
s3 := S_W;
|
|
else internalerror(200109222);
|
|
end;
|
|
S_L:
|
|
case s1 of
|
|
OS_8,OS_S8:
|
|
s3 := S_BL;
|
|
OS_16,OS_S16:
|
|
s3 := S_WL;
|
|
OS_32,OS_S32:
|
|
s3 := S_L;
|
|
else internalerror(200109223);
|
|
end;
|
|
else internalerror(200109227);
|
|
end;
|
|
if s3 in [S_B,S_W,S_L] then
|
|
op := A_MOV
|
|
else if s1 in [OS_8,OS_16,OS_32] then
|
|
op := A_MOVZX
|
|
else
|
|
op := A_MOVSX;
|
|
end;
|
|
|
|
|
|
begin
|
|
cg := tcg386.create;
|
|
end.
|
|
{
|
|
$Log$
|
|
Revision 1.6 2001-12-30 17:24:46 jonas
|
|
* range checking is now processor independent (part in cgobj, part in
|
|
cg64f32) and should work correctly again (it needed some changes after
|
|
the changes of the low and high of tordef's to int64)
|
|
* maketojumpbool() is now processor independent (in ncgutil)
|
|
* getregister32 is now called getregisterint
|
|
|
|
Revision 1.5 2001/12/29 15:29:59 jonas
|
|
* powerpc/cgcpu.pas compiles :)
|
|
* several powerpc-related fixes
|
|
* cpuasm unit is now based on common tainst unit
|
|
+ nppcmat unit for powerpc (almost complete)
|
|
|
|
Revision 1.4 2001/10/04 14:33:28 jonas
|
|
* fixed range check errors
|
|
|
|
Revision 1.3 2001/09/30 16:17:18 jonas
|
|
* made most constant and mem handling processor independent
|
|
|
|
Revision 1.2 2001/09/29 21:32:19 jonas
|
|
* fixed bug in a_load_reg_reg + implemented a_call
|
|
|
|
Revision 1.1 2001/09/28 20:39:33 jonas
|
|
* changed all flow control structures (except for exception handling
|
|
related things) to processor independent code (in new ncgflw unit)
|
|
+ generic cgobj unit which contains lots of code generator helpers with
|
|
global "cg" class instance variable
|
|
+ cgcpu unit for i386 (implements processor specific routines of the above
|
|
unit)
|
|
* updated cgbase and cpubase for the new code generator units
|
|
* include ncgflw unit in cpunode unit
|
|
|
|
}
|