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FpDebug: Fix decoding of extended general purpose registers
This commit is contained in:
Marc
parent
402360049e
commit
11992ed7d7
@ -52,24 +52,49 @@ uses
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() ignored opcode
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?? unspecified
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!! internal error, a group got called for an opcode which wasn't decoded there
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The disassember starts to decode the first byte according to
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Intel(r) 64 and IA-32 Architectures Software Developer’s Manual Volume 2:
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Table A-2. One-byte Opcode Map: (00H — F7H)
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and
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Table A-2. One-byte Opcode Map: (08H — FFH)
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The 3DNow!(tm) instructions are decoded according to
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AMD64 Architecture Programmer’s Manual Volume 3:
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Table A-13. Immediate Byte for 3DNow!(tm) Opcodes, Low Nibble 0–7h
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and
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Table A-14. Immediate Byte for 3DNow!(tm) Opcodes, Low Nibble 8–Fh
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The routines Addxx use the same abbriviations as used in those tables
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}
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type
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// rexB, rexX, rexR, rexW see
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// Intel(r) 64 and IA-32 Architectures Software Developer’s Manual Volume 2:
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// Table 2-4. REX Prefix Fields [BITS: 0100WRXB]
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TFlag = (
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flagRex, // $4x: set for any $4X
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flagSib, flagModRM,
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rexB, rexX, rexR,
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rexW, // $4x bit 4: 64 Bit Operand Size
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preOpr, // $66: Precision-size override prefix (32 and 64 bit)
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preAdr, preLock, preRep{N}, preRepNE);
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flagSib,
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flagModRM,
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rexB, // $4x bit 0: Extension of the ModR/M r/m field, SIB base field, or Opcode reg field
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rexX, // $4x bit 1: Extension of the SIB index field
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rexR, // $4x bit 2: Extension of the ModR/M reg field
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rexW, // $4x bit 3: 64 Bit Operand Size
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preOpr, // $66: Operand-size override prefix (32 and 64 bit)
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preAdr, // $67: Address-size override prefix
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preLock,
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preRep{N},
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preRepNE,
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oprDefault64, // In 64bit mode set default operand size to 64 (d64 note in Table A-x)
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oprForce64 // In 64bit mode set operand size to 64 (f64 note in Table A-x)
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);
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TFlags = set of TFlag;
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// Keep 8,16,32,64 together
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TOperandDefaultType = (
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v_16_32,
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vq_64_16
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);
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TOperandSize = (os8, os16, os32, os64, os48, os80, os128);
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TAddressSize = (as16, as32, as64);
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TRegisterType = (reg0, reg8, reg16, reg32, reg64, regMmx, regXmm, regSegment, regControl, regDebug, regX87);
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@ -281,6 +306,16 @@ const
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OPERAND_BYTES: array[TOperandSize] of Byte = (1, 2, 4, 8, 6, 10, 16);
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OPERAND_REG: array[os8..os64] of TRegisterType = (reg8, reg16, reg32, reg64);
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STD_REGS = [reg8..reg64];
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ADDRESS_REG: array[TAddressSize] of TRegisterType = (reg16, reg32, reg64);
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// reg8, reg16, reg32, reg64, regMmx, regXmm, regSegment, regControl, regDebug, regX87
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REGISTER_SIZE: array[TFPDMode, reg8..High(TRegisterType)] of TOperandSize = (
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{ dm32 } (os8, os16, os32, os64, os64, os128, os16, os32, os32, os80),
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{ dm64 } (os8, os16, os32, os64, os64, os128, os16, os64, os64, os80)
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);
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OPCODE_NAME: array [TOpCode] of String = (
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'???', // OPX_InternalUnknown
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'???',
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@ -637,7 +672,20 @@ var
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else
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Result := s;
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end;
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procedure Default64;
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begin
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if FProcess.Mode = dm64 then
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Include(Flags, oprDefault64);
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end;
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procedure Force64;
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begin
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if FProcess.Mode = dm64 then
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Include(Flags, oprForce64);
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end;
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procedure CheckLock;
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function CheckMem: boolean;
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var
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@ -731,24 +779,33 @@ var
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end;
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end;
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function OperandSize64_16: TOperandSize;
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function OperandSize: TOperandSize;
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begin
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// effective AnInstruction.operand size for default 64 AnInstruction.operand size
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if preOpr in Flags
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then Result := os16
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else Result := os64;
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end;
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// effective AnInstruction.operand size
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function OperandSize32: TOperandSize;
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begin
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// effective AnInstruction.operand size for default 32 AnInstruction.operand size
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if rexW in FLags
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// Intel(r) 64 and IA-32 Architectures Software Developer’s Manual Volume 1:
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// 3.6 OPERAND-SIZE AND ADDRESS-SIZE ATTRIBUTES
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//
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// Table 3-3 D-flag = 1 for 32 bit processes ->
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// default 32, prefix 16
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//
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// Table 3-4
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// REX.W 64, default 32, prefix 16 (REX.W overrules prefix)
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//
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// So for both dm32 and dm64 the default size is 32 unless overridden by flags
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// A.3 ONE, TWO, AND THREE-BYTE OPCODE MAPS
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// Some instructions default or force to 64bit in dm64
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if [oprForce64, rexW] * Flags <> []
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then begin
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Result := os64;
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end
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else begin
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if preOpr in Flags
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then Result := os16
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else if oprDefault64 in Flags
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then Result := os64
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else Result := os32;
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end;
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end;
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@ -772,7 +829,7 @@ var
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procedure AddOperand(const AValue: String; AByteCount: Byte = 0; AFormatFlags: THexValueFormatFlags = []; AFlags: TOperandFlags = []);
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begin
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AddOperand(AValue, OperandSize32, AByteCount, AFormatFlags, AFlags);
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AddOperand(AValue, OperandSize, AByteCount, AFormatFlags, AFlags);
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end;
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function SizeReg32(const AReg: String; ASize: TOperandSize): String;
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@ -788,7 +845,7 @@ var
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function SizeReg32(const AReg: String): String;
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begin
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Result := SizeReg32(AReg, OperandSize32);
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Result := SizeReg32(AReg, OperandSize);
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end;
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procedure StdCond(AIndex: Byte);
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@ -853,45 +910,35 @@ var
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function StdReg(AIndex: Byte): String;
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begin
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Result := StdReg(AIndex, OPERAND_REG[OperandSize32], rexR in Flags);
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Result := StdReg(AIndex, OPERAND_REG[OperandSize], rexB in Flags);
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end;
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procedure AddStdReg(AIndex: Byte; AType: TRegisterType; AExtReg: Boolean);
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const
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// reg8, reg16, reg32, reg64, regMmx, regXmm, regSegment, regControl, regDebug, regX87
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REGSIZE: array[Boolean, reg8..High(TRegisterType)] of TOperandSize = (
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{32}(os8, os16, os32, os64, os64, os128, os16, os32, os32, os80),
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{64}(os8, os16, os32, os64, os64, os128, os16, os64, os64, os80)
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);
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procedure AddStdReg(AIndex: Byte; AType: TRegisterType);
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begin
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AddOperand(StdReg(AIndex, AType, AExtReg), REGSIZE[(FProcess.Mode = dm64), AType]);
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AddOperand(StdReg(AIndex, AType, rexB in Flags), REGISTER_SIZE[FProcess.Mode, AType]);
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end;
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procedure AddStdReg(AIndex: Byte; AnOpDefType: TOperandDefaultType = v_16_32);
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procedure AddStdReg(AIndex: Byte);
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begin
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case AnOpDefType of
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v_16_32: AddOperand(StdReg(AIndex, OPERAND_REG[OperandSize32], rexR in Flags));
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vq_64_16: AddOperand(StdReg(AIndex, OPERAND_REG[OperandSize64_16], rexB in Flags));
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end;
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AddOperand(StdReg(AIndex));
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end;
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procedure AddModReg(AType: TRegisterType; ASize: TOperandSize);
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begin
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Include(Flags, flagModRM);
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AddOperand(StdReg(Code[ModRMIdx] shr 3, AType, False), ASize);
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AddOperand(StdReg(Code[ModRMIdx] shr 3, AType, rexR in Flags), ASize);
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end;
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procedure AddModReg(AType: TRegisterType; AExtReg: Boolean);
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procedure AddModReg(AType: TRegisterType);
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begin
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Include(Flags, flagModRM);
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AddStdReg(Code[ModRMIdx] shr 3, AType, AExtReg);
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AddOperand(StdReg(Code[ModRMIdx] shr 3, AType, rexR in Flags), REGISTER_SIZE[FProcess.Mode, AType]);
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end;
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procedure AddModReg;
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begin
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Include(Flags, flagModRM);
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AddStdReg(Code[ModRMIdx] shr 3);
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AddOperand(StdReg(Code[ModRMIdx] shr 3, OPERAND_REG[OperandSize], rexR in Flags));
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end;
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procedure AddModRM(AReqTypes: TModRMTypes; ASize: TOperandSize; AType: TRegisterType);
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@ -931,7 +978,7 @@ var
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if mode = 3
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then begin
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if modReg in AReqTypes
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then AddStdReg(rm, AType, False)
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then AddStdReg(rm, AType)
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else AddOperand('**');
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Exit;
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end;
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@ -974,9 +1021,7 @@ var
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else Oper.Flags := [hvfSigned, hvfIncludeHexchar]; // [base]
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end
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else begin
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if AddrSize = as32
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then Oper.Value := StdReg(sib.Base, reg32, rexB in Flags)
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else Oper.Value := StdReg(sib.Base, reg64, rexB in Flags);
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Oper.Value := StdReg(sib.Base, ADDRESS_REG[AddrSize], rexB in Flags);
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if (sib.Index <> 4) or (rexX in Flags)
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then Oper.Value := '+' + Oper.Value; // [reg + base]
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end;
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@ -988,16 +1033,12 @@ var
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then Oper.Value := Format('*%u', [1 shl sib.Scale]) + Oper.Value;
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// get index
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if AddrSize = as32
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then Oper.Value := StdReg(sib.Index, reg32, rexX in Flags) + Oper.Value
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else Oper.Value := StdReg(sib.Index, reg64, rexX in Flags) + Oper.Value;
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Oper.Value := StdReg(sib.Index, ADDRESS_REG[AddrSize], rexX in Flags) + Oper.Value
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end;
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end
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else begin
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// no sib
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if AddrSize = as32
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then Oper.Value := StdReg(rm, reg32, rexB in Flags)
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else Oper.Value := StdReg(rm, reg64, rexB in Flags);
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Oper.Value := StdReg(rm, ADDRESS_REG[AddrSize], rexB in Flags);
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end;
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case mode of
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@ -1035,19 +1076,19 @@ var
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procedure AddAp;
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begin
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if OperandSize32 = os16 //XXXX:XXXX
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if OperandSize = os16 //XXXX:XXXX
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then AddOperand('$%1:s:%0:s', os32, 2, [], [], 2)
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else AddOperand('$%1:s:%0:s', os48, 4, [], [], 2)
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end;
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procedure AddCd_q;
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begin
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AddModReg(regControl, rexR in Flags);
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AddModReg(regControl);
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end;
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procedure AddDd_q;
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begin
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AddModReg(regDebug, rexR in Flags);
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AddModReg(regDebug);
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end;
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procedure AddEb;
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@ -1069,7 +1110,7 @@ var
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procedure AddEv;
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begin
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AddModRM([modReg, modMem], OperandSize32, OPERAND_REG[OperandSize32]);
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AddModRM([modReg, modMem], OperandSize, OPERAND_REG[OperandSize]);
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end;
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procedure AddEw;
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@ -1079,7 +1120,7 @@ var
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procedure AddFv;
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begin
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case OperandSize32 of
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case OperandSize of
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os64: AddOperand('rflags');
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os32: AddOperand('eflags');
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else
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@ -1089,19 +1130,19 @@ var
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procedure AddGb;
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begin
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AddModReg(reg8, rexR in Flags);
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AddModReg(reg8);
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end;
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procedure AddGd;
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begin
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AddModReg(reg32, rexR in Flags);
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AddModReg(reg32);
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end;
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procedure AddGd_q;
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begin
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if flagRex in Flags
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then AddModReg(reg64, rexR in Flags)
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else AddModReg(reg32, rexR in Flags);
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then AddModReg(reg64)
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else AddModReg(reg32);
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end;
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procedure AddGv;
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@ -1111,14 +1152,14 @@ var
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procedure AddGw;
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begin
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AddModReg(reg16, rexR in Flags);
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AddModReg(reg16);
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end;
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procedure AddGz;
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begin
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if OperandSize32 = os16
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then AddModReg(reg16, rexR in Flags)
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else AddModReg(reg32, rexR in Flags);
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if OperandSize = os16
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then AddModReg(reg16)
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else AddModReg(reg32);
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end;
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procedure AddIb;
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@ -1128,7 +1169,7 @@ var
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procedure AddIv;
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begin
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AddOperand('%s', OPERAND_BYTES[OperandSize32], [hvfIncludeHexchar]);
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AddOperand('%s', OPERAND_BYTES[OperandSize], [hvfIncludeHexchar]);
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end;
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procedure AddIw;
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@ -1138,7 +1179,7 @@ var
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procedure AddIz;
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begin
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if OperandSize32 = os16
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if OperandSize = os16
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then AddOperand('%s', os16, 2, [hvfIncludeHexchar])
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else AddOperand('%s', os32, 4, [hvfIncludeHexchar]);
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end;
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@ -1150,19 +1191,19 @@ var
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procedure AddJz;
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begin
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if OperandSize32 = os16
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if OperandSize = os16
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then AddOperand('%s', os16, 2, [hvfSigned, hvfPrefixPositive, hvfIncludeHexchar])
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else AddOperand('%s', os32, 4, [hvfSigned, hvfPrefixPositive, hvfIncludeHexchar]);
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end;
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procedure AddM;
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begin
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AddModRM([modMem], OperandSize32, reg0 {do not care});
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AddModRM([modMem], OperandSize, reg0 {do not care});
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end;
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procedure AddMa;
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begin
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AddModRM([modMem], OperandSize32, reg0 {do not care});
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AddModRM([modMem], OperandSize, reg0 {do not care});
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end;
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procedure AddMb;
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@ -1189,7 +1230,7 @@ var
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procedure AddMp;
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begin
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if OperandSize32 = os16 //XXXX:XXXX
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if OperandSize = os16 //XXXX:XXXX
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then AddModRM([modMem], os32, reg0 {do not care})
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else AddModRM([modMem], os48, reg0 {do not care});
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end;
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@ -1209,7 +1250,7 @@ var
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procedure AddMw_Rv;
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begin
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if Code[ModRMIdx] shr 6 = 3 // mode = 3 -> reg
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then AddModRM([modReg], OperandSize32, OPERAND_REG[OperandSize32])
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then AddModRM([modReg], OperandSize, OPERAND_REG[OperandSize])
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else AddModRM([modMem], os16, reg0 {do not care});
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end;
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@ -1232,7 +1273,7 @@ var
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procedure AddPq;
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begin
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AddModReg(regMmx, False);
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AddModReg(regMmx);
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end;
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procedure AddPRq;
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@ -1259,7 +1300,7 @@ var
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procedure AddSw;
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begin
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AddModReg(regSegment, False);
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AddModReg(regSegment);
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end;
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procedure AddVd_q;
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@ -1415,12 +1456,12 @@ var
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procedure AddMem14_28Env;
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begin
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AddModRM([modMem], OperandSize32, reg0 {do not care});
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AddModRM([modMem], OperandSize, reg0 {do not care});
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end;
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procedure AddMem98_108Env;
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begin
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AddModRM([modMem], OperandSize32, reg0 {do not care});
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AddModRM([modMem], OperandSize, reg0 {do not care});
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end;
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procedure AddMem16;
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@ -1817,11 +1858,11 @@ var
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case Index of
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0: begin AddEv; Opcode := OPinc; end;
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1: begin AddEv; Opcode := OPdec; end;
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2: begin AddEv; Opcode := OPcall; end;
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2: begin Force64; AddEv; Opcode := OPcall; end;
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3: begin AddMp; Opcode := OPcall; end;
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4: begin AddEv; Opcode := OPjmp; end;
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4: begin Force64; AddEv; Opcode := OPjmp; end;
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5: begin AddMp; Opcode := OPjmp; end;
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6: begin AddEv; Opcode := OPpush; end;
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6: begin Default64; AddEv; Opcode := OPpush; end;
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else
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Opcode := OPX_Group5;
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end;
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@ -1941,7 +1982,7 @@ var
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Index := (Code[ModRMIdx] shr 3) and 7;
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if Index = 1
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then begin
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if OperandSize32 = os64
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if OperandSize = os64
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then begin
|
||||
Opcode := OPcmpxchg16b;
|
||||
AddMdq;
|
||||
@ -2619,6 +2660,7 @@ var
|
||||
end;
|
||||
//---
|
||||
$80..$8F: begin
|
||||
Force64;
|
||||
Opcode := OPj__; StdCond(Code[CodeIdx]);
|
||||
AddJz;
|
||||
end;
|
||||
@ -2629,10 +2671,12 @@ var
|
||||
end;
|
||||
//---
|
||||
$A0: begin
|
||||
Default64;
|
||||
Opcode := OPpush;
|
||||
AddOperand('fs');
|
||||
end;
|
||||
$A1: begin
|
||||
Default64;
|
||||
Opcode := OPpop;
|
||||
AddOperand('fs');
|
||||
end;
|
||||
@ -2654,10 +2698,12 @@ var
|
||||
end;
|
||||
// $A6..$A7: OPX_Invalid
|
||||
$A8: begin
|
||||
Default64;
|
||||
Opcode := OPpush;
|
||||
AddOperand('gs');
|
||||
end;
|
||||
$A9: begin
|
||||
Default64;
|
||||
Opcode := OPpop;
|
||||
AddOperand('gs');
|
||||
end;
|
||||
@ -2903,8 +2949,6 @@ var
|
||||
end;
|
||||
|
||||
procedure DoDisassemble;
|
||||
const
|
||||
OPDEFTYPE_PUSH: array [TFPDMode] {dm32, dm64} of TOperandDefaultType = (v_16_32, vq_64_16);
|
||||
begin
|
||||
Opcode := OPX_InternalUnknown;
|
||||
repeat
|
||||
@ -3020,22 +3064,24 @@ var
|
||||
end;
|
||||
//---
|
||||
$50..$57: begin
|
||||
Default64;
|
||||
Opcode := OPpush;
|
||||
AddStdReg(Code[CodeIdx], OPDEFTYPE_PUSH[FProcess.Mode]);
|
||||
AddStdReg(Code[CodeIdx]);
|
||||
end;
|
||||
$58..$5F: begin
|
||||
Default64;
|
||||
Opcode := OPpop;
|
||||
AddStdReg(Code[CodeIdx], OPDEFTYPE_PUSH[FProcess.Mode]);
|
||||
AddStdReg(Code[CodeIdx]);
|
||||
end;
|
||||
//---
|
||||
$60: begin
|
||||
if OperandSize32 = os16
|
||||
if OperandSize = os16
|
||||
then Opcode := OPpusha
|
||||
else Opcode := OPpushad;
|
||||
Check32;
|
||||
end;
|
||||
$61: begin
|
||||
if OperandSize32 = os16
|
||||
if OperandSize = os16
|
||||
then Opcode := OPpopa
|
||||
else Opcode := OPpopad;
|
||||
Check32;
|
||||
@ -3068,6 +3114,7 @@ var
|
||||
Include(FLags, preAdr);
|
||||
end;
|
||||
$68: begin
|
||||
Default64;
|
||||
Opcode := OPpush;
|
||||
AddIz;
|
||||
end;
|
||||
@ -3076,6 +3123,7 @@ var
|
||||
AddGv; AddEv; AddIz;
|
||||
end;
|
||||
$6A: begin
|
||||
Default64;
|
||||
Opcode := OPpush;
|
||||
AddIb;
|
||||
end;
|
||||
@ -3091,7 +3139,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$6D: begin
|
||||
if OperandSize32 = os16
|
||||
if OperandSize = os16
|
||||
then Opcode := OPinsw
|
||||
else Opcode := OPinsd;
|
||||
CheckRepeat;
|
||||
@ -3108,7 +3156,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$6F: begin
|
||||
if OperandSize32 = os16
|
||||
if OperandSize = os16
|
||||
then Opcode := OPoutsw
|
||||
else Opcode := OPoutsd;
|
||||
CheckRepeat;
|
||||
@ -3118,6 +3166,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$70..$7F: begin
|
||||
Force64;
|
||||
Opcode := OPj__; StdCond(Code[CodeIdx]);
|
||||
AddJb;
|
||||
end;
|
||||
@ -3158,11 +3207,12 @@ var
|
||||
AddSw; AddEw;
|
||||
end;
|
||||
$8F: begin
|
||||
Default64;
|
||||
DoGroup1;
|
||||
end;
|
||||
//---
|
||||
$90..$97: begin
|
||||
if (Code[CodeIdx] = $90) and not (rexR in Flags)
|
||||
if (Code[CodeIdx] = $90) and not (rexB in Flags)
|
||||
then Opcode := OPnop
|
||||
else begin
|
||||
Opcode := OPxchg;
|
||||
@ -3171,7 +3221,7 @@ var
|
||||
end;
|
||||
end;
|
||||
$98: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPcdqe;
|
||||
os32: Opcode := OPcwde;
|
||||
else
|
||||
@ -3179,7 +3229,7 @@ var
|
||||
end;
|
||||
end;
|
||||
$99: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPcqo;
|
||||
os32: Opcode := OPcqd;
|
||||
else
|
||||
@ -3194,7 +3244,8 @@ var
|
||||
Opcode := OPwait_fwait;
|
||||
end;
|
||||
$9C: begin
|
||||
case OperandSize32 of
|
||||
Default64;
|
||||
case OperandSize of
|
||||
os64: Opcode := OPpushfq;
|
||||
os32: Opcode := OPpushfd;
|
||||
else
|
||||
@ -3203,7 +3254,8 @@ var
|
||||
AddFv;
|
||||
end;
|
||||
$9D: begin
|
||||
case OperandSize32 of
|
||||
Default64;
|
||||
case OperandSize of
|
||||
os64: Opcode := OPpopfq;
|
||||
os32: Opcode := OPpopfd;
|
||||
else
|
||||
@ -3245,7 +3297,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$A5: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPmovsq;
|
||||
os32: Opcode := OPmovsd;
|
||||
else
|
||||
@ -3263,7 +3315,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$A7: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPcmpsq;
|
||||
os32: Opcode := OPcmpsd;
|
||||
else
|
||||
@ -3292,7 +3344,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$AB: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPstosq;
|
||||
os32: Opcode := OPstosd;
|
||||
else
|
||||
@ -3312,7 +3364,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$AD: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPlodsq;
|
||||
os32: Opcode := OPlodsd;
|
||||
else
|
||||
@ -3332,7 +3384,7 @@ var
|
||||
{$endif}
|
||||
end;
|
||||
$AF: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPscasq;
|
||||
os32: Opcode := OPscasd;
|
||||
else
|
||||
@ -3347,7 +3399,7 @@ var
|
||||
//---
|
||||
$B0..$B7: begin
|
||||
Opcode := OPmov;
|
||||
AddStdReg(Code[CodeIdx], reg8, rexR in Flags);
|
||||
AddStdReg(Code[CodeIdx], reg8);
|
||||
AddIb;
|
||||
end;
|
||||
$B8..$BF: begin
|
||||
@ -3360,10 +3412,12 @@ var
|
||||
DoGroup2;
|
||||
end;
|
||||
$C2: begin
|
||||
Force64;
|
||||
Opcode := OPret;
|
||||
AddIw;
|
||||
end;
|
||||
$C3: begin
|
||||
Force64;
|
||||
Opcode := OPret;
|
||||
end;
|
||||
$C4: begin
|
||||
@ -3382,6 +3436,7 @@ var
|
||||
AddIw; AddIb;
|
||||
end;
|
||||
$C9: begin
|
||||
Default64;
|
||||
Opcode := OPleave;
|
||||
end;
|
||||
$CA: begin
|
||||
@ -3402,7 +3457,7 @@ var
|
||||
Opcode := OPint0; Check32;
|
||||
end;
|
||||
$CF: begin
|
||||
case OperandSize32 of
|
||||
case OperandSize of
|
||||
os64: Opcode := OPiretq;
|
||||
os32: Opcode := OPiretd;
|
||||
else
|
||||
@ -3430,18 +3485,22 @@ var
|
||||
end;
|
||||
//---
|
||||
$E0: begin
|
||||
Force64;
|
||||
Opcode := OPloopne;
|
||||
AddJb;
|
||||
end;
|
||||
$E1: begin
|
||||
Force64;
|
||||
Opcode := OPloope;
|
||||
AddJb;
|
||||
end;
|
||||
$E2: begin
|
||||
Force64;
|
||||
Opcode := OPloop;
|
||||
AddJb;
|
||||
end;
|
||||
$E3: begin
|
||||
Force64;
|
||||
Opcode := OPjrcxz;
|
||||
AddJb;
|
||||
end;
|
||||
@ -3466,10 +3525,12 @@ var
|
||||
AddOperand(SizeReg32('ax'));
|
||||
end;
|
||||
$E8: begin
|
||||
Force64;
|
||||
Opcode := OPcall;
|
||||
AddJz;
|
||||
end;
|
||||
$E9: begin
|
||||
Force64;
|
||||
Opcode := OPjmp;
|
||||
AddJz;
|
||||
end;
|
||||
@ -3478,6 +3539,7 @@ var
|
||||
AddAp;
|
||||
end;
|
||||
$EB: begin
|
||||
Force64;
|
||||
Opcode := OPjmp;
|
||||
AddJb;
|
||||
end;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user