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FpDebug: fix disassembler "xadd 16bit reg" Issue #40520 patch by Red_prig (Pavel)

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Martin 2023-09-26 09:03:35 +02:00
parent 00e6d8fbd8
commit 4cd413a986
2 changed files with 10 additions and 2 deletions
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6
components/fpdebug/fpdbgdisasx86.pp
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@ -3474,8 +3474,10 @@ begin
end; end;
$C1: begin $C1: begin
DecodeSIMD([soNone]); DecodeSIMD([soNone]);
if SimdOpcode = soNone case SimdOpcode of
then begin SetOpcode(OPxadd); AddEv; AddGv; CheckLock; end; soNone: begin SetOpcode(OPxadd); AddEv; AddGv; CheckLock; end;
so66: begin SetOpcode(OPxadd); AddEw; AddGw; CheckLock; end;
end;
end; end;
$C2: begin $C2: begin
DecodeSIMD; DecodeSIMD;

6
components/lazdebuggers/lazdebuggerfp/test/testasm.pas
View File

@ -233,6 +233,9 @@ begin
TestDis('add [esi*4+edx+$123456],eax', #$67#$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],eax'); TestDis('add [esi*4+edx+$123456],eax', #$67#$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],eax');
TestDis('add [esi*4+edx+$123456],rax', #$67#$48#$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],rax'); TestDis('add [esi*4+edx+$123456],rax', #$67#$48#$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],rax');
TestDis('xadd [rdi],ax', #$66#$0f#$c1#$07, 'xadd [rdi],ax');
TestDis('lock xadd [rdi],ax', #$f0#$66#$0f#$c1#$07, 'lock xadd [rdi],ax');
TestDis('mov [$0000001a],al ', #$a2#$1a#$00#$00#$00#$00#$00#$00#$00, 'mov [$0000001a],al'); TestDis('mov [$0000001a],al ', #$a2#$1a#$00#$00#$00#$00#$00#$00#$00, 'mov [$0000001a],al');
TestDis('mov [$0000001a],ax ', #$66#$a3#$1a#$00#$00#$00#$00#$00#$00#$00, 'mov [$0000001a],ax'); TestDis('mov [$0000001a],ax ', #$66#$a3#$1a#$00#$00#$00#$00#$00#$00#$00, 'mov [$0000001a],ax');
TestDis('mov [$0000001a],eax', #$a3#$1a#$00#$00#$00#$00#$00#$00#$00, 'mov [$0000001a],eax'); TestDis('mov [$0000001a],eax', #$a3#$1a#$00#$00#$00#$00#$00#$00#$00, 'mov [$0000001a],eax');
@ -331,6 +334,9 @@ begin
TestDis('add [esi*4+edx+$123456],ax', #$66#$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],ax'); TestDis('add [esi*4+edx+$123456],ax', #$66#$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],ax');
TestDis('add [esi*4+edx+$123456],eax', #$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],eax'); TestDis('add [esi*4+edx+$123456],eax', #$01#$84#$b2#$56#$34#$12#$00, 'add [esi*4+edx+$123456],eax');
TestDis('xadd [edi],ax', #$66#$0f#$c1#$07, 'xadd [edi],ax');
TestDis('lock xadd [edi],ax', #$f0#$66#$0f#$c1#$07, 'lock xadd [edi],ax');
TestDis('mov [$0000001a],al ', #$a2#$1a#$00#$00#$00, 'mov [$0000001a],al'); TestDis('mov [$0000001a],al ', #$a2#$1a#$00#$00#$00, 'mov [$0000001a],al');
TestDis('mov [$0000001a],ax ', #$66#$a3#$1a#$00#$00#$00, 'mov [$0000001a],ax'); TestDis('mov [$0000001a],ax ', #$66#$a3#$1a#$00#$00#$00, 'mov [$0000001a],ax');
TestDis('mov [$0000001a],eax', #$a3#$1a#$00#$00#$00, 'mov [$0000001a],eax'); TestDis('mov [$0000001a],eax', #$a3#$1a#$00#$00#$00, 'mov [$0000001a],eax');