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FpDebug: fix disassembler vmov.. Issue #40552 patch by Red_prig (Pavel)

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This commit is contained in:
Martin 2023-10-13 20:28:50 +02:00
parent 9cff61c5a0
commit 62e7f5665a
2 changed files with 42 additions and 4 deletions
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28
components/fpdebug/fpdbgdisasx86.pp
View File

@ -2903,8 +2903,18 @@ begin
case SimdOpcode of
soNone: begin SetOpcode(OPmovu, OPSx_ps, True); AddVps; AddWps; end;
so66: begin SetOpcode(OPmovu, OPSx_pd, True); AddVpd; AddWpd; end;
soF2: begin SetOpcode(OPmov, OPSx_sd, True); AddVx; AddHx; AddWsd; end;
soF3: begin SetOpcode(OPmov, OPSx_ss, True); AddVx; AddHx; AddWss; end;
soF2: begin
DecodeModRM;
if ModRM.Mode = 3
then begin SetOpcode(OPmov, OPSx_sd, True); AddVx; AddHx; AddWsd; end
else begin SetOpcode(OPmov, OPSx_sd, True); AddVx; AddWsd; end;
end;
soF3: begin
DecodeModRM;
if ModRM.Mode = 3
then begin SetOpcode(OPmov, OPSx_ss, True); AddVx; AddHx; AddWss; end
else begin SetOpcode(OPmov, OPSx_ss, True); AddVx; AddWss; end;
end;
end;
end;
$11: begin
@ -2912,8 +2922,18 @@ begin
case SimdOpcode of
soNone: begin SetOpcode(OPmovu, OPSx_ps, True); AddWps; AddVps; end;
so66: begin SetOpcode(OPmovu, OPSx_pd, True); AddWpd; AddVpd; end;
soF2: begin SetOpcode(OPmov, OPSx_sd, True); AddWsd; AddHx; AddVsd; end;
soF3: begin SetOpcode(OPmov, OPSx_ss, True); AddWss; AddHx; AddVss; end;
soF2: begin
DecodeModRM;
if ModRM.Mode = 3
then begin SetOpcode(OPmov, OPSx_sd, True); AddWsd; AddHx; AddVsd; end
else begin SetOpcode(OPmov, OPSx_sd, True); AddWsd; AddVsd; end;
end;
soF3: begin
DecodeModRM;
if ModRM.Mode = 3
then begin SetOpcode(OPmov, OPSx_ss, True); AddWss; AddHx; AddVss; end
else begin SetOpcode(OPmov, OPSx_ss, True); AddWss; AddVss; end;
end;
end;
end;
$12: begin

18
components/lazdebuggers/lazdebuggerfp/test/testasm.pas
View File

@ -248,6 +248,19 @@ begin
TestDis('vroundsd xmm1,xmm2,xmm3,$07', #$C4#$E3#$69#$0B#$CB#$07, 'vroundsd xmm1,xmm2,xmm3,$07');
TestDis('vroundss xmm1,xmm2,xmm3,$07', #$C4#$E3#$69#$0A#$CB#$07, 'vroundss xmm1,xmm2,xmm3,$07');
TestDis('vmovss xmm1,dword ptr [rsi]', #$C5#$FA#$10#$0E, 'vmovss xmm1,dword ptr [rsi]');
TestDis('vmovss [rsi],xmm1', #$C5#$FA#$11#$0E, 'vmovss [rsi],xmm1');
TestDis('vmovsd xmm1,qword ptr [rsi]', #$C5#$FB#$10#$0E, 'vmovsd xmm1,qword ptr [rsi]');
TestDis('vmovsd [rsi],xmm1', #$C5#$FB#$11#$0E, 'vmovsd [rsi],xmm1');
TestDis('vmovss xmm1,xmm2,xmm3', #$C5#$EA#$10#$CB, 'vmovss xmm1,xmm2,xmm3');
TestDis('vmovss xmm1,xmm2,xmm3', #$C5#$EA#$10#$CB, 'vmovss xmm1,xmm2,xmm3');
TestDis('vmovsd xmm1,xmm2,xmm3', #$C5#$EB#$10#$CB, 'vmovsd xmm1,xmm2,xmm3');
TestDis('vmovsd xmm1,xmm2,xmm3', #$C5#$EB#$10#$CB, 'vmovsd xmm1,xmm2,xmm3');
TestDis('movd mm1,edi', #$0F#$6E#$CF, 'movd mm1,edi');
TestDis('movq mm1,rdi', #$48#$0F#$6E#$CF, 'movq mm1,rdi');
TestDis('movd edi,mm1', #$0F#$7E#$CF, 'movd edi,mm1');
@ -372,6 +385,11 @@ begin
TestDis('vroundsd xmm1,xmm2,xmm3,$07', #$C4#$E3#$69#$0B#$CB#$07, 'vroundsd xmm1,xmm2,xmm3,$07');
TestDis('vroundss xmm1,xmm2,xmm3,$07', #$C4#$E3#$69#$0A#$CB#$07, 'vroundss xmm1,xmm2,xmm3,$07');
TestDis('vmovss xmm1,xmm2,xmm3', #$C5#$EA#$10#$CB, 'vmovss xmm1,xmm2,xmm3');
TestDis('vmovss xmm1,xmm2,xmm3', #$C5#$EA#$10#$CB, 'vmovss xmm1,xmm2,xmm3');
TestDis('vmovsd xmm1,xmm2,xmm3', #$C5#$EB#$10#$CB, 'vmovsd xmm1,xmm2,xmm3');
TestDis('vmovsd xmm1,xmm2,xmm3', #$C5#$EB#$10#$CB, 'vmovsd xmm1,xmm2,xmm3');
TestDis('movd mm1,edi', #$0F#$6E#$CF, 'movd mm1,edi');
TestDis('movd edi,mm1', #$0F#$7E#$CF, 'movd edi,mm1');
TestDis('movd xmm1,edi', #$66#$0F#$6E#$CF, 'movd xmm1,edi');