mirror of
https://gitlab.com/freepascal.org/lazarus/lazarus.git
synced 2025-04-09 10:47:58 +02:00
FpDebug: x86-disassembler: fix pextr/vpextr Issue #40842
(cherry picked from commit 0ad56931a0
)
This commit is contained in:
parent
225e15c69d
commit
6fc81bcc83
@ -403,6 +403,7 @@ type
|
||||
procedure AddQq;
|
||||
procedure AddRd;
|
||||
procedure AddRd_Mb;
|
||||
procedure AddRd_Mw;
|
||||
procedure AddRd_q;
|
||||
procedure AddRy;
|
||||
procedure AddRy_Mb;
|
||||
@ -1645,11 +1646,22 @@ end;
|
||||
|
||||
procedure TX86Disassembler.AddRd_Mb;
|
||||
begin
|
||||
DecodeModRM;
|
||||
|
||||
if ModRM.Mode = 3 // reg
|
||||
then AddModRM([modReg], os32, regGeneral)
|
||||
else AddModRM([modMem], os8, regNone);
|
||||
end;
|
||||
|
||||
procedure TX86Disassembler.AddRd_Mw;
|
||||
begin
|
||||
DecodeModRM;
|
||||
|
||||
if ModRM.Mode = 3 // reg
|
||||
then AddModRM([modReg], os32, regGeneral)
|
||||
else AddModRM([modMem], os16, regNone);
|
||||
end;
|
||||
|
||||
procedure TX86Disassembler.AddRd_q;
|
||||
begin
|
||||
AddModRM([modReg], MODE_SIZE[ProcessMode], regGeneral);
|
||||
@ -3897,9 +3909,9 @@ begin
|
||||
$0D: begin SetOpcode(OPblend, OPSx_pd, True); AddVx; AddHx; AddWx; AddIb; end;
|
||||
$0E: begin SetOpcode(OPpblend, OPSx_w, True); AddVx; AddHx; AddWx; AddIb; end;
|
||||
$0F: begin SetOpcode(OPpalignr, OPSnone, True); AddVx; AddHx; AddWx; AddIb; end;
|
||||
$14: begin SetOpcode(OPpextr, OPSx_b, True); AddRd_Mb; AddVqq; AddIb; end;
|
||||
$15: begin SetOpcode(OPpextr, OPSx_w, True); AddRd_Mb; AddVqq; AddIb; end;
|
||||
$16: begin SetOpcode(OPpextr, OPS_d_q, True); AddEy; AddVdq; AddIb; end;
|
||||
$14: begin SetOpcode(OPpextr, OPSx_b, True); AddRd_Mb; AddVq; AddIb; end;
|
||||
$15: begin SetOpcode(OPpextr, OPSx_w, True); AddRd_Mw; AddVq; AddIb; end;
|
||||
$16: begin SetOpcode(OPpextr, OPS_d_q, True); AddEy; AddVq; AddIb; end;
|
||||
$17: begin SetOpcode(OPextract, OPSx_ps, True); AddEd; AddVdq; AddIb; end;
|
||||
$18: begin SetOpcode(OPinsert, OPSx_f128,True); AddVqq; AddHqq; AddWqq; AddIb; CheckVex; end;
|
||||
$19: begin SetOpcode(OPextract, OPSx_f128,True); AddWdq; AddVqq; AddIb; CheckVex; end;
|
||||
|
@ -476,6 +476,26 @@ begin
|
||||
TestDis('lzcnt ecx,[rdx]', #$f3#$0f#$bd#$0a, 'lzcnt ecx,[rdx]');
|
||||
TestDis('lzcnt cx,[rdx]', #$66#$f3#$0f#$bd#$0a, 'lzcnt cx,[rdx]');
|
||||
|
||||
TestDis('pextrw edx,mm1,$2', #$0f#$c5#$d1#$02, 'pextrw edx,mm1,$2');
|
||||
TestDis('pextrw edx,xmm2,$2', #$66#$0f#$c5#$d2#$02, 'pextrw edx,xmm2,$2');
|
||||
TestDis('pextrw edx,xmm2,$2', #$66#$0f#$3a#$15#$d2#$02, 'pextrw edx,xmm2,$2');
|
||||
TestDis('pextrw WORD PTR [rsi-$F],xmm3,$2', #$66#$0f#$3a#$15#$5e#$f1#$02, 'pextrw WORD PTR [rsi-$F],xmm3,$2');
|
||||
TestDis('vpextrw edx,xmm1,$2', #$c5#$f9#$c5#$d1#$02, 'vpextrw edx,xmm1,$2');
|
||||
TestDis('vpextrw WORD PTR [rsi-$F],xmm2,$2', #$c4#$e3#$79#$15#$56#$f1#$02, 'vpextrw WORD PTR [rsi-$F],xmm2,$2');
|
||||
TestDis('pextrb edx,xmm1,$2', #$66#$0f#$3a#$14#$ca#$02, 'pextrb edx,xmm1,$2');
|
||||
TestDis('pextrd edx,xmm2,$2', #$66#$0f#$3a#$16#$d2#$02, 'pextrd edx,xmm2,$2');
|
||||
TestDis('pextrq rdx,xmm3,$2', #$66#$48#$0f#$3a#$16#$da#$02, 'pextrq rdx,xmm3,$2');
|
||||
TestDis('vpextrb edx,xmm1,$2', #$c4#$e3#$79#$14#$ca#$02, 'vpextrb edx,xmm1,$2');
|
||||
TestDis('vpextrd edx,xmm2,$2', #$c4#$e3#$79#$16#$d2#$02, 'vpextrd edx,xmm2,$2');
|
||||
TestDis('vpextrq rdx,xmm3,$2', #$c4#$e3#$f9#$16#$da#$02, 'vpextrq rdx,xmm3,$2');
|
||||
TestDis('pextrb BYTE PTR [rsi-$F],xmm1,$2', #$66#$0f#$3a#$14#$4e#$f1#$02, 'pextrb BYTE PTR [rsi-$F],xmm1,$2');
|
||||
TestDis('pextrd DWORD PTR [rsi-$F],xmm2,$2', #$66#$0f#$3a#$16#$56#$f1#$02, 'pextrd DWORD PTR [rsi-$F],xmm2,$2');
|
||||
TestDis('pextrq QWORD PTR [rsi-$F],xmm3,$2', #$66#$48#$0f#$3a#$16#$5e#$f1#$02, 'pextrq QWORD PTR [rsi-$F],xmm3,$2');
|
||||
TestDis('vpextrb BYTE PTR [rsi-$F],xmm1,$2', #$c4#$e3#$79#$14#$4e#$f1#$02, 'vpextrb BYTE PTR [rsi-$F],xmm1,$2');
|
||||
TestDis('vpextrd DWORD PTR [rsi-$F],xmm2,$2', #$c4#$e3#$79#$16#$56#$f1#$02, 'vpextrd DWORD PTR [rsi-$F],xmm2,$2');
|
||||
TestDis('vpextrq QWORD PTR [rsi-$F],xmm3,$2', #$c4#$e3#$f9#$16#$5e#$f1#$02, 'vpextrq QWORD PTR [rsi-$F],xmm3,$2');
|
||||
|
||||
|
||||
|
||||
Process.NewMode := dm32;
|
||||
|
||||
@ -649,7 +669,6 @@ begin
|
||||
TestDis('vpmovsxdq ymm6,xmm1', #$c4#$e2#$7d#$25#$f1, 'vpmovsxdq ymm6,xmm1');
|
||||
TestDis('vpmovsxdq ymm6,XMMWORD PTR [edi+$3]', #$c4#$e2#$7d#$25#$77#$03, 'vpmovsxdq ymm6,XMMWORD PTR [edi+$3]');
|
||||
|
||||
|
||||
TestDis('vmovss xmm1,xmm2,xmm3', #$C5#$EA#$10#$CB, 'vmovss xmm1,xmm2,xmm3');
|
||||
TestDis('vmovss xmm1,xmm2,xmm3', #$C5#$EA#$10#$CB, 'vmovss xmm1,xmm2,xmm3');
|
||||
TestDis('vmovsd xmm1,xmm2,xmm3', #$C5#$EB#$10#$CB, 'vmovsd xmm1,xmm2,xmm3');
|
||||
@ -777,6 +796,21 @@ begin
|
||||
TestDis('lzcnt ecx,[edx]', #$f3#$0f#$bd#$0a, 'lzcnt ecx,[edx]');
|
||||
TestDis('lzcnt cx,[edx]', #$66#$f3#$0f#$bd#$0a, 'lzcnt cx,[edx]');
|
||||
|
||||
TestDis('pextrw edx,mm1,$2', #$0f#$c5#$d1#$02, 'pextrw edx,mm1,$2');
|
||||
TestDis('pextrw edx,xmm2,$2', #$66#$0f#$c5#$d2#$02, 'pextrw edx,xmm2,$2');
|
||||
TestDis('pextrw edx,xmm2,$2', #$66#$0f#$3a#$15#$d2#$02, 'pextrw edx,xmm2,$2');
|
||||
TestDis('pextrw WORD PTR [esi-$F],xmm3,$2', #$66#$0f#$3a#$15#$5e#$f1#$02, 'pextrw WORD PTR [esi-$F],xmm3,$2');
|
||||
TestDis('vpextrw edx,xmm1,$2', #$c5#$f9#$c5#$d1#$02, 'vpextrw edx,xmm1,$2');
|
||||
TestDis('vpextrw WORD PTR [esi-$F],xmm2,$2', #$c4#$e3#$79#$15#$56#$f1#$02, 'vpextrw WORD PTR [esi-$F],xmm2,$2');
|
||||
TestDis('pextrb edx,xmm1,$2', #$66#$0f#$3a#$14#$ca#$02, 'pextrb edx,xmm1,$2');
|
||||
TestDis('pextrd edx,xmm2,$2', #$66#$0f#$3a#$16#$d2#$02, 'pextrd edx,xmm2,$2');
|
||||
TestDis('vpextrb edx,xmm1,$2', #$c4#$e3#$79#$14#$ca#$02, 'vpextrb edx,xmm1,$2');
|
||||
TestDis('vpextrd edx,xmm2,$2', #$c4#$e3#$79#$16#$d2#$02, 'vpextrd edx,xmm2,$2');
|
||||
TestDis('pextrb BYTE PTR [esi-$F],xmm1,$2', #$66#$0f#$3a#$14#$4e#$f1#$02, 'pextrb BYTE PTR [esi-$F],xmm1,$2');
|
||||
TestDis('pextrd DWORD PTR [esi-$F],xmm2,$2', #$66#$0f#$3a#$16#$56#$f1#$02, 'pextrd DWORD PTR [esi-$F],xmm2,$2');
|
||||
TestDis('vpextrb BYTE PTR [esi-$F],xmm1,$2', #$c4#$e3#$79#$14#$4e#$f1#$02, 'vpextrb BYTE PTR [esi-$F],xmm1,$2');
|
||||
TestDis('vpextrd DWORD PTR [esi-$F],xmm2,$2', #$c4#$e3#$79#$16#$56#$f1#$02, 'vpextrd DWORD PTR [esi-$F],xmm2,$2');
|
||||
|
||||
|
||||
Process.NewMode := dm64;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user