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GdbmiDebugger: replace index for TargetRegisters with Enum

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git-svn-id: trunk@61551 -
This commit is contained in:
martin 2019-07-09 12:25:53 +00:00
parent d863ee5f46
commit 9be3a4b216
1 changed files with 47 additions and 43 deletions
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90
components/lazdebuggergdbmi/gdbmidebugger.pp
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@ -116,13 +116,14 @@ type
dfSetBreakPending dfSetBreakPending
); );
TTargetRegisterIdent = (r0, r1, r2);
// Target info // Target info
TGDBMITargetInfo = record TGDBMITargetInfo = record
TargetPID: Integer; TargetPID: Integer;
TargetFlags: TGDBMITargetFlags; TargetFlags: TGDBMITargetFlags;
TargetCPU: String; TargetCPU: String;
TargetOS: (osUnknown, osWindows); // osUnix or osLinux, osMac TargetOS: (osUnknown, osWindows); // osUnix or osLinux, osMac
TargetRegisters: array[0..2] of String; TargetRegisters: array[TTargetRegisterIdent] of String;
TargetPtrSize: Byte; // size in bytes TargetPtrSize: Byte; // size in bytes
TargetIsBE: Boolean; TargetIsBE: Boolean;
end; end;
@ -2440,6 +2441,7 @@ end;
procedure TGDBMIDebuggerCommandStartBase.SetTargetInfo(const AFileType: String); procedure TGDBMIDebuggerCommandStartBase.SetTargetInfo(const AFileType: String);
var var
FoundPtrSize, UseWin64ABI: Boolean; FoundPtrSize, UseWin64ABI: Boolean;
r: TTargetRegisterIdent;
begin begin
UseWin64ABI := False; UseWin64ABI := False;
// assume some defaults // assume some defaults
@ -2522,33 +2524,35 @@ begin
if not FoundPtrSize if not FoundPtrSize
then TargetInfo^.TargetPtrSize := CpuNameToPtrSize(TargetInfo^.TargetCPU); then TargetInfo^.TargetPtrSize := CpuNameToPtrSize(TargetInfo^.TargetCPU);
for r := low(TTargetRegisterIdent) to high(TTargetRegisterIdent) do
TargetInfo^.TargetRegisters[r] := '';
case StringCase(TargetInfo^.TargetCPU, [ case StringCase(TargetInfo^.TargetCPU, [
'x86', 'i386', 'i486', 'i586', 'i686', 'x86', 'i386', 'i486', 'i586', 'i686',
'ia64', 'x86_64', 'powerpc', 'powerpc64', 'ia64', 'x86_64', 'powerpc', 'powerpc64',
'sparc', 'arm', 'aarch64', 'avr' 'sparc', 'arm', 'aarch64', 'avr'
], True, False) of ], True, False) of
0..4: begin // x86 0..4: begin // x86
TargetInfo^.TargetRegisters[0] := '$eax'; TargetInfo^.TargetRegisters[r0] := '$eax';
TargetInfo^.TargetRegisters[1] := '$edx'; TargetInfo^.TargetRegisters[r1] := '$edx';
TargetInfo^.TargetRegisters[2] := '$ecx'; TargetInfo^.TargetRegisters[r2] := '$ecx';
end; end;
5, 6: begin // ia64, x86_64 5, 6: begin // ia64, x86_64
if TargetInfo^.TargetPtrSize = 4 if TargetInfo^.TargetPtrSize = 4
then begin then begin
TargetInfo^.TargetRegisters[0] := '$eax'; TargetInfo^.TargetRegisters[r0] := '$eax';
TargetInfo^.TargetRegisters[1] := '$edx'; TargetInfo^.TargetRegisters[r1] := '$edx';
TargetInfo^.TargetRegisters[2] := '$ecx'; TargetInfo^.TargetRegisters[r2] := '$ecx';
end end
else if UseWin64ABI else if UseWin64ABI
then begin then begin
TargetInfo^.TargetRegisters[0] := '$rcx'; TargetInfo^.TargetRegisters[r0] := '$rcx';
TargetInfo^.TargetRegisters[1] := '$rdx'; TargetInfo^.TargetRegisters[r1] := '$rdx';
TargetInfo^.TargetRegisters[2] := '$r8'; TargetInfo^.TargetRegisters[r2] := '$r8';
end else end else
begin begin
TargetInfo^.TargetRegisters[0] := '$rdi'; TargetInfo^.TargetRegisters[r0] := '$rdi';
TargetInfo^.TargetRegisters[1] := '$rsi'; TargetInfo^.TargetRegisters[r1] := '$rsi';
TargetInfo^.TargetRegisters[2] := '$rdx'; TargetInfo^.TargetRegisters[r2] := '$rdx';
end; end;
end; end;
7, 8: begin // powerpc,powerpc64 7, 8: begin // powerpc,powerpc64
@ -2556,44 +2560,44 @@ begin
// alltough darwin can start with r2, it seems that all OS start with r3 // alltough darwin can start with r2, it seems that all OS start with r3
// if UpperCase(FTargetInfo.TargetOS) = 'DARWIN' // if UpperCase(FTargetInfo.TargetOS) = 'DARWIN'
// then begin // then begin
// FTargetInfo.TargetRegisters[0] := '$r2'; // FTargetInfo.TargetRegisters[r0] := '$r2';
// FTargetInfo.TargetRegisters[1] := '$r3'; // FTargetInfo.TargetRegisters[r1] := '$r3';
// FTargetInfo.TargetRegisters[2] := '$r4'; // FTargetInfo.TargetRegisters[r2] := '$r4';
// end // end
// else begin // else begin
TargetInfo^.TargetRegisters[0] := '$r3'; TargetInfo^.TargetRegisters[r0] := '$r3';
TargetInfo^.TargetRegisters[1] := '$r4'; TargetInfo^.TargetRegisters[r1] := '$r4';
TargetInfo^.TargetRegisters[2] := '$r5'; TargetInfo^.TargetRegisters[r2] := '$r5';
// end; // end;
end; end;
9: begin // sparc 9: begin // sparc
TargetInfo^.TargetIsBE := True; TargetInfo^.TargetIsBE := True;
TargetInfo^.TargetRegisters[0] := '$g1'; TargetInfo^.TargetRegisters[r0] := '$g1';
TargetInfo^.TargetRegisters[1] := '$o0'; TargetInfo^.TargetRegisters[r1] := '$o0';
TargetInfo^.TargetRegisters[2] := '$o1'; TargetInfo^.TargetRegisters[r2] := '$o1';
end; end;
10: begin // arm 10: begin // arm
TargetInfo^.TargetRegisters[0] := '$r0'; TargetInfo^.TargetRegisters[r0] := '$r0';
TargetInfo^.TargetRegisters[1] := '$r1'; TargetInfo^.TargetRegisters[r1] := '$r1';
TargetInfo^.TargetRegisters[2] := '$r2'; TargetInfo^.TargetRegisters[r2] := '$r2';
end; end;
11: begin // aarch64 11: begin // aarch64
//TargetInfo^.TargetRegisters[0] := '$r0'; //TargetInfo^.TargetRegisters[r0] := '$r0';
//TargetInfo^.TargetRegisters[1] := '$r1'; //TargetInfo^.TargetRegisters[r1] := '$r1';
//TargetInfo^.TargetRegisters[2] := '$r2'; //TargetInfo^.TargetRegisters[r2] := '$r2';
TargetInfo^.TargetRegisters[0] := '$x0'; TargetInfo^.TargetRegisters[r0] := '$x0';
TargetInfo^.TargetRegisters[1] := '$x1'; TargetInfo^.TargetRegisters[r1] := '$x1';
TargetInfo^.TargetRegisters[2] := '$x2'; TargetInfo^.TargetRegisters[r2] := '$x2';
end; end;
12: begin // avr 12: begin // avr
TargetInfo^.TargetRegisters[0] := '$r0'; TargetInfo^.TargetRegisters[r0] := '$r0';
TargetInfo^.TargetRegisters[1] := '$r1'; TargetInfo^.TargetRegisters[r1] := '$r1';
TargetInfo^.TargetRegisters[2] := '$r2'; TargetInfo^.TargetRegisters[r2] := '$r2';
end; end;
else else
TargetInfo^.TargetRegisters[0] := ''; TargetInfo^.TargetRegisters[r0] := '';
TargetInfo^.TargetRegisters[1] := ''; TargetInfo^.TargetRegisters[r1] := '';
TargetInfo^.TargetRegisters[2] := ''; TargetInfo^.TargetRegisters[r2] := '';
DebugLn(DBG_WARNINGS, '[WARNING] [Debugger] Unknown target CPU: ', TargetInfo^.TargetCPU); DebugLn(DBG_WARNINGS, '[WARNING] [Debugger] Unknown target CPU: ', TargetInfo^.TargetCPU);
end; end;
end; end;
@ -5728,8 +5732,8 @@ function TGDBMIDebuggerCommandExecute.ProcessStopped(const AParams: String;
// Get the frame and addr info from the call-params // Get the frame and addr info from the call-params
if tfRTLUsesRegCall in TargetInfo^.TargetFlags if tfRTLUsesRegCall in TargetInfo^.TargetFlags
then begin then begin
Result.Address := GetPtrValue(TargetInfo^.TargetRegisters[1], []); Result.Address := GetPtrValue(TargetInfo^.TargetRegisters[r1], []);
FP := GetPtrValue(TargetInfo^.TargetRegisters[2], []); FP := GetPtrValue(TargetInfo^.TargetRegisters[r2], []);
end else begin end else begin
Result.Address := GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 3]); Result.Address := GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 3]);
FP := GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 4]); FP := GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 4]);
@ -5788,7 +5792,7 @@ function TGDBMIDebuggerCommandExecute.ProcessStopped(const AParams: String;
FTheDebugger.QueueExecuteLock; FTheDebugger.QueueExecuteLock;
try try
if tfRTLUsesRegCall in TargetInfo^.TargetFlags if tfRTLUsesRegCall in TargetInfo^.TargetFlags
then Result.ObjAddr := TargetInfo^.TargetRegisters[0] then Result.ObjAddr := TargetInfo^.TargetRegisters[r0]
else begin else begin
if dfImplicidTypes in FTheDebugger.DebuggerFlags if dfImplicidTypes in FTheDebugger.DebuggerFlags
then Result.ObjAddr := Format('^%s($fp+%d)^', [PointerTypeCast, TargetInfo^.TargetPtrSize * 2]) then Result.ObjAddr := Format('^%s($fp+%d)^', [PointerTypeCast, TargetInfo^.TargetPtrSize * 2])
@ -5883,7 +5887,7 @@ function TGDBMIDebuggerCommandExecute.ProcessStopped(const AParams: String;
FTheDebugger.QueueExecuteLock; FTheDebugger.QueueExecuteLock;
try try
if tfRTLUsesRegCall in TargetInfo^.TargetFlags if tfRTLUsesRegCall in TargetInfo^.TargetFlags
then ErrorNo := GetIntValue(TargetInfo^.TargetRegisters[0], []) then ErrorNo := GetIntValue(TargetInfo^.TargetRegisters[r0], [])
else ErrorNo := Integer(GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 2])); else ErrorNo := Integer(GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 2]));
ErrorNo := ErrorNo and $FFFF; ErrorNo := ErrorNo and $FFFF;
@ -5923,7 +5927,7 @@ function TGDBMIDebuggerCommandExecute.ProcessStopped(const AParams: String;
FTheDebugger.QueueExecuteLock; FTheDebugger.QueueExecuteLock;
try try
if tfRTLUsesRegCall in TargetInfo^.TargetFlags if tfRTLUsesRegCall in TargetInfo^.TargetFlags
then ErrorNo := GetIntValue(TargetInfo^.TargetRegisters[0], []) then ErrorNo := GetIntValue(TargetInfo^.TargetRegisters[r0], [])
else ErrorNo := Integer(GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 2])); else ErrorNo := Integer(GetData('$fp+%d', [TargetInfo^.TargetPtrSize * 2]));
ErrorNo := ErrorNo and $FFFF; ErrorNo := ErrorNo and $FFFF;
@ -6622,7 +6626,7 @@ var
// RtlUnwind, set a breakpoint at next except handler (instead of srPopExceptStack/srCatches) // RtlUnwind, set a breakpoint at next except handler (instead of srPopExceptStack/srCatches)
if FTheDebugger.FStoppedReason = srRtlUnwind then begin if FTheDebugger.FStoppedReason = srRtlUnwind then begin
Address := GetPtrValue(TargetInfo^.TargetRegisters[1], []); Address := GetPtrValue(TargetInfo^.TargetRegisters[r1], []);
if Address <> 0 then if Address <> 0 then
FTheDebugger.FSehRaiseBreaks.AddAddr(Self, Address); FTheDebugger.FSehRaiseBreaks.AddAddr(Self, Address);
FCurrentExecCmd := ectContinue; FCurrentExecCmd := ectContinue;