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FpDebug: Disassemble, fixed 64bit register for push/pop Issue #0038626

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git-svn-id: trunk@64991 -
This commit is contained in:
martin 2021-04-14 14:34:59 +00:00
parent 776651b5e3
commit ee40b8f4c1
1 changed files with 29 additions and 5 deletions
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34
components/fpdebug/fpdbgdisasx86.pp
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@ -56,10 +56,20 @@ uses
type
TFlag = (flagRex, flagSib, flagModRM, rexB, rexX, rexR, rexW, preOpr, preAdr, preLock, preRep{N}, preRepNE);
TFlag = (
flagRex, // $4x: set for any $4X
flagSib, flagModRM,
rexB, rexX, rexR,
rexW, // $4x bit 4: 64 Bit Operand Size
preOpr, // $66: Precision-size override prefix (32 and 64 bit)
preAdr, preLock, preRep{N}, preRepNE);
TFlags = set of TFlag;
// Keep 8,16,32,64 together
TOperandDefaultType = (
v_16_32,
vq_64_16
);
TOperandSize = (os8, os16, os32, os64, os48, os80, os128);
TAddressSize = (as16, as32, as64);
TRegisterType = (reg0, reg8, reg16, reg32, reg64, regMmx, regXmm, regSegment, regControl, regDebug, regX87);
@ -721,6 +731,14 @@ var
end;
end;
function OperandSize64_16: TOperandSize;
begin
// effective AnInstruction.operand size for default 64 AnInstruction.operand size
if preOpr in Flags
then Result := os16
else Result := os64;
end;
function OperandSize32: TOperandSize;
begin
// effective AnInstruction.operand size for default 32 AnInstruction.operand size
@ -849,9 +867,13 @@ var
AddOperand(StdReg(AIndex, AType, AExtReg), REGSIZE[(FProcess.Mode = dm64), AType]);
end;
procedure AddStdReg(AIndex: Byte);
procedure AddStdReg(AIndex: Byte; AnOpDefType: TOperandDefaultType = v_16_32);
begin
AddOperand(StdReg(AIndex, OPERAND_REG[OperandSize32], rexR in Flags));
case AnOpDefType of
v_16_32: AddOperand(StdReg(AIndex, OPERAND_REG[OperandSize32], rexR in Flags));
vq_64_16: AddOperand(StdReg(AIndex, OPERAND_REG[OperandSize64_16], rexB in Flags));
end;
end;
procedure AddModReg(AType: TRegisterType; ASize: TOperandSize);
@ -2881,6 +2903,8 @@ var
end;
procedure DoDisassemble;
const
OPDEFTYPE_PUSH: array [TFPDMode] {dm32, dm64} of TOperandDefaultType = (v_16_32, vq_64_16);
begin
Opcode := OPX_InternalUnknown;
repeat
@ -2997,11 +3021,11 @@ var
//---
$50..$57: begin
Opcode := OPpush;
AddStdReg(Code[CodeIdx]);
AddStdReg(Code[CodeIdx], OPDEFTYPE_PUSH[FProcess.Mode]);
end;
$58..$5F: begin
Opcode := OPpop;
AddStdReg(Code[CodeIdx]);
AddStdReg(Code[CodeIdx], OPDEFTYPE_PUSH[FProcess.Mode]);
end;
//---
$60: begin