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	aggpas: replaced some asm with pas
git-svn-id: trunk@35845 -
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				| @ -365,11 +365,9 @@ type | ||||
| // to be. | ||||
|  procedure NoP; | ||||
| 
 | ||||
| // SHR for signed integers is differently implemented in pascal compilers | ||||
| // than in c++ compilers. On the assembler level, c++ is using the SAR and | ||||
| // pascal is using SHR. That gives completely different result, when the | ||||
| // number is negative. We have to be compatible with c++ implementation, | ||||
| // thus instead of directly using SHR we emulate c++ solution. | ||||
| { These implementations have changed to use FPC's Sar*() functions, so should | ||||
|   now support all platforms with ASM code. At a later date these functions | ||||
|   could be removed completely. } | ||||
|  function  shr_int8 (i ,shift : int8 ) : int8; | ||||
|  function  shr_int16(i ,shift : int16 ) : int16; | ||||
|  function  shr_int32(i ,shift : int ) : int; | ||||
| @ -1591,90 +1589,22 @@ begin | ||||
| end; | ||||
| 
 | ||||
| { SHR_INT8 } | ||||
| function shr_int8; | ||||
| function shr_int8(i ,shift : int8 ) : int8; | ||||
| begin | ||||
| {$IFDEF AGG_CPU_386 } | ||||
|  asm | ||||
|   mov al ,byte ptr [i ] | ||||
|   mov cl ,byte ptr [shift ] | ||||
|   sar al ,cl | ||||
|   mov byte ptr [result ] ,al | ||||
| 
 | ||||
|  end; | ||||
| 
 | ||||
| {$ENDIF } | ||||
| 
 | ||||
| {$IFDEF AGG_CPU_PPC } | ||||
|  asm | ||||
|   lbz   r2,i | ||||
|   extsb r2,r2 | ||||
|   lbz   r3,shift | ||||
|   extsb r3,r3 | ||||
|   sraw  r2,r2,r3 | ||||
|   extsb r2,r2 | ||||
|   stb   r2,result | ||||
| 	 | ||||
|  end; | ||||
| 
 | ||||
| {$ENDIF } | ||||
| 
 | ||||
|   Result := SarShortint(i, shift); | ||||
| end; | ||||
| 
 | ||||
| { SHR_INT16 } | ||||
| function shr_int16; | ||||
| function shr_int16(i ,shift : int16 ) : int16; | ||||
| begin | ||||
| {$IFDEF AGG_CPU_386 } | ||||
|  asm | ||||
|   mov ax ,word ptr [i ] | ||||
|   mov cx ,word ptr [shift ] | ||||
|   sar ax ,cl | ||||
|   mov word ptr [result ] ,ax | ||||
| 
 | ||||
|  end; | ||||
| 
 | ||||
| {$ENDIF } | ||||
| 
 | ||||
| {$IFDEF AGG_CPU_PPC } | ||||
|  asm | ||||
|   lha   r2,i | ||||
|   lha   r3,shift | ||||
|   sraw  r2,r2,r3 | ||||
|   extsh r2,r2 | ||||
|   sth   r2,result | ||||
| 
 | ||||
|  end; | ||||
| 
 | ||||
| {$ENDIF } | ||||
| 
 | ||||
|   Result := SarSmallint(i, shift); | ||||
| end; | ||||
| 
 | ||||
| { SHR_INT32 } | ||||
| function shr_int32; | ||||
| function shr_int32(i, shift: int): int; | ||||
| begin | ||||
| {$IFDEF AGG_CPU_386 } | ||||
|  asm | ||||
|   mov eax ,dword ptr [i ] | ||||
|   mov ecx ,dword ptr [shift ] | ||||
|   sar eax ,cl | ||||
|   mov dword ptr [result ] ,eax | ||||
| 
 | ||||
|  end; | ||||
| 
 | ||||
| {$ENDIF } | ||||
| 
 | ||||
| {$IFDEF AGG_CPU_PPC } | ||||
|  asm | ||||
|   lwz  r3,i | ||||
|   lwz  r2,shift | ||||
|   sraw r3,r3,r2 | ||||
|   stw  r3,result | ||||
| 
 | ||||
|  end; | ||||
| 
 | ||||
| {$ENDIF } | ||||
| 
 | ||||
|   Result := SarLongint(i, shift); | ||||
| end; | ||||
| 
 | ||||
| END. | ||||
| 
 | ||||
| end. | ||||
| 
 | ||||
|  | ||||
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