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+ added WebAssembly atomic store intrinsics
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219294c02b
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16f5863847
@ -53,6 +53,7 @@ interface
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procedure second_throw_fpcexception;
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procedure second_atomic_fence;
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procedure second_atomic_load(op: TAsmOp);
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procedure second_atomic_store(op: TAsmOp);
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procedure second_atomic_rmw_x_y(op: TAsmOp);
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procedure second_atomic_rmw_x_y_z(op: TAsmOp);
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protected
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@ -420,6 +421,32 @@ implementation
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thlcgwasm(hlcg).a_load_stack_loc(current_asmdata.CurrAsmList,resultdef,location);
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end;
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procedure twasminlinenode.second_atomic_store(op: TAsmOp);
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begin
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location_reset(location,LOC_VOID,OS_NO);
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secondpass(tcallparanode(tcallparanode(left).right).left);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,
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tcallparanode(tcallparanode(left).right).left.location,
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tcallparanode(tcallparanode(left).right).left.resultdef,
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tcallparanode(tcallparanode(left).right).left.resultdef,false);
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thlcgwasm(hlcg).a_load_reg_stack(current_asmdata.CurrAsmList,
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tcallparanode(tcallparanode(left).right).left.resultdef,
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tcallparanode(tcallparanode(left).right).left.location.register);
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secondpass(tcallparanode(left).left);
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hlcg.location_force_reg(current_asmdata.CurrAsmList,
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tcallparanode(left).left.location,
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tcallparanode(left).left.resultdef,
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tcallparanode(left).left.resultdef,false);
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thlcgwasm(hlcg).a_load_reg_stack(current_asmdata.CurrAsmList,
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tcallparanode(left).left.resultdef,
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tcallparanode(left).left.location.register);
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current_asmdata.CurrAsmList.Concat(taicpu.op_const(op,0));
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thlcgwasm(hlcg).decstack(current_asmdata.CurrAsmList,2);
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end;
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procedure twasminlinenode.second_atomic_rmw_x_y(op: TAsmOp);
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begin
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@ -625,6 +652,17 @@ implementation
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CheckParameters(1);
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resultdef:=u64inttype;
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end;
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in_i32_atomic_store8,
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in_i32_atomic_store16,
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in_i32_atomic_store,
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in_i64_atomic_store8,
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in_i64_atomic_store16,
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in_i64_atomic_store32,
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in_i64_atomic_store:
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begin
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CheckParameters(2);
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resultdef:=voidtype;
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end;
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else
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Result:=inherited pass_typecheck_cpu;
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end;
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@ -642,7 +680,14 @@ implementation
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in_wasm32_memory_copy,
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in_wasm32_unreachable,
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in_wasm32_throw_fpcexception,
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in_wasm32_atomic_fence:
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in_wasm32_atomic_fence,
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in_i32_atomic_store8,
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in_i32_atomic_store16,
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in_i32_atomic_store,
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in_i64_atomic_store8,
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in_i64_atomic_store16,
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in_i64_atomic_store32,
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in_i64_atomic_store:
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expectloc:=LOC_VOID;
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in_wasm32_i32_atomic_rmw8_add_u,
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in_wasm32_i32_atomic_rmw16_add_u,
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@ -845,6 +890,20 @@ implementation
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second_atomic_load(a_i64_atomic_load32_u);
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in_i64_atomic_load:
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second_atomic_load(a_i64_atomic_load);
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in_i32_atomic_store8:
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second_atomic_store(a_i32_atomic_store8);
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in_i32_atomic_store16:
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second_atomic_store(a_i32_atomic_store16);
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in_i32_atomic_store:
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second_atomic_store(a_i32_atomic_store);
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in_i64_atomic_store8:
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second_atomic_store(a_i64_atomic_store8);
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in_i64_atomic_store16:
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second_atomic_store(a_i64_atomic_store16);
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in_i64_atomic_store32:
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second_atomic_store(a_i64_atomic_store32);
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in_i64_atomic_store:
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second_atomic_store(a_i64_atomic_store);
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else
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inherited pass_generate_code_cpu;
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end;
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@ -93,3 +93,11 @@ function fpc_wasm32_i64_atomic_load16_u(Address: Pointer): QWord;[internproc:fpc
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function fpc_wasm32_i64_atomic_load32_u(Address: Pointer): QWord;[internproc:fpc_in_i64_atomic_load32_u];
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function fpc_wasm32_i64_atomic_load(Address: Pointer): QWord;[internproc:fpc_in_i64_atomic_load];
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procedure fpc_wasm32_i32_atomic_store8(Dest: PByte; x: LongWord);[internproc:fpc_in_i32_atomic_store8];
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procedure fpc_wasm32_i32_atomic_store16(Dest: PWord; x: LongWord);[internproc:fpc_in_i32_atomic_store16];
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procedure fpc_wasm32_i32_atomic_store(Dest: PLongWord; x: LongWord);[internproc:fpc_in_i32_atomic_store];
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procedure fpc_wasm32_i64_atomic_store8(Dest: PByte; x: QWord);[internproc:fpc_in_i64_atomic_store8];
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procedure fpc_wasm32_i64_atomic_store16(Dest: PWord; x: QWord);[internproc:fpc_in_i64_atomic_store16];
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procedure fpc_wasm32_i64_atomic_store32(Dest: PLongWord; x: QWord);[internproc:fpc_in_i64_atomic_store32];
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procedure fpc_wasm32_i64_atomic_store(Dest: PQWord; x: QWord);[internproc:fpc_in_i64_atomic_store];
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