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* Fixed label optimizer to work with MIPS, and enabled level 1 optimization for MIPS targets.
The difference in branch instruction formats is isolated in function JumpTargetOp, it is a plain function rather than a virtual method, so it can be easily inlined and, after inlining, produces the same code for non-MIPS targets as it was before change. git-svn-id: trunk@25033 -
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sergei
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7a46ebd7f1
commit
1c84c3edbf
@ -171,11 +171,11 @@ unit aoptbase;
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Current := tai(Current.Next);
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While Assigned(Current) And
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((Current.typ In SkipInstr) or
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{$ifdef SPARC}
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{$if defined(SPARC) or defined(MIPS)}
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((Current.typ=ait_instruction) and
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(taicpu(Current).opcode=A_NOP)
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) or
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{$endif SPARC}
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{$endif SPARC or MIPS}
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((Current.typ = ait_label) And
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labelCanBeSkipped(Tai_Label(Current)))) Do
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Current := tai(Current.Next);
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@ -344,6 +344,18 @@ Unit AoptObj;
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verbose,
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procinfo;
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function JumpTargetOp(ai: taicpu): poper; inline;
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begin
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{$ifdef MIPS}
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{ MIPS branches can have 1,2 or 3 operands, target label is the last one. }
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result:=ai.oper[ai.ops-1];
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{$else MIPS}
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result:=ai.oper[0];
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{$endif MIPS}
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end;
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{ ************************************************************************* }
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{ ******************************** TUsedRegs ****************************** }
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{ ************************************************************************* }
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@ -1126,8 +1138,8 @@ Unit AoptObj;
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{$ifdef arm}
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(hp.condition=c_None) and
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{$endif arm}
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(hp.oper[0]^.typ = top_ref) and
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(hp.oper[0]^.ref^.symbol is TAsmLabel);
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(JumpTargetOp(hp)^.typ = top_ref) and
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(JumpTargetOp(hp)^.ref^.symbol is TAsmLabel);
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end;
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@ -1151,7 +1163,7 @@ Unit AoptObj;
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GetfinalDestination := false;
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if level > 20 then
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exit;
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p1 := getlabelwithsym(tasmlabel(hp.oper[0]^.ref^.symbol));
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p1 := getlabelwithsym(tasmlabel(JumpTargetOp(hp)^.ref^.symbol));
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if assigned(p1) then
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begin
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SkipLabels(p1,p1);
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@ -1159,8 +1171,12 @@ Unit AoptObj;
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(taicpu(p1).is_jmp) then
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if { the next instruction after the label where the jump hp arrives}
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{ is unconditional or of the same type as hp, so continue }
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(IsJumpToLabel(taicpu(p1)) or
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conditions_equal(taicpu(p1).condition,hp.condition)) or
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IsJumpToLabel(taicpu(p1))
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{$ifndef MIPS}
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{ for MIPS, it isn't enough to check the condition; first operands must be same, too. }
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or
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conditions_equal(taicpu(p1).condition,hp.condition) or
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{ the next instruction after the label where the jump hp arrives
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is the opposite of hp (so this one is never taken), but after
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that one there is a branch that will be taken, so perform a
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@ -1172,18 +1188,21 @@ Unit AoptObj;
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(taicpu(p2).is_jmp) and
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(IsJumpToLabel(taicpu(p2)) or
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(conditions_equal(taicpu(p2).condition,hp.condition))) and
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SkipLabels(p1,p1)) then
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SkipLabels(p1,p1))
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{$endif MIPS}
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then
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begin
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{ quick check for loops of the form "l5: ; jmp l5 }
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if (tasmlabel(taicpu(p1).oper[0]^.ref^.symbol).labelnr =
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tasmlabel(hp.oper[0]^.ref^.symbol).labelnr) then
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if (tasmlabel(JumpTargetOp(taicpu(p1))^.ref^.symbol).labelnr =
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tasmlabel(JumpTargetOp(hp)^.ref^.symbol).labelnr) then
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exit;
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if not GetFinalDestination(taicpu(p1),succ(level)) then
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exit;
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tasmlabel(hp.oper[0]^.ref^.symbol).decrefs;
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hp.oper[0]^.ref^.symbol:=taicpu(p1).oper[0]^.ref^.symbol;
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tasmlabel(hp.oper[0]^.ref^.symbol).increfs;
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tasmlabel(JumpTargetOp(hp)^.ref^.symbol).decrefs;
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JumpTargetOp(hp)^.ref^.symbol:=JumpTargetOp(taicpu(p1))^.ref^.symbol;
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tasmlabel(JumpTargetOp(hp)^.ref^.symbol).increfs;
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end
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{$ifndef MIPS}
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else
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if conditions_equal(taicpu(p1).condition,inverse_cond(hp.condition)) then
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if not FindAnyLabel(p1,l) then
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@ -1194,8 +1213,8 @@ Unit AoptObj;
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{$endif finaldestdebug}
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current_asmdata.getjumplabel(l);
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insertllitem(p1,p1.next,tai_label.Create(l));
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tasmlabel(taicpu(hp).oper[0]^.ref^.symbol).decrefs;
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hp.oper[0]^.ref^.symbol := l;
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tasmlabel(JumpTargetOp(hp)^.ref^.symbol).decrefs;
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JumpTargetOp(hp)^.ref^.symbol := l;
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l.increfs;
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{ this won't work, since the new label isn't in the labeltable }
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{ so it will fail the rangecheck. Labeltable should become a }
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@ -1209,11 +1228,12 @@ Unit AoptObj;
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strpnew('next label reused'))));
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{$endif finaldestdebug}
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l.increfs;
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tasmlabel(hp.oper[0]^.ref^.symbol).decrefs;
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hp.oper[0]^.ref^.symbol := l;
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tasmlabel(JumpTargetOp(hp)^.ref^.symbol).decrefs;
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JumpTargetOp(hp)^.ref^.symbol := l;
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if not GetFinalDestination(hp,succ(level)) then
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exit;
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end;
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{$endif not MIPS}
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end;
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GetFinalDestination := true;
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end;
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@ -1263,9 +1283,9 @@ Unit AoptObj;
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begin
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if (hp1.typ = ait_instruction) and
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taicpu(hp1).is_jmp and
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(taicpu(hp1).oper[0]^.typ = top_ref) and
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(taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) then
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TAsmLabel(taicpu(hp1).oper[0]^.ref^.symbol).decrefs;
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(JumpTargetOp(taicpu(hp1))^.typ = top_ref) and
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(JumpTargetOp(taicpu(hp1))^.ref^.symbol is TAsmLabel) then
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TAsmLabel(JumpTargetOp(taicpu(hp1))^.ref^.symbol).decrefs;
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{ don't kill start/end of assembler block,
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no-line-info-start/end etc }
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if hp1.typ<>ait_marker then
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@ -1281,13 +1301,18 @@ Unit AoptObj;
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{ remove jumps to a label coming right after them }
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if GetNextInstruction(p, hp1) then
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begin
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if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp1) and
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if FindLabel(tasmlabel(JumpTargetOp(taicpu(p))^.ref^.symbol), hp1) and
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{ TODO: FIXME removing the first instruction fails}
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(p<>blockstart) then
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begin
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tasmlabel(JumpTargetOp(taicpu(p))^.ref^.symbol).decrefs;
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{$if defined(SPARC) or defined(MIPS)}
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hp2:=tai(p.next);
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asml.remove(hp2);
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hp2.free;
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{$endif SPARC or MIPS}
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hp2:=tai(hp1.next);
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asml.remove(p);
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tasmlabel(taicpu(p).oper[0]^.ref^.symbol).decrefs;
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p.free;
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p:=hp2;
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continue;
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@ -1299,7 +1324,7 @@ Unit AoptObj;
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if (tai(hp1).typ=ait_instruction) and
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IsJumpToLabel(taicpu(hp1)) and
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GetNextInstruction(hp1, hp2) and
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FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol), hp2) then
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FindLabel(tasmlabel(JumpTargetOp(taicpu(p))^.ref^.symbol), hp2) then
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begin
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if (taicpu(p).opcode=aopt_condjmp)
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{$ifdef arm}
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@ -1309,17 +1334,27 @@ Unit AoptObj;
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begin
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taicpu(p).condition:=inverse_cond(taicpu(p).condition);
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tai_label(hp2).labsym.decrefs;
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taicpu(p).oper[0]^.ref^.symbol:=taicpu(hp1).oper[0]^.ref^.symbol;
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JumpTargetOp(taicpu(p))^.ref^.symbol:=JumpTargetOp(taicpu(hp1))^.ref^.symbol;
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{ when freeing hp1, the reference count
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isn't decreased, so don't increase
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taicpu(p).oper[0]^.ref^.symbol.increfs;
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}
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{$ifdef SPARC}
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{$if defined(SPARC) or defined(MIPS)}
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{ Remove delay slot. Initially is is placed immediately after
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branch, but RA can insert regallocs in between. }
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hp2:=tai(hp1.next);
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asml.remove(hp2);
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hp2.free;
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{$endif SPARC}
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while assigned(hp2) and (hp2.typ in SkipInstr) do
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hp2:=tai(hp2.next);
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if assigned(hp2) and (hp2.typ=ait_instruction) and
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(taicpu(hp2).opcode=A_NOP) then
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begin
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asml.remove(hp2);
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hp2.free;
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end
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else
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InternalError(2013070301);
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{$endif SPARC or MIPS}
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asml.remove(hp1);
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hp1.free;
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GetFinalDestination(taicpu(p),0);
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@ -111,7 +111,7 @@ Const
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supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
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cs_opt_reorder_fields,cs_opt_fastmath];
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level1optimizerswitches = [];
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level1optimizerswitches = [cs_opt_level1];
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level2optimizerswitches = level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_nodecse];
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level3optimizerswitches = level2optimizerswitches + [cs_opt_loopunroll];
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level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
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