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1c84c3edbf
The difference in branch instruction formats is isolated in function JumpTargetOp, it is a plain function rather than a virtual method, so it can be easily inlined and, after inlining, produces the same code for non-MIPS targets as it was before change. git-svn-id: trunk@25033 -
142 lines
3.5 KiB
ObjectPascal
142 lines
3.5 KiB
ObjectPascal
{
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Copyright (c) 1998-2002 by the Free Pascal development team
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Basic Processor information for the ARM
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See the file COPYING.FPC, included in this distribution,
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for details about the copyright.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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**********************************************************************}
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Unit CPUInfo;
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Interface
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uses
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globtype;
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Type
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bestreal = double;
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ts32real = single;
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ts64real = double;
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ts80real = type double;
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ts128real = type double;
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ts64comp = comp;
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pbestreal=^bestreal;
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{ possible supported processors for this target }
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tcputype =
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(cpu_none,
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cpu_mips1,
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cpu_mips2,
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cpu_mips3,
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cpu_mips4,
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cpu_mips5,
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cpu_mips32,
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cpu_mips32r2
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);
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tfputype =(fpu_none,fpu_soft,fpu_mips2,fpu_mips3);
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tabitype =
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(
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abi_none,
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abi_default,
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abi_o32,
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abi_n32,
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abi_o64,
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abi_n64,
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abi_eabi
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);
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Const
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{# Size of native extended floating point type }
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extended_size = 8;
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{# Size of a multimedia register }
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mmreg_size = 0;
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{ target cpu string (used by compiler options) }
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{$ifdef MIPSEL}
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target_cpu_string = 'mipsel';
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{$else MIPSEL}
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target_cpu_string = 'mips';
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{$endif MIPSEL}
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{ calling conventions supported by the code generator }
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supported_calling_conventions : tproccalloptions = [
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pocall_internproc,
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pocall_stdcall,
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{ same as stdcall only different name mangling }
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pocall_cdecl,
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{ same as stdcall only different name mangling }
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pocall_cppdecl
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];
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{ cpu strings as accepted by
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GNU assembler in -arch=XXX option
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this ilist needs to be uppercased }
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cputypestr : array[tcputype] of string[8] = ('',
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{ cpu_mips1 } 'MIPS1',
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{ cpu_mips2 } 'MIPS2',
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{ cpu_mips3 } 'MIPS3',
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{ cpu_mips4 } 'MIPS4',
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{ cpu_mips5 } 'MIPS5',
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{ cpu_mips32 } 'MIPS32',
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{ cpu_mips32r2 } 'MIPS32R2'
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);
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fputypestr : array[tfputype] of string[9] = ('',
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'SOFT',
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'FPU_MIPS2','FPU_MIPS3'
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);
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{ abi strings as accepted by
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GNU assembler in -abi=XXX option }
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abitypestr : array[tabitype] of string[4] =
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({ abi_none } '',
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{ abi_default } '32',
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{ abi_o32 } '32',
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{ abi_n32 } 'n32',
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{ abi_o64 } 'o64',
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{ abi_n64 } '64',
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{ abi_eabi } 'eabi'
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);
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mips_abi : tabitype = abi_default;
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{ Supported optimizations, only used for information }
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supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
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cs_opt_reorder_fields,cs_opt_fastmath];
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level1optimizerswitches = [cs_opt_level1];
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level2optimizerswitches = level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_nodecse];
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level3optimizerswitches = level2optimizerswitches + [cs_opt_loopunroll];
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level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
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function SetMipsABIType(const s : string) : boolean;
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Implementation
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uses
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cutils;
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function SetMipsABIType(const s : string) : boolean;
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var
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abi : tabitype;
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begin
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SetMipsABIType:=false;
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for abi := low(tabitype) to high(tabitype) do
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if (lower(s)=abitypestr[abi]) then
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begin
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mips_abi:=abi;
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SetMipsABIType:=true;
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break;
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end;
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end;
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end.
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