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+ added x86 instruction flag Ch_RFLAGScc, indicating instructions that read

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specific bits from the flags register, according to their condition (used by
  Jcc/SETcc/CMOVcc)

git-svn-id: trunk@35907 -
This commit is contained in:
nickysn 2017-04-22 22:07:05 +00:00
parent b4a4ad725c
commit 1d34e96064
6 changed files with 16 additions and 14 deletions
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4
compiler/i386/aoptcpu.pas
View File

@ -235,7 +235,7 @@ unit aoptcpu;
end;
if ([Ch_RCarryFlag,Ch_RParityFlag,Ch_RAuxiliaryFlag,Ch_RZeroFlag,Ch_RSignFlag,Ch_ROverflowFlag,
Ch_RWCarryFlag,Ch_RWParityFlag,Ch_RWAuxiliaryFlag,Ch_RWZeroFlag,Ch_RWSignFlag,Ch_RWOverflowFlag,
Ch_RFlags,Ch_RWFlags]*Ch<>[]) and (reg=NR_DEFAULTFLAGS) then
Ch_RFlags,Ch_RWFlags,Ch_RFLAGScc]*Ch<>[]) and (reg=NR_DEFAULTFLAGS) then
begin
RegReadByInstruction := true;
exit
@ -289,7 +289,7 @@ function InstrReadsFlags(p: tai): boolean;
if InsProp[taicpu(p).opcode].Ch*
[Ch_RCarryFlag,Ch_RParityFlag,Ch_RAuxiliaryFlag,Ch_RZeroFlag,Ch_RSignFlag,Ch_ROverflowFlag,
Ch_RWCarryFlag,Ch_RWParityFlag,Ch_RWAuxiliaryFlag,Ch_RWZeroFlag,Ch_RWSignFlag,Ch_RWOverflowFlag,
Ch_RFlags,Ch_RWFlags,Ch_All]<>[] then
Ch_RFlags,Ch_RWFlags,Ch_RFLAGScc,Ch_All]<>[] then
exit;
ait_label:
exit;

6
compiler/i386/i386prop.inc
View File

@ -383,9 +383,9 @@
(Ch: [Ch_All]),
(Ch: [Ch_All]),
(Ch: [Ch_All]),
(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGS]),
(Ch: [Ch_RFLAGS]),
(Ch: [Ch_RFLAGS, Ch_WOp1]),
(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc]),
(Ch: [Ch_RFLAGScc]),
(Ch: [Ch_RFLAGScc, Ch_WOp1]),
(Ch: [Ch_Mop2, Ch_Rop1]),
(Ch: [Ch_Mop2, Ch_Rop1]),
(Ch: [Ch_Mop2, Ch_Rop1]),

6
compiler/i8086/i8086prop.inc
View File

@ -383,9 +383,9 @@
(Ch: [Ch_All]),
(Ch: [Ch_All]),
(Ch: [Ch_All]),
(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGS]),
(Ch: [Ch_RFLAGS]),
(Ch: [Ch_RFLAGS, Ch_WOp1]),
(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc]),
(Ch: [Ch_RFLAGScc]),
(Ch: [Ch_RFLAGScc, Ch_WOp1]),
(Ch: [Ch_Mop2, Ch_Rop1]),
(Ch: [Ch_Mop2, Ch_Rop1]),
(Ch: [Ch_Mop2, Ch_Rop1]),

2
compiler/x86/aasmcpu.pas
View File

@ -226,6 +226,8 @@ interface
Ch_RWCarryFlag,Ch_RWParityFlag,Ch_RWAuxiliaryFlag,Ch_RWZeroFlag,Ch_RWSignFlag,Ch_RWOverflowFlag,
{more specialized flag bits (not considered part of NR_DEFAULTFLAGS by the compiler)}
Ch_RDirFlag,Ch_W0DirFlag,Ch_W1DirFlag,Ch_W0IntFlag,Ch_W1IntFlag,
{instruction reads flag bits, according to its condition (used by Jcc/SETcc/CMOVcc)}
Ch_RFLAGScc,
{read/write/read+write the entire flags/eflags/rflags register}
Ch_RFlags, Ch_WFlags, Ch_RWFlags,
Ch_FPU,

6
compiler/x86/x86ins.dat
View File

@ -2098,11 +2098,11 @@ void \333\3\x0F\xA7\xE0 P6,CYRIX
void \333\3\x0F\xA7\xE8 P6,CYRIX
[CMOVcc,cmovCCX]
(Ch_ROp1, Ch_RWOp2, Ch_RFLAGS)
(Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc)
reg16|32|64,regmem \320\1\x0F\13\x40\110 P6,SM
[Jcc]
(Ch_RFLAGS)
(Ch_RFLAGScc)
imm8 \13\x70\50 8086
imm16|32 \320\1\x0F\13\x80\64 386,PASS2
imm16 \23\x70\1\x03\1\xE9\60 8086,PASS2,16BITONLY
@ -2111,7 +2111,7 @@ imm|near \320\1\x0F\13\x80\64 386,PASS2
imm16|near \23\x70\1\x03\1\xE9\60 8086,PASS2,16BITONLY
[SETcc,setCCX]
(Ch_RFLAGS, Ch_WOp1)
(Ch_RFLAGScc, Ch_WOp1)
rm8 \1\x0F\13\x90\200 386
;

6
compiler/x86_64/x8664pro.inc
View File

@ -368,9 +368,9 @@
(Ch: [Ch_All]),
(Ch: [Ch_All]),
(Ch: [Ch_All]),
(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGS]),
(Ch: [Ch_RFLAGS]),
(Ch: [Ch_RFLAGS, Ch_WOp1]),
(Ch: [Ch_ROp1, Ch_RWOp2, Ch_RFLAGScc]),
(Ch: [Ch_RFLAGScc]),
(Ch: [Ch_RFLAGScc, Ch_WOp1]),
(Ch: [Ch_Mop2, Ch_Rop1]),
(Ch: [Ch_Mop2, Ch_Rop1]),
(Ch: [Ch_Mop2, Ch_Rop1]),