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* fixed some MMX<->SSE

Browse Source 
* started to fix ppc, needs an overhaul
  + stabs info improve for spilling, not sure if it works correctly/completly
  - MMX_SUPPORT removed from Makefile.fpc
This commit is contained in:
florian 2003-10-11 16:06:42 +00:00
parent fb81b7ebbb
commit 1df13c788c
17 changed files with 310 additions and 150 deletions
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8
compiler/Makefile
View File

@ -1,5 +1,5 @@
#
# Don't edit, this file is generated by FPCMake Version 1.1 [2003/10/09]
# Don't edit, this file is generated by FPCMake Version 1.1 [2003/10/04]
#
default: all
MAKEFILETARGETS=linux go32v2 win32 os2 freebsd beos netbsd amiga atari sunos qnx netware openbsd wdosx palmos macos darwin emx watcom
@ -100,7 +100,7 @@ ifndef FPC
FPCPROG:=$(strip $(wildcard $(addsuffix /fpc$(SRCEXEEXT),$(SEARCHPATH))))
ifneq ($(FPCPROG),)
FPCPROG:=$(firstword $(FPCPROG))
FPC:=$(shell $(FPCPROG) -PB)
FPC:=$(shell $(FPCPROG) -QB)
ifneq ($(findstring Error,$(FPC)),)
override FPC=ppc386
endif
@ -280,10 +280,10 @@ endif
MSGFILE=msg/error$(FPCLANG).msg
override LOCALDEF+=-d$(PPC_TARGET) -dGDB -dBROWSERLOG
ifeq ($(PPC_TARGET),i386)
override LOCALDEF+=-dSUPPORT_MMX -Fux86
override LOCALDEF+=-Fux86
endif
ifeq ($(PPC_TARGET),x86_64)
override LOCALDEF+=-dSUPPORT_MMX -Fux86 -dNOOPT
override LOCALDEF+=-Fux86 -dNOOPT
endif
ifeq ($(PPC_TARGET),powerpc)
override LOCALDEF+=-dNOOPT

4
compiler/Makefile.fpc
View File

@ -144,12 +144,12 @@ override LOCALDEF+=-d$(PPC_TARGET) -dGDB -dBROWSERLOG
# i386 specific
ifeq ($(PPC_TARGET),i386)
override LOCALDEF+=-dSUPPORT_MMX -Fux86
override LOCALDEF+=-Fux86
endif
# x86_64 specific
ifeq ($(PPC_TARGET),x86_64)
override LOCALDEF+=-dSUPPORT_MMX -Fux86 -dNOOPT
override LOCALDEF+=-Fux86 -dNOOPT
endif
# PowerPC specific

18
compiler/aasmtai.pas
View File

@ -498,6 +498,8 @@ interface
taasmoutput = class(tlinkedlist)
constructor create;
function getlasttaifilepos : pfileposinfo;
// procedure translate_registers(const table:Ttranstable);
procedure InsertAfter(Item,Loc : TLinkedListItem);
procedure translate_registers(regtype:tregistertype;const table:Ttranstable);
end;
@ -2090,6 +2092,14 @@ implementation
end;
end;
procedure Taasmoutput.InsertAfter(Item,Loc : TLinkedListItem);
begin
if assigned(Loc) then
tailineinfo(Item).fileinfo:=tailineinfo(Loc).fileinfo;
inherited InsertAfter(Item,Loc);
end;
procedure Taasmoutput.translate_registers(regtype:tregistertype;const table:Ttranstable);
var p,q:Tai;
@ -2154,7 +2164,13 @@ implementation
end.
{
$Log$
Revision 1.42 2003-10-10 17:48:13 peter
Revision 1.43 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.42 2003/10/10 17:48:13 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

80
compiler/arm/cgcpu.pas
View File

@ -359,8 +359,27 @@ unit cgcpu;
OP_MUL:
begin
{ the arm doesn't allow that rd and rm are the same }
rg.add_edge(dst,src2);
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src2,src1));
if dst=src2 then
begin
if dst<>src1 then
begin
rg.add_edge(dst,src1);
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src1,src2));
end
else
begin
tmpreg:=rg.getregisterint(list,size);
a_load_reg_reg(list,size,size,src2,dst);
rg.add_edge(dst,tmpreg);
rg.ungetregister(list,tmpreg);
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,tmpreg,src1));
end;
end
else
begin
rg.add_edge(dst,src2);
list.concat(taicpu.op_reg_reg_reg(A_MUL,dst,src2,src1));
end;
end;
else
list.concat(taicpu.op_reg_reg_reg(op_reg_reg_opcg2asmop[op],dst,src2,src1));
@ -456,6 +475,7 @@ unit cgcpu;
) then
begin
{ check consts distance }
{ !!!! }
{ create consts entry }
objectlibrary.getdatalabel(l);
@ -477,7 +497,6 @@ unit cgcpu;
if ref.index<>NR_NO then
begin
list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,ref.base,tmpreg));
rg.ungetregister(list,ref.base);
ref.base:=tmpreg;
end
else
@ -493,6 +512,41 @@ unit cgcpu;
ref.offset:=0;
ref.symbol:=nil;
end;
{ floating point operations have only limited references
we expect here, that a base is already set }
if (op in [A_LDF,A_STF]) and (ref.index<>NR_NO) then
begin
if ref.shiftmode<>SM_none then
internalerror(200309121);
if tmpreg<>NR_NO then
begin
if ref.base=tmpreg then
begin
if ref.signindex<0 then
list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,tmpreg,ref.index))
else
list.concat(taicpu.op_reg_reg_reg(A_SUB,tmpreg,tmpreg,ref.index));
ref.index:=NR_NO;
end
else
begin
if ref.signindex<0 then
list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,tmpreg,ref.base))
else
list.concat(taicpu.op_reg_reg_reg(A_SUB,tmpreg,tmpreg,ref.base));
ref.index:=NR_NO;
ref.index:=tmpreg;
end;
end
else
begin
tmpreg:=rg.getregisterint(list,OS_INT);
list.concat(taicpu.op_reg_reg_reg(A_ADD,tmpreg,ref.base,ref.index));
ref.base:=tmpreg;
ref.index:=NR_NO;
end;
end;
list.concat(setoppostfix(taicpu.op_reg_ref(op,reg,ref),oppostfix));
if (tmpreg<>NR_NO) then
rg.ungetregisterint(list,tmpreg);
@ -918,18 +972,14 @@ unit cgcpu;
begin
destreg:=rg.getregisterint(list,OS_ADDR);
a_loadaddr_ref_reg(list,dest,destreg);
if delsource then
reference_release(list,srcref);
srcreg:=rg.getregisterint(list,OS_ADDR);
if loadref then
a_load_ref_reg(list,OS_ADDR,OS_ADDR,source,srcreg)
else
begin
a_loadaddr_ref_reg(list,source,srcreg);
if delsource then
begin
srcref:=source;
reference_release(list,srcref);
end;
end;
a_loadaddr_ref_reg(list,source,srcreg);
srcref.
countreg:=rg.getregisterint(list,OS_32);
@ -1118,7 +1168,13 @@ begin
end.
{
$Log$
Revision 1.19 2003-09-11 11:55:00 florian
Revision 1.20 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.19 2003/09/11 11:55:00 florian
* improved arm code generation
* move some protected and private field around
* the temp. register for register parameters/arguments are now released

10
compiler/cclasses.pas
View File

@ -81,7 +81,7 @@ interface
{ inserts an Item before Loc }
procedure InsertBefore(Item,Loc : TLinkedListItem);
{ inserts an Item after Loc }
procedure InsertAfter(Item,Loc : TLinkedListItem);
procedure InsertAfter(Item,Loc : TLinkedListItem);virtual;
{ concats an Item }
procedure Concat(Item:TLinkedListItem);
{ deletes an Item }
@ -1884,7 +1884,13 @@ end;
end.
{
$Log$
Revision 1.25 2003-09-29 20:52:50 peter
Revision 1.26 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.25 2003/09/29 20:52:50 peter
* insertbefore added
Revision 1.24 2003/09/24 13:02:10 marco

11
compiler/cgbase.pas
View File

@ -176,6 +176,9 @@ interface
const
{ alias for easier understanding }
R_SSEREGISTER = R_MMREGISTER;
{ Invalid register number }
RS_INVALID = $ff;
@ -371,7 +374,13 @@ implementation
end.
{
$Log$
Revision 1.68 2003-10-09 21:31:37 daniel
Revision 1.69 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.68 2003/10/09 21:31:37 daniel
* Register allocator splitted, ans abstract now
Revision 1.67 2003/10/01 20:34:48 peter

14
compiler/cgobj.pas
View File

@ -44,7 +44,7 @@ unit cgobj;
cclasses,
cpubase,cpuinfo,cgbase,
aasmbase,aasmtai,aasmcpu,
symconst,symbase,symtype,symdef,symtable
symconst,symbase,symtype,symdef,symtable,rgobj
;
type
@ -75,9 +75,9 @@ unit cgobj;
{# Gets a register suitable to do integer operations on.}
function getaddressregister(list:Taasmoutput):Tregister;virtual;abstract;
function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
function getmmxregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
function getabtregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
function getabtintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
{Does the generic cg need SIMD registers, like getmmxregister? Or should
the cpu specific child cg object have such a method?}
procedure ungetregister(list:Taasmoutput;r:Tregister);virtual;abstract;
@ -1692,7 +1692,13 @@ finalization
end.
{
$Log$
Revision 1.128 2003-10-10 17:48:13 peter
Revision 1.129 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.128 2003/10/10 17:48:13 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

14
compiler/i386/cpupara.pas
View File

@ -47,7 +47,7 @@ unit cpupara;
function get_para_align(calloption : tproccalloption):byte;override;
function get_volatile_registers_int(calloption : tproccalloption):tsuperregisterset;override;
function get_volatile_registers_fpu(calloption : tproccalloption):tsuperregisterset;override;
function get_volatile_registers_mmx(calloption : tproccalloption):tsuperregisterset;override;
function get_volatile_registers_mm(calloption : tproccalloption):tsuperregisterset;override;
function getintparaloc(calloption : tproccalloption; nr : longint) : tparalocation;override;
function create_paraloc_info(p : tabstractprocdef; side: tcallercallee):longint;override;
function create_varargs_paraloc_info(p : tabstractprocdef; varargspara:tlinkedlist):longint;override;
@ -192,9 +192,9 @@ unit cpupara;
end;
function ti386paramanager.get_volatile_registers_mmx(calloption : tproccalloption):tsuperregisterset;
function ti386paramanager.get_volatile_registers_mm(calloption : tproccalloption):tsuperregisterset;
begin
result:=[first_mmx_supreg..last_mmx_supreg];
result:=[first_sse_supreg..last_sse_supreg];
end;
@ -446,7 +446,13 @@ begin
end.
{
$Log$
Revision 1.39 2003-10-10 17:48:14 peter
Revision 1.40 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.39 2003/10/10 17:48:14 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

22
compiler/ncgcal.pas
View File

@ -466,7 +466,7 @@ implementation
{$ifdef x86}
tcgx86(cg).inc_fpu_stack;
{$else x86}
hregister := cg.getfputregister(exprasmlist,location.size);
hregister := cg.getregister(exprasmlist,location.size);
cg.a_loadfpu_reg_reg(exprasmlist,location.size,location.register,hregister);
location.register := hregister;
{$endif x86}
@ -737,7 +737,7 @@ implementation
{ release self }
cg.ungetregister(exprasmlist,vmtreg);
pvreg:=cg.getabtregister(exprasmlist,OS_ADDR);
pvreg:=cg.getabtintregister(exprasmlist,OS_ADDR);
reference_reset_base(href,vmtreg,
tprocdef(procdefinition)._class.vmtmethodoffset(tprocdef(procdefinition).extnumber));
cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,href,pvreg);
@ -754,7 +754,7 @@ implementation
freeparas;
cg.allocexplicitregisters(exprasmlist,R_INTREGISTER,regs_to_alloc);
cg.allocexplicitregisters(exprasmlist,R_MMXREGISTER,paramanager.get_volatile_registers_mmx(procdefinition.proccalloption));
cg.allocexplicitregisters(exprasmlist,R_SSEREGISTER,paramanager.get_volatile_registers_mm(procdefinition.proccalloption));
{ call method }
cg.a_call_reg(exprasmlist,pvreg);
@ -770,7 +770,7 @@ implementation
freeparas;
cg.allocexplicitregisters(exprasmlist,R_INTREGISTER,regs_to_alloc);
cg.allocexplicitregisters(exprasmlist,R_MMXREGISTER,paramanager.get_volatile_registers_mmx(procdefinition.proccalloption));
cg.allocexplicitregisters(exprasmlist,R_SSEREGISTER,paramanager.get_volatile_registers_mm(procdefinition.proccalloption));
{ Calling interrupt from the same code requires some
extra code }
@ -785,7 +785,7 @@ implementation
secondpass(right);
location_release(exprasmlist,right.location);
pvreg:=cg.getabtregister(exprasmlist,OS_ADDR);
pvreg:=cg.getabtintregister(exprasmlist,OS_ADDR);
{ Only load OS_ADDR from the reference }
if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
cg.a_load_ref_reg(exprasmlist,OS_ADDR,OS_ADDR,right.location.reference,pvreg)
@ -805,7 +805,7 @@ implementation
freeparas;
cg.allocexplicitregisters(exprasmlist,R_INTREGISTER,regs_to_alloc);
cg.allocexplicitregisters(exprasmlist,R_MMXREGISTER,paramanager.get_volatile_registers_mmx(procdefinition.proccalloption));
cg.allocexplicitregisters(exprasmlist,R_MMREGISTER,paramanager.get_volatile_registers_mm(procdefinition.proccalloption));
{ Calling interrupt from the same code requires some
extra code }
@ -857,7 +857,7 @@ implementation
end;
end;
end;
cg.deallocexplicitregisters(exprasmlist,R_MMXREGISTER,paramanager.get_volatile_registers_mmx(procdefinition.proccalloption));
cg.deallocexplicitregisters(exprasmlist,R_MMREGISTER,paramanager.get_volatile_registers_mm(procdefinition.proccalloption));
cg.deallocexplicitregisters(exprasmlist,R_INTREGISTER,regs_to_free);
{ handle function results }
@ -1104,7 +1104,13 @@ begin
end.
{
$Log$
Revision 1.129 2003-10-10 17:48:13 peter
Revision 1.130 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.129 2003/10/10 17:48:13 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

10
compiler/ncgld.pas
View File

@ -152,7 +152,7 @@ implementation
paramanager.allocparaloc(exprasmlist,paraloc1);
cg.a_param_ref(exprasmlist,OS_ADDR,href,paraloc1);
paramanager.freeparaloc(exprasmlist,paraloc1);
r:=cg.getabtregister(exprasmlist,OS_ADDR);
r:=cg.getabtintregister(exprasmlist,OS_ADDR);
cg.ungetregister(exprasmlist,r);
cg.a_load_reg_reg(exprasmlist,OS_ADDR,OS_ADDR,hregister,r);
cg.allocexplicitregisters(exprasmlist,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
@ -884,7 +884,13 @@ begin
end.
{
$Log$
Revision 1.93 2003-10-10 17:48:13 peter
Revision 1.94 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.93 2003/10/10 17:48:13 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

12
compiler/paramgr.pas
View File

@ -73,7 +73,7 @@ unit paramgr;
function get_para_align(calloption : tproccalloption):byte;virtual;
function get_volatile_registers_int(calloption : tproccalloption):tsuperregisterset;virtual;
function get_volatile_registers_fpu(calloption : tproccalloption):tsuperregisterset;virtual;
function get_volatile_registers_mmx(calloption : tproccalloption):tsuperregisterset;virtual;
function get_volatile_registers_flags(calloption : tproccalloption):tsuperregisterset;virtual;
function get_volatile_registers_mm(calloption : tproccalloption):tsuperregisterset;virtual;
function getintparaloc(calloption : tproccalloption; nr : longint) : tparalocation;virtual;abstract;
@ -274,7 +274,7 @@ implementation
end;
function tparamanager.get_volatile_registers_mmx(calloption : tproccalloption):tsuperregisterset;
function tparamanager.get_volatile_registers_flags(calloption : tproccalloption):tsuperregisterset;
begin
result:=[];
end;
@ -437,7 +437,13 @@ end.
{
$Log$
Revision 1.62 2003-10-10 17:48:13 peter
Revision 1.63 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.62 2003/10/10 17:48:13 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

151
compiler/powerpc/cgcpu.pas
View File

@ -30,7 +30,7 @@ unit cgcpu;
symtype,
cgbase,cgobj,
aasmbase,aasmcpu,aasmtai,
cpubase,cpuinfo,node,cg64f32;
cpubase,cpuinfo,node,cg64f32,rgcpu;
type
tcgppc = class(tcg)
@ -94,8 +94,8 @@ unit cgcpu;
{ that's the case, we can use rlwinm to do an AND operation }
function get_rlwi_const(a: aword; var l1, l2: longint): boolean;
procedure g_save_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);override;
procedure g_restore_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);override;
procedure g_save_standard_registers(list:Taasmoutput);override;
procedure g_restore_standard_registers(list:Taasmoutput);override;
procedure g_save_all_registers(list : taasmoutput);override;
procedure g_restore_all_registers(list : taasmoutput;accused,acchiused:boolean);override;
@ -156,22 +156,27 @@ const
uses
globtype,globals,verbose,systems,cutils,
symconst,symdef,symsym,
rgobj,tgobj,cpupi,rgcpu,procinfo;
rgobj,tgobj,cpupi,procinfo;
procedure tcgppc.init_register_allocators;
begin
rg := trgcpu.create(29,chr(ord(RS_R3))+chr(ord(RS_R4))+chr(ord(RS_R5))+chr(ord(RS_R6))+chr(ord(RS_R7))+chr(ord(RS_R8))+
rgfpu:=trgcpu.create(29,R_INTREGISTER,R_SUBWHOLE,chr(ord(RS_R3))+chr(ord(RS_R4))+chr(ord(RS_R5))+chr(ord(RS_R6))+chr(ord(RS_R7))+chr(ord(RS_R8))+
chr(ord(RS_R9))+chr(ord(RS_R10))+chr(ord(RS_R11))+chr(ord(RS_R12))+chr(ord(RS_R31))+chr(ord(RS_R30))+chr(ord(RS_R29))+
chr(ord(RS_R28))+chr(ord(RS_R27))+chr(ord(RS_R26))+chr(ord(RS_R25))+chr(ord(RS_R24))+chr(ord(RS_R23))+chr(ord(RS_R22))+
chr(ord(RS_R21))+chr(ord(RS_R20))+chr(ord(RS_R19))+chr(ord(RS_R18))+chr(ord(RS_R17))+chr(ord(RS_R16))+chr(ord(RS_R15))+
chr(ord(RS_R14))+chr(ord(RS_R13)));
chr(ord(RS_R14))+chr(ord(RS_R13)),first_int_imreg,[]);
{$warning FIX ME}
rgfpu:=trgcpu.create(6,R_INTREGISTER,R_SUBWHOLE,#0#1#2#3#4#5,first_fpu_imreg,[]);
rgmm:=trgcpu.create(0,R_MMXREGISTER,R_SUBNONE,'',first_mm_imreg,[]);
end;
procedure tcgppc.done_register_allocators;
begin
rg.free;
rgint.free;
rgmm.free;
rgfpu.free;
end;
@ -192,8 +197,6 @@ const
else
internalerror(2002081101);
end;
if locpara.sp_fixup<>0 then
internalerror(2002081102);
end;
@ -212,10 +215,10 @@ const
reference_reset(ref);
ref.base:=locpara.reference.index;
ref.offset:=locpara.reference.offset;
tmpreg := rg.getregisterint(list,size);
tmpreg := rgint.getregister(list,R_SUBWHOLE);
a_load_ref_reg(list,size,size,r,tmpreg);
a_load_reg_ref(list,size,size,tmpreg,ref);
rg.ungetregisterint(list,tmpreg);
rgint.ungetregister(list,tmpreg);
end;
LOC_FPUREGISTER,LOC_CFPUREGISTER:
case size of
@ -227,8 +230,6 @@ const
else
internalerror(2002081103);
end;
if locpara.sp_fixup<>0 then
internalerror(2002081104);
end;
@ -246,10 +247,10 @@ const
reference_reset(ref);
ref.base := locpara.reference.index;
ref.offset := locpara.reference.offset;
tmpreg := rg.getregisterint(list,OS_ADDR);
tmpreg := rgint.getregister(list,R_SUBWHOLE);
a_loadaddr_ref_reg(list,r,tmpreg);
a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
rg.ungetregisterint(list,tmpreg);
rgint.ungetregister(list,tmpreg);
end;
else
internalerror(2002080701);
@ -285,14 +286,14 @@ const
{Generate instruction to load the procedure address from
the transition vector.}
//TODO: Support cross-TOC calls.
tmpreg := rg.getregisterint(list,OS_INT);
tmpreg := rgint.getregister(list,R_SUBWHOLE);
reference_reset(tmpref);
tmpref.offset := 0;
//tmpref.symaddr := refs_full;
tmpref.base:= reg;
list.concat(taicpu.op_reg_ref(A_LWZ,tmpreg,tmpref));
list.concat(taicpu.op_reg(A_MTCTR,tmpreg));
rg.ungetregisterint(list,tmpreg);
rgint.ungetregister(list,tmpreg);
end
else
list.concat(taicpu.op_reg(A_MTCTR,reg));
@ -353,7 +354,7 @@ const
op := storeinstr[tcgsize2unsigned[tosize],ref2.index<>NR_NO,false];
a_load_store(list,op,reg,ref2);
if freereg then
rg.ungetregisterint(list,ref2.base);
rgint.ungetregister(list,ref2.base);
End;
@ -387,7 +388,7 @@ const
op := loadinstr[fromsize,ref2.index<>NR_NO,false];
a_load_store(list,op,reg,ref2);
if freereg then
rg.ungetregisterint(list,ref2.base);
rgint.ungetregister(list,ref2.base);
{ sign extend shortint if necessary, since there is no }
{ load instruction that does that automatically (JM) }
if fromsize = OS_S8 then
@ -422,7 +423,7 @@ const
else internalerror(2002090901);
end;
list.concat(instr);
rg.add_move_instruction(instr);
rgint.add_move_instruction(instr);
end;
end;
@ -462,7 +463,7 @@ const
op := fpuloadinstr[size,ref2.index <> NR_NO,false];
a_load_store(list,op,reg,ref2);
if freereg then
rg.ungetregisterint(list,ref2.base);
rgint.ungetregister(list,ref2.base);
end;
@ -486,7 +487,7 @@ const
op := fpustoreinstr[size,ref2.index <> NR_NO,false];
a_load_store(list,op,reg,ref2);
if freereg then
rg.ungetregisterint(list,ref2.base);
rgint.ungetregister(list,ref2.base);
end;
@ -642,11 +643,11 @@ const
if gotrlwi and
(src = dst) then
begin
scratchreg := rg.getregisterint(list,OS_INT);
scratchreg := rgint.getregister(list,R_SUBWHOLE);
list.concat(taicpu.op_reg_const(A_LI,scratchreg,-1));
list.concat(taicpu.op_reg_reg_const_const_const(A_RLWIMI,dst,
scratchreg,0,l1,l2));
rg.ungetregisterint(list,scratchreg);
rgint.ungetregister(list,scratchreg);
end
else
do_lo_hi;
@ -676,10 +677,10 @@ const
{ perform the operation }
if useReg then
begin
scratchreg := rg.getregisterint(list,OS_INT);
scratchreg := rgint.getregister(list,R_SUBWHOLE);
a_load_const_reg(list,OS_32,a,scratchreg);
a_op_reg_reg_reg(list,op,OS_32,scratchreg,src,dst);
rg.ungetregisterint(list,scratchreg);
rgint.ungetregister(list,scratchreg);
end;
end;
@ -724,20 +725,20 @@ const
list.concat(taicpu.op_reg_reg_const(A_CMPWI,NR_CR0,reg,longint(a)))
else
begin
scratch_register := rg.getregisterint(list,OS_INT);
scratch_register := rgint.getregister(list,R_SUBWHOLE);
a_load_const_reg(list,OS_32,a,scratch_register);
list.concat(taicpu.op_reg_reg_reg(A_CMPW,NR_CR0,reg,scratch_register));
rg.ungetregisterint(list,scratch_register);
rgint.ungetregister(list,scratch_register);
end
else
if (a <= $ffff) then
list.concat(taicpu.op_reg_reg_const(A_CMPLWI,NR_CR0,reg,a))
else
begin
scratch_register := rg.getregisterint(list,OS_INT);
scratch_register := rgint.getregister(list,R_SUBWHOLE);
a_load_const_reg(list,OS_32,a,scratch_register);
list.concat(taicpu.op_reg_reg_reg(A_CMPLW,NR_CR0,reg,scratch_register));
rg.ungetregisterint(list,scratch_register);
rgint.ungetregister(list,scratch_register);
end;
a_jmp(list,A_BC,TOpCmp2AsmCond[cmp_op],0,l);
end;
@ -760,12 +761,12 @@ const
end;
procedure tcgppc.g_save_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);
procedure tcgppc.g_save_standard_registers(list:Taasmoutput);
begin
{$warning FIX ME}
end;
procedure tcgppc.g_restore_standard_registers(list : taasmoutput; usedinproc : Tsuperregisterset);
procedure tcgppc.g_restore_standard_registers(list:Taasmoutput);
begin
{$warning FIX ME}
end;
@ -933,7 +934,7 @@ const
for regcounter:=RS_F14 to RS_F31 do
begin
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in rg.used_in_proc_other then
if regidx in rgfpu.used_in_proc then
begin
usesfpr:= true;
firstregfpu:=regcounter;
@ -945,7 +946,7 @@ const
if not (po_assembler in current_procinfo.procdef.procoptions) then
for regcounter2:=firstsaveintreg to RS_R31 do
begin
if regcounter2 in rg.used_in_proc_int then
if regcounter2 in rgint.used_in_proc then
begin
usesgpr:=true;
firstreggpr:=regcounter2;
@ -1029,7 +1030,7 @@ const
for regcounter:=firstregfpu to RS_F31 do
begin
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in rg.used_in_proc_other then
if regidx in rgfpu.used_in_proc then
begin
a_loadfpu_reg_ref(list,OS_F64,newreg(R_FPUREGISTER,regcounter,R_SUBNONE),href);
dec(href.offset,8);
@ -1055,7 +1056,7 @@ const
reference_reset_base(href,NR_R12,-4);
for regcounter2:=firstsaveintreg to RS_R31 do
begin
if regcounter2 in rg.used_in_proc_int then
if regcounter2 in rgint.used_in_proc then
begin
usesgpr:=true;
a_load_reg_ref(list,OS_INT,OS_INT,newreg(R_INTREGISTER,regcounter2,R_SUBNONE),href);
@ -1150,7 +1151,7 @@ const
for regcounter:=RS_F14 to RS_F31 do
begin
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in rg.used_in_proc_other then
if regidx in rgfpu.used_in_proc then
begin
usesfpr:=true;
firstregfpu:=regcounter;
@ -1162,7 +1163,7 @@ const
if not (po_assembler in current_procinfo.procdef.procoptions) then
for regcounter2:=firstsaveintreg to RS_R31 do
begin
if regcounter2 in rg.used_in_proc_int then
if regcounter2 in rgint.used_in_proc then
begin
usesgpr:=true;
firstreggpr:=regcounter2;
@ -1184,7 +1185,7 @@ const
for regcounter := firstregfpu to RS_F31 do
begin
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in rg.used_in_proc_other then
if regidx in rgfpu.used_in_proc then
begin
a_loadfpu_ref_reg(list,OS_F64,href,newreg(R_FPUREGISTER,regcounter,R_SUBNONE));
dec(href.offset,8);
@ -1197,7 +1198,7 @@ const
for regcounter2:=firstsaveintreg to RS_R31 do
begin
if regcounter2 in rg.used_in_proc_int then
if regcounter2 in rgint.used_in_proc then
begin
usesgpr:=true;
a_load_ref_reg(list,OS_INT,OS_INT,href,newreg(R_INTREGISTER,regcounter2,R_SUBNONE));
@ -1283,8 +1284,8 @@ const
if not (po_assembler in current_procinfo.procdef.procoptions) then
for regcounter:=RS_F14 to RS_F31 do
begin
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in rg.used_in_proc_other then
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in tcgppc(cg).rgfpu.used_in_proc then
begin
usesfpr:=true;
firstregfpu:=regcounter;
@ -1295,7 +1296,7 @@ const
if not (po_assembler in current_procinfo.procdef.procoptions) then
for regcounter2:=firstsaveintreg to RS_R31 do
begin
if regcounter2 in rg.used_in_proc_int then
if regcounter2 in tcgppc(cg).rgint.used_in_proc then
begin
usesgpr:=true;
firstreggpr:=regcounter2;
@ -1355,7 +1356,7 @@ const
for regcounter:=RS_F14 to RS_F31 do
begin
regidx:=findreg_by_number(newreg(R_FPUREGISTER,regcounter,R_SUBWHOLE));
if regidx in rg.used_in_proc_other then
if regidx in tcgppc(cg).rgfpu.used_in_proc then
begin
usesfpr:=true;
firstregfpu:=regcounter;
@ -1367,7 +1368,7 @@ const
if not (po_assembler in current_procinfo.procdef.procoptions) then
for regcounter2:=RS_R13 to RS_R31 do
begin
if regcounter2 in rg.used_in_proc_int then
if regcounter2 in tcgppc(cg).rgint.used_in_proc then
begin
usesgpr:=true;
firstreggpr:=regcounter2;
@ -1610,7 +1611,7 @@ const
ref2.base,tmpref));
if freereg then
begin
rg.ungetregisterint(list,ref2.base);
rgint.ungetregister(list,ref2.base);
freereg := false;
end;
end
@ -1636,7 +1637,7 @@ const
(r <> ref2.base) then
list.concat(taicpu.op_reg_reg(A_MR,r,ref2.base));
if freereg then
rg.ungetregisterint(list,ref2.base);
rgint.ungetregister(list,ref2.base);
end;
{ ************* concatcopy ************ }
@ -1702,7 +1703,7 @@ const
{ load the address of source into src.base }
if loadref then
begin
src.base := rg.getregisterint(list,OS_ADDR);
src.base := rgint.getregister(list,R_SUBWHOLE);
a_load_ref_reg(list,OS_32,OS_32,source,src.base);
orgsrc := false;
end
@ -1711,7 +1712,7 @@ const
((source.index <> NR_NO) and
((source.offset + longint(len)) > high(smallint))) then
begin
src.base := rg.getregisterint(list,OS_ADDR);
src.base := rgint.getregister(list,R_SUBWHOLE);
a_loadaddr_ref_reg(list,source,src.base);
orgsrc := false;
end
@ -1728,7 +1729,7 @@ const
((dest.index <> NR_NO) and
((dest.offset + longint(len)) > high(smallint))) then
begin
dst.base := rg.getregisterint(list,OS_ADDR);
dst.base := rgint.getregister(list,R_SUBWHOLE);
a_loadaddr_ref_reg(list,dest,dst.base);
orgdst := false;
end
@ -1750,7 +1751,7 @@ const
inc(src.offset,8);
list.concat(taicpu.op_reg_reg_const(A_SUBI,src.base,src.base,8));
list.concat(taicpu.op_reg_reg_const(A_SUBI,dst.base,dst.base,8));
countreg := rg.getregisterint(list,OS_INT);
countreg := rgint.getregister(list,R_SUBWHOLE);
a_load_const_reg(list,OS_32,count,countreg);
{ explicitely allocate R_0 since it can be used safely here }
{ (for holding date that's being copied) }
@ -1761,7 +1762,7 @@ const
list.concat(taicpu.op_reg_ref(A_LFDU,NR_F0,src));
list.concat(taicpu.op_reg_ref(A_STFDU,NR_F0,dst));
a_jmp(list,A_BC,C_NE,0,lab);
rg.ungetregisterint(list,countreg);
rgint.ungetregister(list,countreg);
a_reg_dealloc(list,NR_F0);
len := len mod 8;
end;
@ -1803,7 +1804,7 @@ const
inc(src.offset,4);
list.concat(taicpu.op_reg_reg_const(A_SUBI,src.base,src.base,4));
list.concat(taicpu.op_reg_reg_const(A_SUBI,dst.base,dst.base,4));
countreg := rg.getregisterint(list,OS_INT);
countreg := rgint.getregister(list,R_SUBWHOLE);
a_load_const_reg(list,OS_32,count,countreg);
{ explicitely allocate R_0 since it can be used safely here }
{ (for holding date that's being copied) }
@ -1814,7 +1815,7 @@ const
list.concat(taicpu.op_reg_ref(A_LWZU,NR_R0,src));
list.concat(taicpu.op_reg_ref(A_STWU,NR_R0,dst));
a_jmp(list,A_BC,C_NE,0,lab);
rg.ungetregisterint(list,countreg);
rgint.ungetregister(list,countreg);
a_reg_dealloc(list,NR_R0);
len := len mod 4;
end;
@ -1858,9 +1859,9 @@ const
reference_release(list,source);
end
else
rg.ungetregisterint(list,src.base);
rgint.ungetregister(list,src.base);
if not orgdst then
rg.ungetregisterint(list,dst.base);
rgint.ungetregister(list,dst.base);
if delsource then
tg.ungetiftemp(list,source);
end;
@ -1912,7 +1913,7 @@ const
a_label(list,ok);
list.concat(Taicpu.op_reg_reg(A_SUB,S_L,r,rsp));
rg.ungetregisterint(list,r);
rgint.ungetregister(list,r);
{ now reload EDI }
rg.getexplicitregisterint(list,NR_EDI);
list.concat(Taicpu.op_ref_reg(A_MOV,S_L,lenref,r));
@ -1977,7 +1978,7 @@ const
S_W : list.concat(Taicpu.Op_none(A_MOVSW,S_NO));
S_L : list.concat(Taicpu.Op_none(A_MOVSD,S_NO));
end;
rg.ungetregisterint(list,r);
rgint.ungetregister(list,r);
r2.number:=NR_ESI;
list.concat(Taicpu.op_reg(A_POP,S_L,r2));
r2.number:=NR_ECX;
@ -2053,13 +2054,13 @@ const
{ otherwise it may be overwritten (and it's still used afterwards) }
freeindex := false;
if (getsupreg(ref.index) >= first_int_supreg) and
(getsupreg(ref.index) in rg.unusedregsint) then
(getsupreg(ref.index) in rgint.unusedregs) then
begin
rg.getexplicitregisterint(list,ref.index);
rgint.getexplicitregister(list,ref.index);
orgindex := ref.index;
freeindex := true;
end;
tmpreg := rg.getregisterint(list,OS_ADDR);
tmpreg := rgint.getregister(list,R_SUBWHOLE);
if not assigned(ref.symbol) and
(cardinal(ref.offset-low(smallint)) <=
high(smallint)-low(smallint)) then
@ -2076,7 +2077,7 @@ const
end;
ref.base := tmpreg;
if freeindex then
rg.ungetregisterint(list,orgindex);
rgint.ungetregister(list,orgindex);
end
end
else
@ -2170,7 +2171,7 @@ const
largeOffset:= (cardinal(ref.offset-low(smallint)) >
high(smallint)-low(smallint));
tmpreg := rg.getregisterint(list,OS_ADDR);
tmpreg := rgint.getregister(list,R_SUBWHOLE);
tmpregUsed:= false;
if assigned(ref.symbol) then
@ -2221,7 +2222,7 @@ const
(cardinal(ref.offset-low(smallint)) >
high(smallint)-low(smallint)) then
begin
tmpreg := rg.getregisterint(list,OS_ADDR);
tmpreg := rgint.getregister(list,R_SUBWHOLE);
reference_reset(tmpref);
tmpref.symbol := ref.symbol;
tmpref.offset := ref.offset;
@ -2240,7 +2241,7 @@ const
end;
if (tmpreg <> NR_NO) then
rg.ungetregisterint(list,tmpreg);
rgint.ungetregister(list,tmpreg);
end;
@ -2334,22 +2335,22 @@ const
end
else if ((value shr 32) = 0) then
begin
tmpreg := rg.getregisterint(list,OS_32);
tmpreg := tcgppc(cg).rgint.getregister(list,R_SUBWHOLE);
cg.a_load_const_reg(list,OS_32,cardinal(value),tmpreg);
list.concat(taicpu.op_reg_reg_reg(ops[issub,2],
regdst.reglo,regsrc.reglo,tmpreg));
rg.ungetregisterint(list,tmpreg);
tcgppc(cg).rgint.ungetregister(list,tmpreg);
list.concat(taicpu.op_reg_reg(ops[issub,3],
regdst.reghi,regsrc.reghi));
end
else
begin
tmpreg64.reglo := rg.getregisterint(list,OS_32);
tmpreg64.reghi := rg.getregisterint(list,OS_32);
tmpreg64.reglo := tcgppc(cg).rgint.getregister(list,R_SUBWHOLE);
tmpreg64.reghi := tcgppc(cg).rgint.getregister(list,R_SUBWHOLE);
a_load64_const_reg(list,value,tmpreg64);
a_op64_reg_reg_reg(list,op,tmpreg64,regsrc,regdst);
rg.ungetregisterint(list,tmpreg64.reglo);
rg.ungetregisterint(list,tmpreg64.reghi);
tcgppc(cg).rgint.ungetregister(list,tmpreg64.reglo);
tcgppc(cg).rgint.ungetregister(list,tmpreg64.reghi);
end
end
else
@ -2371,7 +2372,13 @@ begin
end.
{
$Log$
Revision 1.127 2003-10-01 20:34:49 peter
Revision 1.128 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.127 2003/10/01 20:34:49 peter
* procinfo unit contains tprocinfo
* cginfo renamed to cgbase
* moved cgmessage to verbose

16
compiler/powerpc/cpubase.pas
View File

@ -130,10 +130,10 @@ uses
last_fpu_imreg = $fe;
{ MM Super register first and last }
first_mmx_supreg = RS_INVALID;
last_mmx_supreg = RS_INVALID;
first_mmx_imreg = RS_INVALID;
last_mmx_imreg = RS_INVALID;
first_mm_supreg = RS_INVALID;
last_mm_supreg = RS_INVALID;
first_mm_imreg = RS_INVALID;
last_mm_imreg = RS_INVALID;
{$warning TODO Calculate bsstart}
regnumber_count_bsstart = 64;
@ -725,7 +725,13 @@ implementation
end.
{
$Log$
Revision 1.70 2003-10-08 14:11:36 mazen
Revision 1.71 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.70 2003/10/08 14:11:36 mazen
+ Alignement field added to TParaLocation (=4 as 32 bits archs)
Revision 1.69 2003/10/01 20:34:49 peter

11
compiler/rgobj.pas
View File

@ -204,6 +204,8 @@ unit rgobj;
function spill_registers(list:Taasmoutput;headertai:tai;const regs_to_spill:string):boolean;
{# Adds an interference edge.}
procedure add_edge(u,v:Tsuperregister);
unusedregs,usableregs:Tsuperregisterset;
protected
regtype:Tregistertype;
{ default subregister used }
@ -215,7 +217,6 @@ unit rgobj;
{# Highest register allocated until now.}
maxreg:Tsuperregister;
usable_registers:string[32];
unusedregs,usableregs:Tsuperregisterset;
countusableregs:byte; {old regvars}
cpu_registers:byte;
igraph:Tinterferencegraph;
@ -1538,7 +1539,13 @@ end.
{
$Log$
Revision 1.83 2003-10-10 17:48:14 peter
Revision 1.84 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.83 2003/10/10 17:48:14 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

10
compiler/symdef.pas
View File

@ -3608,7 +3608,7 @@ implementation
begin
usedintregisters:=paramanager.get_volatile_registers_int(pocall_default);
usedfpuregisters:=paramanager.get_volatile_registers_fpu(pocall_default);
usedmmxregisters:=paramanager.get_volatile_registers_mmx(pocall_default);
usedmmxregisters:=paramanager.get_volatile_registers_mm(pocall_default);
end;
ppufile.putnormalset(usedintregisters);
@ -5924,7 +5924,13 @@ implementation
end.
{
$Log$
Revision 1.176 2003-10-10 17:48:14 peter
Revision 1.177 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.176 2003/10/10 17:48:14 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

48
compiler/x86/cgx86.pas
View File

@ -37,7 +37,7 @@ unit cgx86;
type
tcgx86 = class(tcg)
rgint,
rgmmx : trgcpu;
rgmm : trgcpu;
rgfpu : Trgx86fpu;
procedure init_register_allocators;override;
procedure done_register_allocators;override;
@ -45,9 +45,9 @@ unit cgx86;
function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
function getaddressregister(list:Taasmoutput):Tregister;override;
function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
function getmmxregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
procedure getexplicitregister(list:Taasmoutput;r:Tregister);override;
function getabtregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
function getabtintregister(list:Taasmoutput;size:Tcgsize):Tregister;override;
procedure ungetregister(list:Taasmoutput;r:Tregister);override;
procedure ungetreference(list:Taasmoutput;const r:Treference);override;
procedure allocexplicitregisters(list:Taasmoutput;rt:Tregistertype;r:Tsuperregisterset);override;
@ -178,7 +178,7 @@ unit cgx86;
procedure Tcgx86.init_register_allocators;
begin
rgint:=trgcpu.create(6,R_INTREGISTER,R_SUBWHOLE,#0#1#2#3#4#5,first_int_imreg,[RS_EBP]);
rgmmx:=trgcpu.create(8,R_MMXREGISTER,R_SUBNONE,#0#1#2#3#4#5#6#7,first_mmx_imreg,[]);
rgmm:=trgcpu.create(8,R_MMREGISTER,R_SUBNONE,#0#1#2#3#4#5#6#7,first_sse_imreg,[]);
rgfpu:=Trgx86fpu.create;
end;
@ -186,7 +186,7 @@ unit cgx86;
procedure Tcgx86.done_register_allocators;
begin
rgint.free;
rgmmx.free;
rgmm.free;
rgfpu.free;
end;
@ -205,13 +205,13 @@ unit cgx86;
function Tcgx86.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
begin
result:=rgfpu.getregisterfpu(list);
result:=trgx86fpu(rgfpu).getregisterfpu(list);
end;
function Tcgx86.getmmxregister(list:Taasmoutput;size:Tcgsize):Tregister;
function Tcgx86.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
begin
result:=rgmmx.getregister(list,R_SUBNONE);
result:=rgmm.getregister(list,R_SUBNONE);
end;
@ -220,15 +220,15 @@ unit cgx86;
case getregtype(r) of
R_INTREGISTER :
rgint.getexplicitregister(list,r);
R_MMXREGISTER :
rgmmx.getexplicitregister(list,r);
R_SSEREGISTER :
rgmm.getexplicitregister(list,r);
else
internalerror(200310091);
end;
end;
function tcgx86.getabtregister(list:Taasmoutput;size:Tcgsize):Tregister;
function tcgx86.getabtintregister(list:Taasmoutput;size:Tcgsize):Tregister;
begin
result:=rgint.getabtregister(list,cgsize2subreg(size));
end;
@ -241,8 +241,8 @@ unit cgx86;
rgint.ungetregister(list,r);
R_FPUREGISTER :
rgfpu.ungetregisterfpu(list,r);
R_MMXREGISTER :
rgmmx.ungetregister(list,r);
R_SSEREGISTER :
rgmm.ungetregister(list,r);
else
internalerror(200310091);
end;
@ -263,8 +263,8 @@ unit cgx86;
case rt of
R_INTREGISTER :
rgint.allocexplicitregisters(list,r);
R_MMXREGISTER :
rgmmx.allocexplicitregisters(list,r);
R_SSEREGISTER :
rgmm.allocexplicitregisters(list,r);
else
internalerror(200310092);
end;
@ -276,8 +276,8 @@ unit cgx86;
case rt of
R_INTREGISTER :
rgint.deallocexplicitregisters(list,r);
R_MMXREGISTER :
rgmmx.deallocexplicitregisters(list,r);
R_SSEREGISTER :
rgmm.deallocexplicitregisters(list,r);
else
internalerror(200310093);
end;
@ -308,9 +308,9 @@ unit cgx86;
{ Int }
rgint.do_register_allocation(list,headertai);
list.translate_registers(R_INTREGISTER,rgint.colour);
{ MMX }
rgmmx.do_register_allocation(list,headertai);
list.translate_registers(R_MMXREGISTER,rgmmx.colour);
{ SSE }
rgmm.do_register_allocation(list,headertai);
list.translate_registers(R_MMREGISTER,rgmm.colour);
end;
@ -1735,7 +1735,13 @@ unit cgx86;
end.
{
$Log$
Revision 1.76 2003-10-10 17:48:14 peter
Revision 1.77 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.76 2003/10/10 17:48:14 peter
* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
* tregisteralloctor renamed to trgobj
* removed rgobj from a lot of units

21
compiler/x86/cpubase.pas
View File

@ -146,10 +146,15 @@ uses
RS_MM15 = $0f;
{ Float Super register first and last }
first_mmx_supreg = $00;
last_mmx_supreg = $07;
first_mmx_imreg = $08;
last_mmx_imreg = $fe;
first_sse_supreg = $00;
{$ifdef x86_64}
last_sse_supreg = $0f;
first_sse_imreg = $10;
{$else x86_64}
last_sse_supreg = $07;
first_sse_imreg = $08;
{$endif x86_64}
last_sse_imreg = $fe;
{ The subregister that specifies the entire register }
{$ifdef x86_64}
@ -563,7 +568,13 @@ implementation
end.
{
$Log$
Revision 1.24 2003-10-09 21:31:37 daniel
Revision 1.25 2003-10-11 16:06:42 florian
* fixed some MMX<->SSE
* started to fix ppc, needs an overhaul
+ stabs info improve for spilling, not sure if it works correctly/completly
- MMX_SUPPORT removed from Makefile.fpc
Revision 1.24 2003/10/09 21:31:37 daniel
* Register allocator splitted, ans abstract now
Revision 1.23 2003/10/03 22:00:33 peter