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* m68k: make sure right is in an address register for muln,addn,orn,xorn, before calling the low level cg

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This commit is contained in:
Karoly Balogh 2022-03-15 10:11:18 +01:00
parent 3317078ae1
commit 22eb1e099f
1 changed files with 8 additions and 0 deletions
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8
compiler/m68k/n68kadd.pas
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@ -456,6 +456,14 @@ implementation
exit;
end;
if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) and
isaddressregister(right.location.register) and
(nodetype in [muln,andn,orn,xorn]) then
begin
//list.concat(tai_comment.create(strpnew('second_addordinal: move addr to data')));
hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,cgsize_orddef(def_cgsize(right.resultdef)),false);
end;
if isaddressregister(left.location.register) and (nodetype in [addn,subn]) then
location.register := cg.getaddressregister(current_asmdata.CurrAsmList)
else