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* fixes in the 16 to 32-bit multiplication in ti8086addnode.second_mul

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git-svn-id: trunk@26497 -
This commit is contained in:
nickysn 2014-01-18 00:38:46 +00:00
parent f4726e068b
commit 2602f379d7
1 changed files with 3 additions and 11 deletions
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14
compiler/i8086/n8086add.pas
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@ -596,15 +596,6 @@ interface
procedure ti8086addnode.second_mul(unsigned: boolean); procedure ti8086addnode.second_mul(unsigned: boolean);
procedure add_mov(instr: Taicpu);
begin
{ Notify the register allocator that we have written a move instruction so
it can try to eliminate it. }
if (instr.oper[0]^.reg<>current_procinfo.framepointer) and (instr.oper[0]^.reg<>NR_STACK_POINTER_REG) then
tcgx86(cg).add_move_instruction(instr);
current_asmdata.CurrAsmList.concat(instr);
end;
var reg:Tregister; var reg:Tregister;
ref:Treference; ref:Treference;
use_ref:boolean; use_ref:boolean;
@ -668,8 +659,9 @@ interface
{Allocate an imaginary 32-bit register, which consists of a pair of {Allocate an imaginary 32-bit register, which consists of a pair of
16-bit registers and store DX:AX into it} 16-bit registers and store DX:AX into it}
location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_32); location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
add_mov(Taicpu.Op_reg_reg(A_MOV,S_W,NR_AX,location.register)); cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,GetNextReg(location.register));
add_mov(Taicpu.Op_reg_reg(A_MOV,S_W,NR_DX,GetNextReg(location.register))); cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register);
end end
else else
begin begin