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* ARM: Never use the "BLX label" instruction. Use "BL label" instead.

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The linker will always change BL to BLX if necessary, but not vice versa (linker version dependent).
  "BLX label" ALWAYS changes the instruction set. It changes a processor in ARM state to Thumb state,
  or a processor in Thumb state to ARM state.

git-svn-id: trunk@36086 -
This commit is contained in:
yury 2017-05-04 15:55:55 +00:00
parent a358fec12b
commit 2ae3ce79bb
4 changed files with 17 additions and 43 deletions
compiler/arm
cgcpu.pas
rtl
android/arm
dllprt0.asprt0.as
arm
arm.inc

8
compiler/arm/cgcpu.pas
View File

@ -645,15 +645,9 @@ unit cgcpu;
r : treference;
sym : TAsmSymbol;
begin
{ check not really correct: should only be used for non-Thumb cpus }
// if (CPUARM_HAS_BLX_LABEL in cpu_capabilities[current_settings.cputype]) and
// { WinCE GNU AS (not sure if this applies in general) does not support BLX imm }
// (target_info.system<>system_arm_wince) then
// branchopcode:=A_BLX
// else
{ use always BL as newer binutils do not translate blx apparently
generating BL is also what clang and gcc do by default }
branchopcode:=A_BL;
branchopcode:=A_BL;
if not(weak) then
sym:=current_asmdata.RefAsmSymbol(s,AT_FUNCTION)
else

6
rtl/android/arm/dllprt0.as
View File

@ -47,9 +47,9 @@ FPC_SHARED_LIB_START:
str r0,[ip]
/* Call main */
blx FPC_LIB_MAIN_ANDROID
bl FPC_LIB_MAIN_ANDROID
/* Call library init */
blx FPC_LIB_INIT_ANDROID
bl FPC_LIB_INIT_ANDROID
ldmea fp, {fp, sp, pc}
@ -72,7 +72,7 @@ _haltproc:
.type _haltproc_eabi,#function
_haltproc_eabi:
/* Simply call libc exit(). _haltproc has the same declaration as exit. */
blx exit
bl exit
/* --------------------------------------------------------- */
.data

2
rtl/android/arm/prt0.as
View File

@ -91,7 +91,7 @@ _haltproc:
.type _haltproc_eabi,#function
_haltproc_eabi:
/* Simply call libc exit(). _haltproc has the same declaration as exit. */
blx exit
bl exit
/* --------------------------------------------------------- */
.data

44
rtl/arm/arm.inc
View File

@ -15,6 +15,13 @@
**********************************************************************}
{ IMPORTANT!
Never use the "BLX label" instruction! Use "BL label" instead.
The linker will always change BL to BLX if necessary, but not vice versa (linker version dependent).
"BLX label" ALWAYS changes the instruction set. It changes a processor in ARM state to Thumb state,
or a processor in Thumb state to ARM state.
}
{$ifndef FPC_SYSTEM_HAS_MOVE}
{$define FPC_SYSTEM_FPC_MOVE}
{$endif FPC_SYSTEM_HAS_MOVE}
@ -547,14 +554,7 @@ asm
{$endif}
stmfd sp!, {r1, lr}
sub r0, r1, #8
// We use always bl, as newer binutils apparently never translate blx into bl
// {$if defined(CPUARM_HAS_BLX_LABEL) and not(defined(WINCE))}
// blx InterLockedDecrement
// {$else defined(CPUARM_HAS_BLX_LABEL) and not(defined(WINCE))}
bl InterLockedDecrement
// {$endif defined(CPUARM_HAS_BLX_LABEL) and not(defined(WINCE))}
// InterLockedDecrement is a nice guy and sets the z flag for us
// if the reference count dropped to 0
ldmnefd sp!, {r1, pc}
@ -659,11 +659,7 @@ asm
// lock
{$ifdef FPC_PIC}
push {r0,lr}
{$ifdef CPUARM_HAS_BLX}
blx get_fpc_system_lock_ptr
{$else}
bl get_fpc_system_lock_ptr
{$endif CPUARM_HAS_BLX}
bl get_fpc_system_lock_ptr
mov r3,r0
pop {r0,lr}
{$else FPC_PIC}
@ -744,11 +740,7 @@ asm
// lock
{$ifdef FPC_PIC}
push {r0,lr}
{$ifdef CPUARM_HAS_BLX}
blx get_fpc_system_lock_ptr
{$else}
bl get_fpc_system_lock_ptr
{$endif CPUARM_HAS_BLX}
bl get_fpc_system_lock_ptr
mov r3,r0
pop {r0,lr}
{$else FPC_PIC}
@ -829,11 +821,7 @@ asm
// lock
{$ifdef FPC_PIC}
push {r0,r1,lr}
{$ifdef CPUARM_HAS_BLX}
blx get_fpc_system_lock_ptr
{$else}
bl get_fpc_system_lock_ptr
{$endif CPUARM_HAS_BLX}
bl get_fpc_system_lock_ptr
mov r3,r0
pop {r0,r1,lr}
{$else FPC_PIC}
@ -919,11 +907,7 @@ asm
// lock
{$ifdef FPC_PIC}
push {r0,r1,lr}
{$ifdef CPUARM_HAS_BLX}
blx get_fpc_system_lock_ptr
{$else}
bl get_fpc_system_lock_ptr
{$endif CPUARM_HAS_BLX}
bl get_fpc_system_lock_ptr
mov r3,r0
pop {r0,r1,lr}
{$else FPC_PIC}
@ -1012,11 +996,7 @@ asm
// lock
{$ifdef FPC_PIC}
push {r0,r1,r2,lr}
{$ifdef CPUARM_HAS_BLX}
blx get_fpc_system_lock_ptr
{$else}
bl get_fpc_system_lock_ptr
{$endif CPUARM_HAS_BLX}
bl get_fpc_system_lock_ptr
mov r12,r0
pop {r0,r1,r2,lr}
{$else FPC_PIC}