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* sparc uses softfloat routines so softfloat exception masking needs to be set properly

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git-svn-id: trunk@6888 -
This commit is contained in:
florian 2007-03-16 20:04:39 +00:00
parent 64c1da895f
commit 2d0c27e80d
2 changed files with 14 additions and 4 deletions
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3
rtl/sparc/mathu.inc
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@ -21,7 +21,6 @@ function GetRoundMode: TFPURoundingMode;
result:=TFPURoundingMode(get_fsr shr 30);
end;
function SetRoundMode(const RoundMode: TFPURoundingMode): TFPURoundingMode;
begin
set_fsr((get_fsr and $3fffffff) or (dword(RoundMode) shl 30));
@ -108,6 +107,8 @@ function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
{ update control register contents }
set_fsr(fsr);
softfloat_exception_mask:=dword(Mask);
end;

15
rtl/sparc/sparc.inc
View File

@ -45,11 +45,20 @@ function get_got : pointer;assembler;nostackframe;[public, alias: 'FPC_GETGOT'];
end;
{$define FPC_SYSTEM_HAS_SYSRESETFPU}
Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
begin
softfloat_exception_flags:=0;
softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
{ enable div by 0 and invalid operation fpu exceptions
round towards zero; ieee compliant arithmetics }
set_fsr((get_fsr and $3fbfffff) or $09000000);
end;
procedure fpc_cpuinit;
begin
{ enable div by 0 and invalid operation fpu exceptions }
{ round towards zero; ieee compliant arithmetics }
set_fsr((get_fsr and $3fbfffff) or $09000000);
SysResetFPU;
end;