paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-07 09:06:26 +02:00
Code Issues Packages Projects Releases Wiki Activity

* RiscV32 correctly set operands of div/mod operations, resolves #37743

Browse Source 
git-svn-id: trunk@46859 -
This commit is contained in:
florian 2020-09-12 21:32:11 +00:00
parent d7fe9914a7
commit 7f8f733963
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
compiler/riscv32/nrv32mat.pas
View File

@ -100,7 +100,7 @@ implementation
else else
op:=A_DIVU; op:=A_DIVU;
current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,denum,num,denum)); current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,num,num,denum));
end; end;
procedure trv32moddivnode.emit_mod_reg_reg(signed: boolean; denum, num: tregister); procedure trv32moddivnode.emit_mod_reg_reg(signed: boolean; denum, num: tregister);
@ -112,7 +112,7 @@ implementation
else else
op:=A_REMU; op:=A_REMU;
current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,denum,num,denum)); current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,num,num,denum));
end; end;