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* another missing part of r42916 ...

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git-svn-id: trunk@42919 -
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florian 2019-09-04 16:36:54 +00:00
parent 52ca09cc58
commit 8ffb72ddd0
2 changed files with 90 additions and 0 deletions
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.gitattributes vendored
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@ -29,6 +29,7 @@ compiler/aarch64/hlcgcpu.pas svneol=native#text/plain
compiler/aarch64/itcpugas.pas svneol=native#text/plain
compiler/aarch64/ncpuadd.pas svneol=native#text/plain
compiler/aarch64/ncpucnv.pas svneol=native#text/plain
compiler/aarch64/ncpucon.pas svneol=native#text/pascal
compiler/aarch64/ncpuinl.pas svneol=native#text/plain
compiler/aarch64/ncpumat.pas svneol=native#text/plain
compiler/aarch64/ncpumem.pas svneol=native#text/plain

89
compiler/aarch64/ncpucon.pas Normal file
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@ -0,0 +1,89 @@
{
Copyright (c) 2005 by Florian Klaempfl
Code generation for const nodes on the AArch64
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
****************************************************************************
}
unit ncpucon;
{$i fpcdefs.inc}
interface
uses
node,ncgcon,cpubase;
type
taarch64realconstnode = class(tcgrealconstnode)
function pass_1 : tnode;override;
procedure pass_generate_code;override;
end;
implementation
uses
verbose,
globtype,globals,
cpuinfo,
aasmbase,aasmtai,aasmdata,aasmcpu,
symdef,
defutil,
cgbase,cgutils,cgobj,
procinfo,
ncon;
{*****************************************************************************
TARMREALCONSTNODE
*****************************************************************************}
function taarch64realconstnode.pass_1 : tnode;
begin
result:=nil;
if IsFloatImmediate(tfloatdef(resultdef).floattype,value_real) then
expectloc:=LOC_MMREGISTER
else
result:=Inherited pass_1;
end;
procedure taarch64realconstnode.pass_generate_code;
var
hreg : TRegister;
begin
if IsFloatImmediate(tfloatdef(resultdef).floattype,value_real) then
begin
location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
current_asmdata.CurrAsmList.concat(taicpu.op_reg_realconst(A_FMOV,
location.register,value_real));
end
else if value_real=0.0 then
begin
location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
hreg:=newreg(R_MMREGISTER,getsupreg(location.register),R_SUBMM16B);
current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_EOR,
hreg,hreg,hreg));
end
else
Inherited pass_generate_code;
end;
begin
crealconstnode:=taarch64realconstnode;
end.