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Add explicit smallint typecast to first marameter of SarSmallint call to avoid range check errors

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git-svn-id: trunk@43613 -
This commit is contained in:
pierre 2019-11-29 23:26:45 +00:00
parent d8f1aacd78
commit 92b0ea7d02
3 changed files with 6 additions and 4 deletions
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4
compiler/riscv/cgrv.pas
View File

@ -564,6 +564,8 @@ unit cgrv;
OS_64, OS_64,
OS_S64: op:=A_LD; OS_S64: op:=A_LD;
{$else} {$else}
OS_64,OS_S64, { This only happens if tosize is smaller than fromsize }
{ We can therefore only consider the low 32-bit of the 64bit value }
OS_32, OS_32,
OS_S32: op:=A_LW; OS_S32: op:=A_LW;
{$endif} {$endif}
@ -594,7 +596,7 @@ unit cgrv;
else else
list.concat(taicpu.op_reg_const(A_LUI,register,(a shr 12) and $FFFFF)); list.concat(taicpu.op_reg_const(A_LUI,register,(a shr 12) and $FFFFF));
list.concat(taicpu.op_reg_reg_const(A_ADDI,register,register,SarSmallint(a shl 4,4))); list.concat(taicpu.op_reg_reg_const(A_ADDI,register,register,SarSmallint(smallint(a shl 4),4)));
end; end;
end; end;
end; end;

4
compiler/riscv/rgcpu.pas
View File

@ -70,7 +70,7 @@ unit rgcpu;
helplist.concat(taicpu.op_reg_const(A_LUI,hreg,((spilltemp.offset shr 12)+1) and $FFFFF)) helplist.concat(taicpu.op_reg_const(A_LUI,hreg,((spilltemp.offset shr 12)+1) and $FFFFF))
else else
helplist.concat(taicpu.op_reg_const(A_LUI,hreg,(spilltemp.offset shr 12) and $FFFFF)); helplist.concat(taicpu.op_reg_const(A_LUI,hreg,(spilltemp.offset shr 12) and $FFFFF));
helplist.concat(taicpu.op_reg_reg_const(A_ADDI,hreg,hreg,SarSmallint(spilltemp.offset shl 4,4))); helplist.concat(taicpu.op_reg_reg_const(A_ADDI,hreg,hreg,SarSmallint(smallint(spilltemp.offset shl 4),4)));
helplist.concat(taicpu.op_reg_reg_reg(A_ADD,hreg,hreg,spilltemp.base)); helplist.concat(taicpu.op_reg_reg_reg(A_ADD,hreg,hreg,spilltemp.base));
@ -105,7 +105,7 @@ unit rgcpu;
helplist.concat(taicpu.op_reg_const(A_LUI,hreg,((spilltemp.offset shr 12)+1) and $FFFFF)) helplist.concat(taicpu.op_reg_const(A_LUI,hreg,((spilltemp.offset shr 12)+1) and $FFFFF))
else else
helplist.concat(taicpu.op_reg_const(A_LUI,hreg,(spilltemp.offset shr 12) and $FFFFF)); helplist.concat(taicpu.op_reg_const(A_LUI,hreg,(spilltemp.offset shr 12) and $FFFFF));
helplist.concat(taicpu.op_reg_reg_const(A_ADDI,hreg,hreg,SarSmallint(spilltemp.offset shl 4,4))); helplist.concat(taicpu.op_reg_reg_const(A_ADDI,hreg,hreg,SarSmallint(smallint(spilltemp.offset shl 4),4)));
helplist.concat(taicpu.op_reg_reg_reg(A_ADD,hreg,hreg,spilltemp.base)); helplist.concat(taicpu.op_reg_reg_reg(A_ADD,hreg,hreg,spilltemp.base));

2
compiler/riscv64/cgcpu.pas
View File

@ -161,7 +161,7 @@ implementation
else else
list.concat(taicpu.op_reg_const(A_LUI,register,(a shr 12) and $FFFFF)); list.concat(taicpu.op_reg_const(A_LUI,register,(a shr 12) and $FFFFF));
list.concat(taicpu.op_reg_reg_const(A_ADDIW,register,register,SarSmallint(a shl 4,4))); list.concat(taicpu.op_reg_reg_const(A_ADDIW,register,register,SarSmallint(smallint(a shl 4),4)));
end end
else else
begin begin