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+ handle ref.base=NR_HL/NR_BC/NR_SP in tcgz80.a_loadaddr_ref_reg

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git-svn-id: branches/z80@45009 -
This commit is contained in:
nickysn 2020-04-22 22:37:20 +00:00
parent 9c27227d3a
commit 9c461d90bd
1 changed files with 13 additions and 0 deletions
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13
compiler/z80/cgcpu.pas
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@ -2195,6 +2195,19 @@ unit cgcpu;
if ref.offset<>0 then if ref.offset<>0 then
a_op_const_reg(list,OP_ADD,OS_16,ref.offset,r); a_op_const_reg(list,OP_ADD,OS_16,ref.offset,r);
end end
else if (ref.base=NR_SP) or (ref.base=NR_BC) or (ref.base=NR_DE) then
begin
getcpuregister(list,NR_H);
getcpuregister(list,NR_L);
list.Concat(taicpu.op_reg_const(A_LD,NR_HL,ref.offset));
list.Concat(taicpu.op_reg_reg(A_ADD,NR_HL,ref.base));
emit_mov(list,r,NR_L);
ungetcpuregister(list,NR_L);
emit_mov(list,GetNextReg(r),NR_H);
ungetcpuregister(list,NR_H);
if (ref.index<>NR_NO) then
a_op_reg_reg(list,OP_ADD,OS_16,ref.index,r);
end
else else
begin begin
a_load_const_reg(list,OS_16,ref.offset,r); a_load_const_reg(list,OS_16,ref.offset,r);