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* rtl and compiler compile with -Cfsse2
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commit
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@ -1400,12 +1400,44 @@ implementation
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procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
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var
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hr : tregister;
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hs : tmmshuffle;
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begin
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hr:=getmmregister(list,size);
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a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
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if realshuffle(shuffle) then
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begin
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hs:=shuffle^;
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removeshuffles(hs);
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a_opmm_reg_reg(list,op,size,hr,reg,@hs);
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end
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else
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a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
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ungetregister(list,hr);
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end;
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procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
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var
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hr : tregister;
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hs : tmmshuffle;
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begin
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hr:=getmmregister(list,size);
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a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
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if realshuffle(shuffle) then
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begin
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hs:=shuffle^;
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removeshuffles(hs);
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a_opmm_reg_reg(list,op,size,reg,hr,@hs);
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a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
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end
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else
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begin
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a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
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a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
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end;
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ungetregister(list,hr);
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end;
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@ -2000,7 +2032,10 @@ finalization
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end.
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{
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$Log$
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Revision 1.144 2003-12-24 00:10:02 florian
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Revision 1.145 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.144 2003/12/24 00:10:02 florian
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- delete parameter in cg64 methods removed
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Revision 1.143 2003/12/23 14:38:07 florian
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@ -27,7 +27,7 @@ unit n386mat;
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interface
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uses
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node,nmat,ncgmat;
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node,nmat,ncgmat,nx86mat;
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type
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ti386moddivnode = class(tmoddivnode)
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@ -40,12 +40,7 @@ interface
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function first_shlshr64bitint: tnode; override;
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end;
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ti386unaryminusnode = class(tcgunaryminusnode)
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{$ifdef SUPPORT_MMX}
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procedure second_mmx;override;
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{$endif SUPPORT_MMX}
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procedure second_float;override;
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function pass_1:tnode;override;
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ti386unaryminusnode = class(tx86unaryminusnode)
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end;
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ti386notnode = class(tcgnotnode)
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@ -355,133 +350,6 @@ implementation
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end;
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{*****************************************************************************
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TI386UNARYMINUSNODE
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*****************************************************************************}
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function ti386unaryminusnode.pass_1 : tnode;
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begin
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result:=nil;
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firstpass(left);
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if codegenerror then
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exit;
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if (left.resulttype.def.deftype=floatdef) then
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begin
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if (registersfpu < 1) then
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registersfpu := 1;
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expectloc:=LOC_FPUREGISTER;
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end
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{$ifdef SUPPORT_MMX}
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else
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if (cs_mmx in aktlocalswitches) and
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is_mmx_able_array(left.resulttype.def) then
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begin
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registers32:=left.registers32;
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registersfpu:=left.registersfpu;
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registersmmx:=left.registersmmx;
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if (left.location.loc<>LOC_MMXREGISTER) and
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(registersmmx<1) then
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registersmmx:=1;
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end
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{$endif SUPPORT_MMX}
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else
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inherited pass_1;
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end;
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{$ifdef SUPPORT_MMX}
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procedure ti386unaryminusnode.second_mmx;
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var
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op : tasmop;
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hreg : tregister;
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begin
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secondpass(left);
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location_reset(location,LOC_MMXREGISTER,OS_NO);
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hreg:=cg.getmmxregister(exprasmlist,OS_M64);
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emit_reg_reg(A_PXOR,S_NO,hreg,hreg);
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case left.location.loc of
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LOC_MMXREGISTER:
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begin
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location.register:=left.location.register;
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end;
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LOC_CMMXREGISTER:
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begin
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location.register:=cg.getmmxregister(exprasmlist,OS_M64);
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emit_reg_reg(A_MOVQ,S_NO,left.location.register,location.register);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE:
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begin
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reference_release(exprasmlist,left.location.reference);
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location.register:=cg.getmmxregister(exprasmlist,OS_M64);
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emit_ref_reg(A_MOVQ,S_NO,left.location.reference,location.register);
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end;
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else
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internalerror(200203225);
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end;
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if cs_mmx_saturation in aktlocalswitches then
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case mmx_type(resulttype.def) of
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mmxs8bit:
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op:=A_PSUBSB;
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mmxu8bit:
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op:=A_PSUBUSB;
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mmxs16bit,mmxfixed16:
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op:=A_PSUBSW;
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mmxu16bit:
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op:=A_PSUBUSW;
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end
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else
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case mmx_type(resulttype.def) of
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mmxs8bit,mmxu8bit:
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op:=A_PSUBB;
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mmxs16bit,mmxu16bit,mmxfixed16:
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op:=A_PSUBW;
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mmxs32bit,mmxu32bit:
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op:=A_PSUBD;
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end;
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emit_reg_reg(op,S_NO,location.register,hreg);
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cg.ungetregister(exprasmlist,hreg);
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emit_reg_reg(A_MOVQ,S_NO,hreg,location.register);
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end;
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{$endif SUPPORT_MMX}
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procedure ti386unaryminusnode.second_float;
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begin
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secondpass(left);
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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case left.location.loc of
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LOC_REFERENCE,
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LOC_CREFERENCE:
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begin
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reference_release(exprasmlist,left.location.reference);
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location.register:=NR_ST;
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cg.a_loadfpu_ref_reg(exprasmlist,
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def_cgsize(left.resulttype.def),
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left.location.reference,location.register);
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emit_none(A_FCHS,S_NO);
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end;
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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begin
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{ "load st,st" is ignored by the code generator }
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cg.a_loadfpu_reg_reg(exprasmlist,left.location.size,left.location.register,NR_ST);
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location.register:=NR_ST;
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emit_none(A_FCHS,S_NO);
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end;
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{
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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end;
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}
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else
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internalerror(200312241);
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end;
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end;
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{*****************************************************************************
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TI386NOTNODE
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*****************************************************************************}
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@ -580,14 +448,17 @@ implementation
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{$endif SUPPORT_MMX}
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begin
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cunaryminusnode:=ti386unaryminusnode;
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cmoddivnode:=ti386moddivnode;
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cshlshrnode:=ti386shlshrnode;
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cunaryminusnode:=ti386unaryminusnode;
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cnotnode:=ti386notnode;
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end.
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{
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$Log$
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Revision 1.67 2003-12-25 01:07:09 florian
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Revision 1.68 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.67 2003/12/25 01:07:09 florian
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+ $fputype directive support
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+ single data type operations with sse unit
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* fixed more x86-64 stuff
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@ -156,6 +156,20 @@ implementation
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reference_reset_base(href,tempparaloc.reference.index,tempparaloc.reference.offset);
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cg.a_loadfpu_reg_ref(exprasmlist,def_cgsize(left.resulttype.def),left.location.register,href);
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end;
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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size:=align(tfloatdef(left.resulttype.def).size,tempparaloc.alignment);
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inc(tcgcallnode(aktcallnode).pushedparasize,size);
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if tempparaloc.reference.index=NR_STACK_POINTER_REG then
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begin
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cg.g_stackpointer_alloc(exprasmlist,size);
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reference_reset_base(href,NR_STACK_POINTER_REG,0);
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end
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else
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reference_reset_base(href,tempparaloc.reference.index,tempparaloc.reference.offset);
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cg.a_loadmm_reg_ref(exprasmlist,def_cgsize(left.resulttype.def),def_cgsize(left.resulttype.def),left.location.register,href,mms_movescalar);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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@ -1131,7 +1145,10 @@ begin
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end.
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{
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$Log$
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Revision 1.147 2003-12-21 19:42:42 florian
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Revision 1.148 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.147 2003/12/21 19:42:42 florian
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* fixed ppc inlining stuff
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* fixed wrong unit writing
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+ added some sse stuff
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@ -670,6 +670,15 @@ implementation
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location_reset(l,LOC_REFERENCE,l.size);
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l.reference:=r;
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end;
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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tg.GetTemp(list,TCGSize2Size[l.size],tt_normal,r);
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cg.a_loadmm_reg_ref(list,l.size,l.size,l.register,r,mms_movescalar);
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location_release(list,l);
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location_reset(l,LOC_REFERENCE,l.size);
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l.reference:=r;
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end;
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LOC_CONSTANT,
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LOC_REGISTER,
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LOC_CREGISTER :
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@ -2039,7 +2048,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.178 2003-12-26 00:32:21 florian
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Revision 1.179 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.178 2003/12/26 00:32:21 florian
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+ fpu<->mm register conversion
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Revision 1.177 2003/12/24 00:10:02 florian
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@ -830,11 +830,14 @@ unit cgx86;
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)
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),
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( { vectorized/packed }
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{ because the logical packed single instructions have shorter op codes, we use always
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these
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}
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( { OS_F32 }
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A_NOP,A_ADDPS,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP
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A_NOP,A_ADDPS,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_XORPS
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),
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( { OS_F64 }
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A_NOP,A_ADDPD,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP
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A_NOP,A_ADDPD,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_NOP,A_XORPS
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)
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)
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);
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@ -1918,7 +1921,10 @@ unit cgx86;
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end.
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{
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$Log$
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Revision 1.98 2003-12-26 00:32:22 florian
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Revision 1.99 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.98 2003/12/26 00:32:22 florian
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+ fpu<->mm register conversion
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Revision 1.97 2003/12/25 12:01:35 florian
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@ -421,7 +421,8 @@ implementation
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cgsize2subreg:=R_SUBQ;
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OS_M64:
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cgsize2subreg:=R_SUBNONE;
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OS_F32,OS_F64:
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OS_F32,OS_F64,
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OS_M128,OS_MS128:
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cgsize2subreg:=R_SUBWHOLE;
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else
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internalerror(200301231);
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@ -534,7 +535,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.33 2003-12-25 01:07:09 florian
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Revision 1.34 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.33 2003/12/25 01:07:09 florian
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+ $fputype directive support
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+ single data type operations with sse unit
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* fixed more x86-64 stuff
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@ -240,6 +240,13 @@ unit nx86add;
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if (right.location.loc=LOC_MMREGISTER) and (op in [OP_ADD,OP_MUL]) then
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begin
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location.register:=right.location.register;
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{ force floating point reg. location to be written to memory,
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we don't force it to mm register because writing to memory
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allows probably shorter code because there is no direct fpu->mm register
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copy instruction
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}
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if left.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
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location_force_mem(exprasmlist,left.location);
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cg.a_opmm_loc_reg(exprasmlist,op,location.size,left.location,location.register,mms_movescalar);
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location_release(exprasmlist,left.location);
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end
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@ -247,6 +254,13 @@ unit nx86add;
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begin
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location_force_mmregscalar(exprasmlist,left.location,false);
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location.register:=left.location.register;
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{ force floating point reg. location to be written to memory,
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we don't force it to mm register because writing to memory
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allows probably shorter code because there is no direct fpu->mm register
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copy instruction
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}
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if right.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
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location_force_mem(exprasmlist,right.location);
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cg.a_opmm_loc_reg(exprasmlist,op,location.size,right.location,location.register,mms_movescalar);
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location_release(exprasmlist,right.location);
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end;
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@ -255,7 +269,10 @@ unit nx86add;
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end.
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{
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$Log$
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Revision 1.4 2003-12-26 00:32:22 florian
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Revision 1.5 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.4 2003/12/26 00:32:22 florian
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+ fpu<->mm register conversion
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Revision 1.3 2003/12/25 01:07:09 florian
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