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https://gitlab.com/freepascal.org/fpc/source.git
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289 lines
8.9 KiB
ObjectPascal
289 lines
8.9 KiB
ObjectPascal
{
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$Id$
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Copyright (c) 2000-2002 by Florian Klaempfl
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Common code generation for add nodes on the i386 and x86
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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{
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Common code generation for add nodes on the i386 and x86
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}
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unit nx86add;
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{$i fpcdefs.inc}
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interface
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uses
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node,nadd,ncgadd,cpubase;
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type
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tx86addnode = class(tcgaddnode)
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procedure second_addfloat;override;
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procedure second_addfloatsse;
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procedure pass_left_and_right(var pushedfpu:boolean);
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end;
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implementation
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uses
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globals,
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verbose,
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aasmtai,
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cpuinfo,
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cgbase,cgobj,cgx86,cga,
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pass_2,ncgutil,
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defutil;
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{*****************************************************************************
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AddFloat
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*****************************************************************************}
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procedure tx86addnode.pass_left_and_right(var pushedfpu:boolean);
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begin
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{ calculate the operator which is more difficult }
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firstcomplex(self);
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{ in case of constant put it to the left }
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if (left.nodetype=ordconstn) then
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swapleftright;
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secondpass(left);
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{ are too few registers free? }
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if location.loc=LOC_FPUREGISTER then
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pushedfpu:=maybe_pushfpu(exprasmlist,right.registersfpu,left.location)
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else
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pushedfpu:=false;
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secondpass(right);
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end;
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procedure tx86addnode.second_addfloat;
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var
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op : TAsmOp;
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resflags : tresflags;
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pushedfpu,
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cmpop : boolean;
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begin
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if use_sse(resulttype.def) then
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begin
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second_addfloatsse;
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exit;
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end;
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pass_left_and_right(pushedfpu);
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cmpop:=false;
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case nodetype of
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addn :
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op:=A_FADDP;
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muln :
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op:=A_FMULP;
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subn :
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op:=A_FSUBP;
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slashn :
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op:=A_FDIVP;
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ltn,lten,gtn,gten,
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equaln,unequaln :
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begin
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op:=A_FCOMPP;
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cmpop:=true;
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end;
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else
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internalerror(2003042214);
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end;
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if (right.location.loc<>LOC_FPUREGISTER) then
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begin
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cg.a_loadfpu_loc_reg(exprasmlist,right.location,NR_ST);
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if (right.location.loc <> LOC_CFPUREGISTER) and
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pushedfpu then
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location_freetemp(exprasmlist,left.location);
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if (left.location.loc<>LOC_FPUREGISTER) then
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begin
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cg.a_loadfpu_loc_reg(exprasmlist,left.location,NR_ST);
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if (left.location.loc <> LOC_CFPUREGISTER) and
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pushedfpu then
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location_freetemp(exprasmlist,left.location);
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end
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else
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begin
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{ left was on the stack => swap }
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toggleflag(nf_swaped);
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end;
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{ releases the right reference }
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location_release(exprasmlist,right.location);
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end
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{ the nominator in st0 }
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else if (left.location.loc<>LOC_FPUREGISTER) then
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begin
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cg.a_loadfpu_loc_reg(exprasmlist,left.location,NR_ST);
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if (left.location.loc <> LOC_CFPUREGISTER) and
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pushedfpu then
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location_freetemp(exprasmlist,left.location);
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end
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else
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begin
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{ fpu operands are always in the wrong order on the stack }
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toggleflag(nf_swaped);
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end;
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{ releases the left reference }
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if (left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
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location_release(exprasmlist,left.location);
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{ if we swaped the tree nodes, then use the reverse operator }
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if nf_swaped in flags then
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begin
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if (nodetype=slashn) then
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op:=A_FDIVRP
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else if (nodetype=subn) then
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op:=A_FSUBRP;
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end;
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{ to avoid the pentium bug
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if (op=FDIVP) and (opt_processors=pentium) then
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cg.a_call_name(exprasmlist,'EMUL_FDIVP')
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else
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}
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{ the Intel assemblers want operands }
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if op<>A_FCOMPP then
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begin
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emit_reg_reg(op,S_NO,NR_ST,NR_ST1);
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tcgx86(cg).dec_fpu_stack;
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end
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else
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begin
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emit_none(op,S_NO);
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tcgx86(cg).dec_fpu_stack;
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tcgx86(cg).dec_fpu_stack;
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end;
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{ on comparison load flags }
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if cmpop then
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begin
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cg.getexplicitregister(exprasmlist,NR_AX);
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emit_reg(A_FNSTSW,S_NO,NR_AX);
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emit_none(A_SAHF,S_NO);
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cg.ungetregister(exprasmlist,NR_AX);
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if nf_swaped in flags then
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begin
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case nodetype of
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equaln : resflags:=F_E;
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unequaln : resflags:=F_NE;
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ltn : resflags:=F_A;
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lten : resflags:=F_AE;
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gtn : resflags:=F_B;
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gten : resflags:=F_BE;
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end;
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end
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else
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begin
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case nodetype of
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equaln : resflags:=F_E;
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unequaln : resflags:=F_NE;
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ltn : resflags:=F_B;
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lten : resflags:=F_BE;
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gtn : resflags:=F_A;
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gten : resflags:=F_AE;
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end;
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end;
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location_reset(location,LOC_FLAGS,OS_NO);
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location.resflags:=resflags;
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end
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else
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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location.register:=NR_ST;
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end;
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end;
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procedure tx86addnode.second_addfloatsse;
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var
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op : topcg;
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begin
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pass_left_right;
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if (nf_swaped in flags) then
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swapleftright;
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case nodetype of
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addn :
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op:=OP_ADD;
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muln :
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op:=OP_MUL;
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subn :
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op:=OP_SUB;
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slashn :
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op:=OP_DIV;
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else
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internalerror(200312231);
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end;
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location_reset(location,LOC_MMREGISTER,def_cgsize(resulttype.def));
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{ we can use only right as left operand if the operation is commutative }
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if (right.location.loc=LOC_MMREGISTER) and (op in [OP_ADD,OP_MUL]) then
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begin
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location.register:=right.location.register;
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{ force floating point reg. location to be written to memory,
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we don't force it to mm register because writing to memory
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allows probably shorter code because there is no direct fpu->mm register
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copy instruction
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}
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if left.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
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location_force_mem(exprasmlist,left.location);
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cg.a_opmm_loc_reg(exprasmlist,op,location.size,left.location,location.register,mms_movescalar);
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location_release(exprasmlist,left.location);
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end
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else
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begin
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location_force_mmregscalar(exprasmlist,left.location,false);
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location.register:=left.location.register;
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{ force floating point reg. location to be written to memory,
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we don't force it to mm register because writing to memory
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allows probably shorter code because there is no direct fpu->mm register
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copy instruction
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}
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if right.location.loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER] then
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location_force_mem(exprasmlist,right.location);
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cg.a_opmm_loc_reg(exprasmlist,op,location.size,right.location,location.register,mms_movescalar);
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location_release(exprasmlist,right.location);
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end;
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end;
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end.
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{
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$Log$
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Revision 1.5 2003-12-26 13:19:16 florian
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* rtl and compiler compile with -Cfsse2
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Revision 1.4 2003/12/26 00:32:22 florian
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+ fpu<->mm register conversion
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Revision 1.3 2003/12/25 01:07:09 florian
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+ $fputype directive support
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+ single data type operations with sse unit
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* fixed more x86-64 stuff
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Revision 1.2 2003/12/23 14:38:07 florian
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+ second_floataddsse implemented
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Revision 1.1 2003/10/13 01:58:04 florian
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* some ideas for mm support implemented
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}
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