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* do not cause an internal error when location_reg2string is called on a

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location where the registers have been translated (i.e. not imaginary), but
  GetNextReg is necessary to get some of the registers (only on 16/8-bit CPUs).
  The missing registers are indicated as '??'. This avoids a crash when
  compiling a system unit on i8086 with regvars enabled and withous -sr, while
  still giving the full list of registers when compiling with -sr.

git-svn-id: trunk@26276 -
This commit is contained in:
nickysn 2013-12-24 00:01:28 +00:00
parent 338d72f564
commit af49e50a3c
1 changed files with 20 additions and 5 deletions

25
compiler/cgutils.pas
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@ -291,16 +291,31 @@ uses
result:=std_regname(locreg.registerhi)+':'+std_regname(locreg.register);
{$elseif defined(cpu16bitalu)}
OS_64,OS_S64:
result:=std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
if getsupreg(locreg.register)<first_int_imreg then
result:='??:'+std_regname(locreg.registerhi)+':??:'+std_regname(locreg.register)
else
result:=std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
OS_32,OS_S32:
result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
if getsupreg(locreg.register)<first_int_imreg then
result:='??:'+std_regname(locreg.register)
else
result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
{$elseif defined(cpu8bitalu)}
OS_64,OS_S64:
result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.registerhi))))+':'+std_regname(GetNextReg(GetNextReg(locreg.registerhi)))+':'+GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
if getsupreg(locreg.register)<first_int_imreg then
result:='??:??:??:'+std_regname(locreg.registerhi)+':??:??:??:'+std_regname(locreg.register)
else
result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.registerhi))))+':'+std_regname(GetNextReg(GetNextReg(locreg.registerhi)))+':'+std_regname(GetNextReg(locreg.registerhi))+':'+std_regname(locreg.registerhi)+':'+std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
OS_32,OS_S32:
result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
if getsupreg(locreg.register)<first_int_imreg then
result:='??:??:??:'+std_regname(locreg.register)
else
result:=std_regname(GetNextReg(GetNextReg(GetNextReg(locreg.register))))+':'+std_regname(GetNextReg(GetNextReg(locreg.register)))+':'+std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
OS_16,OS_S16:
result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
if getsupreg(locreg.register)<first_int_imreg then
result:='??:'+std_regname(locreg.register)
else
result:=std_regname(GetNextReg(locreg.register))+':'+std_regname(locreg.register);
{$endif}
else
result:=std_regname(locreg.register);