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* x86: Refactored CMOV optimisations and permitted the use of constants in some cases.
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
5f3749dc49
commit
bab60d819f
@ -87,7 +87,7 @@ Unit AoptObj;
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{ is Reg currently in use }
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Function IsUsed(Reg: TRegister): Boolean;
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{ get all the currently used registers }
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Function GetUsedRegs: TRegSet;
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Function GetUsedRegs: TRegSet; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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{ outputs the current set }
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Procedure Dump(var t : text);
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@ -549,7 +549,7 @@ Unit AoptObj;
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End;
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Function TUsedRegs.GetUsedRegs: TRegSet; inline;
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Function TUsedRegs.GetUsedRegs: TRegSet; {$ifdef USEINLINE}inline;{$endif USEINLINE}
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Begin
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GetUsedRegs := UsedRegs;
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End;
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@ -1395,6 +1395,7 @@ Unit AoptObj;
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procedure TAOptObj.AllocRegBetween(reg: tregister; p1, p2: tai; var initialusedregs: TAllUsedRegs);
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var
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hp, start: tai;
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Po: PInteger;
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removedsomething,
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firstRemovedWasAlloc,
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lastRemovedWasDealloc: boolean;
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@ -98,11 +98,11 @@ unit aoptx86;
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{ Attempts to allocate a volatile integer register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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function GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai; DontAlloc: Boolean = False): TRegister;
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{ Attempts to allocate a volatile MM register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function GetMMRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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function GetMMRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai; DontAlloc: Boolean = False): TRegister;
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{ checks whether loading a new value in reg1 overwrites the entirety of reg2 }
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class function Reg1WriteOverwritesReg2Entirely(reg1, reg2: tregister): boolean; static;
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@ -130,6 +130,8 @@ unit aoptx86;
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{ Returns true if the given MOV instruction can be safely converted to CMOV }
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class function CanBeCMOV(p : tai) : boolean; static;
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{ Like UpdateUsedRegs, but ignores deallocations }
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class procedure UpdateIntRegsNoDealloc(var AUsedRegs: TAllUsedRegs; p: Tai); static;
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{ Returns true if the given logic instruction can be converted into a BTx instruction (BT not included) }
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class function IsBTXAcceptable(p : tai) : boolean; static;
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@ -268,6 +270,10 @@ unit aoptx86;
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SPeepholeOptimization = '';
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{$endif DEBUG_AOPTCPU}
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LIST_STEP_SIZE = 4;
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{$ifndef 8086}
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MAX_CMOV_INSTRUCTIONS = 4;
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MAX_CMOV_REGISTERS = 8;
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{$endif 8086}
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type
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TJumpTrackingItem = class(TLinkedListItem)
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@ -1322,7 +1328,7 @@ unit aoptx86;
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{ Attempts to allocate a volatile integer register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function TX86AsmOptimizer.GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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function TX86AsmOptimizer.GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai; DontAlloc: Boolean = False): TRegister;
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var
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RegSet: TCPURegisterSet;
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CurrentSuperReg: Integer;
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@ -1385,7 +1391,8 @@ unit aoptx86;
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{ We have a free register available }
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Result := CurrentReg;
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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if not DontAlloc then
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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Exit;
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end;
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end;
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@ -1395,7 +1402,7 @@ unit aoptx86;
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{ Attempts to allocate a volatile MM register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function TX86AsmOptimizer.GetMMRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai): TRegister;
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function TX86AsmOptimizer.GetMMRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai; DontAlloc: Boolean = False): TRegister;
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var
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RegSet: TCPURegisterSet;
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CurrentSuperReg: Integer;
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@ -1450,7 +1457,8 @@ unit aoptx86;
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{ We have a free register available }
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Result := CurrentReg;
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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if not DontAlloc then
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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Exit;
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end;
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end;
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@ -2541,19 +2549,19 @@ unit aoptx86;
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class function TX86AsmOptimizer.IsRefSafe(const ref: PReference): Boolean;
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begin
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with ref^ do
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Result :=
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(index = NR_NO) and
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(
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Result :=
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(ref^.index = NR_NO) and
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(
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{$ifdef x86_64}
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(
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(base = NR_RIP) and
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(refaddr in [addr_pic, addr_pic_no_got])
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) or
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(
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(ref^.base = NR_RIP) and
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(ref^.refaddr in [addr_pic, addr_pic_no_got])
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) or
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{$endif x86_64}
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(base = NR_STACK_POINTER_REG) or
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(base = current_procinfo.framepointer)
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);
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(ref^.refaddr = addr_full) or
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(ref^.base = NR_STACK_POINTER_REG) or
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(ref^.base = current_procinfo.framepointer)
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);
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end;
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@ -11239,12 +11247,6 @@ unit aoptx86;
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begin
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CanBeCMOV:=assigned(p) and
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MatchInstruction(p,A_MOV,[S_W,S_L,S_Q]) and
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{ we can't use cmov ref,reg because
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ref could be nil and cmov still throws an exception
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if ref=nil but the mov isn't done (FK)
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or ((taicpu(p).oper[0]^.typ = top_ref) and
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(taicpu(p).oper[0]^.ref^.refaddr = addr_no))
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}
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(taicpu(p).oper[1]^.typ = top_reg) and
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(
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(taicpu(p).oper[0]^.typ = top_reg) or
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@ -11252,23 +11254,131 @@ unit aoptx86;
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it is not expected that this can cause a seg. violation }
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(
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(taicpu(p).oper[0]^.typ = top_ref) and
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{ TODO: Can we detect which references become constants at this
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stage so we don't have to do a blanket ban? }
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(taicpu(p).oper[0]^.ref^.refaddr <> addr_full) and
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IsRefSafe(taicpu(p).oper[0]^.ref)
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)
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);
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end;
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class procedure TX86AsmOptimizer.UpdateIntRegsNoDealloc(var AUsedRegs: TAllUsedRegs; p: Tai);
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begin
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{ Update integer registers, ignoring deallocations }
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repeat
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while assigned(p) and
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((p.typ in (SkipInstr - [ait_RegAlloc])) or
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(p.typ = ait_label) or
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((p.typ = ait_marker) and
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(tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd]))) do
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p := tai(p.next);
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while assigned(p) and
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(p.typ=ait_RegAlloc) Do
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begin
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if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
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begin
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case tai_regalloc(p).ratype of
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ra_alloc :
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IncludeRegInUsedRegs(tai_regalloc(p).reg, AUsedRegs);
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else
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;
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end;
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end;
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p := tai(p.next);
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end;
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until not(assigned(p)) or
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(not(p.typ in SkipInstr) and
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not((p.typ = ait_label) and
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labelCanBeSkipped(tai_label(p))));
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end;
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function TX86AsmOptimizer.OptPass2Jcc(var p : tai) : boolean;
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var
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hp1,hp2: tai;
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{$ifndef i8086}
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hp3,hp4,hpmov2, hp5: tai;
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l : Longint;
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condition : TAsmCond;
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{$endif i8086}
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carryadd_opcode : TAsmOp;
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symbol: TAsmSymbol;
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increg, tmpreg: TRegister;
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{$ifndef i8086}
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{ Code and variables specific to CMOV optimisations }
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hp3,hp4,hp5,
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hp_stop, hp_lblxxx, hp_lblyyy, hpmov1,hpmov2, hp_prev, hp_flagalloc, hp_prev2, hp_new, hp_jump: tai;
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l, c, w, x : Longint;
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condition, second_condition : TAsmCond;
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FoundMatchingJump, RegMatch: Boolean;
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RegWrites: array[0..MAX_CMOV_INSTRUCTIONS*2 - 1] of TRegister;
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ConstRegs: array[0..MAX_CMOV_REGISTERS - 1] of TRegister;
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ConstVals: array[0..MAX_CMOV_REGISTERS - 1] of TCGInt;
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{ Tries to convert a mov const,%reg instruction into a CMOV by reserving a
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new register to store the constant }
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function TryCMOVConst(p, search_start_p, stop_search_p: tai; var StoredCount: LongInt; var CMOVCount: LongInt): Boolean;
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var
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RegSize: TSubRegister;
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CurrentVal: TCGInt;
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NewReg: TRegister;
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X: ShortInt;
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begin
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Result := False;
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if not MatchOpType(taicpu(p), top_const, top_reg) then
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Exit;
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if StoredCount >= MAX_CMOV_REGISTERS then
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{ Arrays are full }
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Exit;
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{ Remember that CMOV can't encode 8-bit registers }
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case taicpu(p).opsize of
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S_W:
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RegSize := R_SUBW;
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S_L:
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RegSize := R_SUBD;
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S_Q:
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RegSize := R_SUBQ;
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else
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InternalError(2021100401);
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end;
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{ See if the value has already been reserved for another CMOV instruction }
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CurrentVal := taicpu(p).oper[0]^.val;
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for X := 0 to StoredCount - 1 do
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if ConstVals[X] = CurrentVal then
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begin
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ConstRegs[StoredCount] := ConstRegs[X];
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ConstVals[StoredCount] := CurrentVal;
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Result := True;
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Inc(StoredCount);
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{ Don't increase CMOVCount this time, since we're re-using a register }
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Exit;
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end;
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NewReg := GetIntRegisterBetween(RegSize, TmpUsedRegs, search_start_p, stop_search_p, True);
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if NewReg = NR_NO then
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{ No free registers }
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Exit;
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{ Reserve the register so subsequent TryCMOVConst calls don't all end
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up vying for the same register }
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IncludeRegInUsedRegs(NewReg, TmpUsedRegs);
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ConstRegs[StoredCount] := NewReg;
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ConstVals[StoredCount] := CurrentVal;
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Inc(StoredCount);
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{ Increment the CMOV count variable from OptPass2JCC, since the extra
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MOV required adds complexity and will cause diminishing returns
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sooner than normal. This is more of an approximate weighting than
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anything else. }
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Inc(CMOVCount);
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Result := True;
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end;
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{$endif i8086}
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begin
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result:=false;
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if GetNextInstruction(p,hp1) then
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@ -11542,7 +11652,8 @@ unit aoptx86;
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Result:=true;
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exit;
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end
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else if CPUX86_HAS_CMOV in cpu_capabilities[current_settings.cputype] then
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else if (CPUX86_HAS_CMOV in cpu_capabilities[current_settings.cputype]) and
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MatchInstruction(hp1,A_MOV,[S_W,S_L{$ifdef x86_64},S_Q{$endif x86_64}]) then
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begin
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{ check for
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jCC xxx
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@ -11556,47 +11667,272 @@ unit aoptx86;
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Change to:
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<several cmovs with inverted condition>
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jmp xxx
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jmp xxx (only for the 2nd case)
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}
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l:=0;
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while assigned(hp1) and
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CanBeCMOV(hp1) and
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{ stop on labels }
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not(hp1.typ=ait_label) do
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begin
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inc(l);
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hp5 := hp1;
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GetNextInstruction(hp1,hp1);
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end;
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if assigned(hp1) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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if (
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MatchInstruction(hp1, A_JMP, []) and
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(JumpTargetOp(taicpu(hp1))^.typ=top_ref) and
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(JumpTargetOp(taicpu(hp1))^.ref^.symbol=symbol)
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) or
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FindLabel(tasmlabel(symbol),hp1) then
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begin
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if (l<=4) and (l>0) then
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begin
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AllocRegBetween(NR_DEFAULTFLAGS, p, hp5, TmpUsedRegs);
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hp2 := p;
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hp_lblxxx := hp1;
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hp_flagalloc := nil;
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hp_stop := nil;
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FoundMatchingJump := False;
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condition:=inverse_cond(taicpu(p).condition);
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{ Remember the first instruction in the first block of MOVs }
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hpmov1 := hp1;
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TransferUsedRegs(TmpUsedRegs);
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while assigned(hp_lblxxx) and
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{ stop on labels }
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(hp_lblxxx.typ <> ait_label) do
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begin
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{ Keep track of all integer registers that are used }
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UpdateIntRegsNoDealloc(TmpUsedRegs, tai(hp2.Next));
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if hp_lblxxx.typ = ait_instruction then
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begin
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if (taicpu(hp_lblxxx).opcode = A_JMP) and
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IsJumpToLabel(taicpu(hp_lblxxx)) then
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begin
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hp_stop := hp_lblxxx;
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if (TAsmLabel(taicpu(hp_lblxxx).oper[0]^.ref^.symbol) = symbol) then
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begin
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{ We found Jcc xxx; <several movs>; Jmp xxx }
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FoundMatchingJump := True;
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Break;
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end;
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{ If it's not the jump we're looking for, it's
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possibly the "if..else" variant }
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end
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{ Check to see if we have a valid MOV instruction instead }
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else if (taicpu(hp_lblxxx).opcode <> A_MOV) or
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not (taicpu(hp_lblxxx).opsize in [S_W, S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) then
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Break
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else
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{ This will be a valid MOV }
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hp_stop := hp_lblxxx;
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end;
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hp2 := hp_lblxxx;
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GetNextInstruction(hp_lblxxx, hp_lblxxx);
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end;
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{ Just make sure the last MOV is included if there's no jump }
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if (hp_lblxxx.typ = ait_label) and MatchInstruction(hp_stop, A_MOV, []) then
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hp_stop := hp_lblxxx;
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{ Note, the logic behind using hp_stop over hp_lblxxx in the
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range for TryCMOVConst is so GetIntRegisterBetween doesn't
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fail when it reaches a JMP instruction in the "jcc xxx; movs;
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jmp yyy; xxx:; movs; yyy:" variation }
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if assigned(hp_lblxxx) and
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(
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{ If we found JMP xxx, we don't actually need a label
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(hp_lblxxx is the JMP instruction instead) }
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FoundMatchingJump or
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{ Make sure we actually have the right label }
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FindLabel(TAsmLabel(symbol), hp_lblxxx)
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) then
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begin
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{ Use TmpUsedRegs to track registers that we reserve }
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{ When allocating temporary registers, try to look one
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instruction back, as defining them before a CMP or TEST
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instruction will be faster, and also avoid picking a
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register that was only just deallocated }
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if GetLastInstruction(p, hp_prev) and
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MatchInstruction(hp_prev, [A_CMP, A_TEST, A_BSR, A_BSF, A_COMISS, A_COMISD, A_UCOMISS, A_UCOMISD, A_VCOMISS, A_VCOMISD, A_VUCOMISS, A_VUCOMISD], []) then
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begin
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{ Mark all the registers in the comparison as 'in use', even if they've just been deallocated }
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for l := 0 to 1 do
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with taicpu(hp_prev).oper[l]^ do
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case typ of
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top_reg:
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if getregtype(reg) = R_INTREGISTER then
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IncludeRegInUsedRegs(reg, TmpUsedRegs);
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top_ref:
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begin
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if
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{$ifdef x86_64}
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(ref^.base <> NR_RIP) and
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{$endif x86_64}
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(ref^.base <> NR_NO) then
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IncludeRegInUsedRegs(ref^.base, TmpUsedRegs);
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if (ref^.index <> NR_NO) then
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IncludeRegInUsedRegs(ref^.index, TmpUsedRegs);
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end
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else
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;
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end;
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{ When inserting instructions before hp_prev, try to insert
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them before the allocation of the FLAGS register }
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if not SetAndTest(FindRegAllocBackward(NR_DEFAULTFLAGS, tai(hp_prev.Previous)), hp_flagalloc) then
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{ If not found, set it equal to hp_prev so it's something sensible }
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hp_flagalloc := hp_prev;
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hp_prev2 := nil;
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{ When dealing with a comparison against zero, take
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note of the instruction before it to see if we can
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move instructions further back in order to benefit
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PostPeepholeOptTestOr.
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}
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if (
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(
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||||
(taicpu(hp_prev).opcode = A_CMP) and
|
||||
MatchOperand(taicpu(hp_prev).oper[0]^, 0)
|
||||
) or
|
||||
(
|
||||
(taicpu(hp_prev).opcode = A_TEST) and
|
||||
(
|
||||
OpsEqual(taicpu(hp_prev).oper[0]^, taicpu(hp_prev).oper[1]^) or
|
||||
MatchOperand(taicpu(hp_prev).oper[0]^, -1)
|
||||
)
|
||||
)
|
||||
) and
|
||||
GetLastInstruction(hp_prev, hp_prev2) then
|
||||
begin
|
||||
if (hp_prev2.typ = ait_instruction) and
|
||||
{ These instructions set the zero flag if the result is zero }
|
||||
MatchInstruction(hp_prev2, [A_ADD, A_SUB, A_OR, A_XOR, A_AND, A_POPCNT, A_LZCNT], []) then
|
||||
begin
|
||||
{ Also mark all the registers in this previous instruction
|
||||
as 'in use', even if they've just been deallocated }
|
||||
for l := 0 to 1 do
|
||||
with taicpu(hp_prev2).oper[l]^ do
|
||||
case typ of
|
||||
top_reg:
|
||||
if getregtype(reg) = R_INTREGISTER then
|
||||
IncludeRegInUsedRegs(reg, TmpUsedRegs);
|
||||
top_ref:
|
||||
begin
|
||||
if
|
||||
{$ifdef x86_64}
|
||||
(ref^.base <> NR_RIP) and
|
||||
{$endif x86_64}
|
||||
(ref^.base <> NR_NO) then
|
||||
IncludeRegInUsedRegs(ref^.base, TmpUsedRegs);
|
||||
|
||||
if (ref^.index <> NR_NO) then
|
||||
IncludeRegInUsedRegs(ref^.index, TmpUsedRegs);
|
||||
end
|
||||
else
|
||||
;
|
||||
end;
|
||||
end
|
||||
else
|
||||
{ Unsuitable instruction }
|
||||
hp_prev2 := nil;
|
||||
end;
|
||||
end
|
||||
else
|
||||
begin
|
||||
hp_prev := p;
|
||||
{ When inserting instructions before hp_prev, try to insert
|
||||
them before the allocation of the FLAGS register }
|
||||
if not SetAndTest(FindRegAllocBackward(NR_DEFAULTFLAGS, tai(p.Previous)), hp_flagalloc) then
|
||||
{ If not found, set it equal to p so it's something sensible }
|
||||
hp_flagalloc := p;
|
||||
hp_prev2 := nil;
|
||||
end;
|
||||
|
||||
l := 0;
|
||||
c := 0;
|
||||
|
||||
{ Initialise RegWrites, ConstRegs and ConstVals }
|
||||
FillChar(RegWrites[0], MAX_CMOV_INSTRUCTIONS * 2 * SizeOf(TRegister), 0);
|
||||
FillChar(ConstRegs[0], MAX_CMOV_REGISTERS * SizeOf(TRegister), 0);
|
||||
FillChar(ConstVals[0], MAX_CMOV_REGISTERS * SizeOf(TCGInt), 0);
|
||||
|
||||
while assigned(hp1) and
|
||||
{ Stop on the label we found }
|
||||
(hp1 <> hp_lblxxx) do
|
||||
begin
|
||||
case hp1.typ of
|
||||
ait_instruction:
|
||||
if MatchInstruction(hp1, A_MOV, [S_W, S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) then
|
||||
begin
|
||||
if CanBeCMOV(hp1) then
|
||||
Inc(l)
|
||||
else if not (cs_opt_size in current_settings.optimizerswitches) and
|
||||
{ CMOV with constants grows the code size }
|
||||
TryCMOVConst(hp1, hp_prev, hp_stop, c, l) then
|
||||
begin
|
||||
{ Register was reserved by TryCMOVConst and
|
||||
stored on ConstRegs[c] }
|
||||
end
|
||||
else
|
||||
Break;
|
||||
end
|
||||
else
|
||||
Break;
|
||||
else
|
||||
;
|
||||
end;
|
||||
GetNextInstruction(hp1,hp1);
|
||||
end;
|
||||
|
||||
if (hp1 = hp_lblxxx) then
|
||||
begin
|
||||
if (l <= MAX_CMOV_INSTRUCTIONS) and (l > 0) then
|
||||
begin
|
||||
{ Repurpose TmpUsedRegs to mark registers that we've defined }
|
||||
TmpUsedRegs[R_INTREGISTER].Clear;
|
||||
|
||||
x := 0;
|
||||
AllocRegBetween(NR_DEFAULTFLAGS, p, hp_lblxxx, UsedRegs);
|
||||
condition := inverse_cond(taicpu(p).condition);
|
||||
UpdateUsedRegs(tai(p.next));
|
||||
GetNextInstruction(p,hp1);
|
||||
|
||||
hp1 := hpmov1;
|
||||
repeat
|
||||
if not Assigned(hp1) then
|
||||
InternalError(2018062900);
|
||||
|
||||
taicpu(hp1).opcode:=A_CMOVcc;
|
||||
taicpu(hp1).condition:=condition;
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
GetNextInstruction(hp1,hp1);
|
||||
until not(CanBeCMOV(hp1));
|
||||
if (hp1.typ = ait_instruction) then
|
||||
begin
|
||||
{ Extra safeguard }
|
||||
if (taicpu(hp1).opcode <> A_MOV) then
|
||||
InternalError(2018062901);
|
||||
|
||||
{ Remember what hp1 is in case there's multiple aligns to get rid of }
|
||||
hp2 := hp1;
|
||||
if taicpu(hp1).oper[0]^.typ = top_const then
|
||||
begin
|
||||
if x >= MAX_CMOV_REGISTERS then
|
||||
InternalError(2021100410);
|
||||
|
||||
{ If it's in TmpUsedRegs, then this register
|
||||
is being used more than once and hence has
|
||||
already had its value defined (it gets
|
||||
added to UsedRegs through AllocRegBetween
|
||||
below) }
|
||||
if not TmpUsedRegs[R_INTREGISTER].IsUsed(ConstRegs[x]) then
|
||||
begin
|
||||
hp_new := taicpu.op_const_reg(A_MOV, taicpu(hp1).opsize, taicpu(hp1).oper[0]^.val, ConstRegs[x]);
|
||||
taicpu(hp_new).fileinfo := taicpu(hp_prev).fileinfo;
|
||||
|
||||
asml.InsertBefore(hp_new, hp_flagalloc);
|
||||
if Assigned(hp_prev2) then
|
||||
TrySwapMovOp(hp_prev2, hp_new);
|
||||
|
||||
IncludeRegInUsedRegs(ConstRegs[x], TmpUsedRegs);
|
||||
end
|
||||
else
|
||||
{ We just need an instruction between hp_prev and hp1
|
||||
where we know the register is marked as in use }
|
||||
hp_new := hpmov1;
|
||||
|
||||
AllocRegBetween(ConstRegs[x], hp_new, hp1, UsedRegs);
|
||||
taicpu(hp1).loadreg(0, ConstRegs[x]);
|
||||
Inc(x);
|
||||
end;
|
||||
|
||||
taicpu(hp1).opcode := A_CMOVcc;
|
||||
taicpu(hp1).condition := condition;
|
||||
end;
|
||||
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
GetNextInstruction(hp1, hp1);
|
||||
until (hp1 = hp_lblxxx);
|
||||
|
||||
hp2 := hp_lblxxx;
|
||||
repeat
|
||||
if not Assigned(hp2) then
|
||||
InternalError(2018062910);
|
||||
@ -11643,138 +11979,343 @@ unit aoptx86;
|
||||
|
||||
if hp2.typ=ait_instruction then
|
||||
begin
|
||||
p:=hp2;
|
||||
Result:=True;
|
||||
p := hp2;
|
||||
Result := True;
|
||||
end
|
||||
else
|
||||
begin
|
||||
UpdateUsedRegs(tai(hp2.next));
|
||||
Result:=GetNextInstruction(hp2, p); { Instruction after the label }
|
||||
Result := GetNextInstruction(hp2, p); { Instruction after the label }
|
||||
|
||||
{ Remove the label if this is its final reference }
|
||||
if (tasmlabel(symbol).getrefs=0) then
|
||||
StripLabelFast(hp1);
|
||||
begin
|
||||
{ Make sure the aligns get stripped too }
|
||||
hp1 := tai(hp_lblxxx.Previous);
|
||||
while Assigned(hp1) and (hp1.typ = ait_align) do
|
||||
begin
|
||||
hp_lblxxx := hp1;
|
||||
hp1 := tai(hp_lblxxx.Previous);
|
||||
end;
|
||||
StripLabelFast(hp_lblxxx);
|
||||
end;
|
||||
end;
|
||||
|
||||
exit;
|
||||
Exit;
|
||||
end;
|
||||
end
|
||||
else
|
||||
else if assigned(hp_lblxxx) and
|
||||
{ check further for
|
||||
jCC xxx
|
||||
<several movs 1>
|
||||
jmp yyy
|
||||
xxx:
|
||||
<several movs 2>
|
||||
yyy:
|
||||
}
|
||||
(l <= MAX_CMOV_INSTRUCTIONS - 1) and
|
||||
{ hp1 should be pointing to jmp yyy }
|
||||
MatchInstruction(hp1, A_JMP, []) and
|
||||
{ real label and jump, no further references to the
|
||||
label are allowed }
|
||||
(TAsmLabel(symbol).getrefs=1) and
|
||||
FindLabel(TAsmLabel(symbol), hp_lblxxx) then
|
||||
begin
|
||||
{ check further for
|
||||
jCC xxx
|
||||
<several movs 1>
|
||||
jmp yyy
|
||||
xxx:
|
||||
<several movs 2>
|
||||
yyy:
|
||||
}
|
||||
{ hp2 points to jmp yyy }
|
||||
hp2:=hp1;
|
||||
{ skip hp1 to xxx (or an align right before it) }
|
||||
GetNextInstruction(hp1, hp1);
|
||||
hp_jump := hp1;
|
||||
|
||||
if assigned(hp2) and
|
||||
assigned(hp1) and
|
||||
(l<=3) and
|
||||
(hp2.typ=ait_instruction) and
|
||||
(taicpu(hp2).is_jmp) and
|
||||
(taicpu(hp2).condition=C_None) and
|
||||
{ real label and jump, no further references to the
|
||||
label are allowed }
|
||||
(tasmlabel(symbol).getrefs=1) and
|
||||
FindLabel(tasmlabel(symbol),hp1) then
|
||||
begin
|
||||
l:=0;
|
||||
{ skip hp1 to <several moves 2> }
|
||||
if (hp1.typ = ait_align) then
|
||||
GetNextInstruction(hp1, hp1);
|
||||
{ Don't set c to zero }
|
||||
l := 0;
|
||||
w := 0;
|
||||
|
||||
GetNextInstruction(hp1, hpmov2);
|
||||
GetNextInstruction(hp_lblxxx, hpmov2);
|
||||
|
||||
hp1 := hpmov2;
|
||||
while assigned(hp1) and
|
||||
CanBeCMOV(hp1) do
|
||||
begin
|
||||
inc(l);
|
||||
hp5 := hp1;
|
||||
GetNextInstruction(hp1, hp1);
|
||||
end;
|
||||
{ hp1 points to yyy (or an align right before it) }
|
||||
hp3 := hp1;
|
||||
if assigned(hp1) and
|
||||
FindLabel(tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol),hp1) then
|
||||
begin
|
||||
AllocRegBetween(NR_DEFAULTFLAGS, p, hp5, TmpUsedRegs);
|
||||
hp2 := hp_lblxxx;
|
||||
hp_lblyyy := hpmov2;
|
||||
|
||||
condition:=inverse_cond(taicpu(p).condition);
|
||||
UpdateUsedRegs(tai(p.next));
|
||||
GetNextInstruction(p,hp1);
|
||||
repeat
|
||||
taicpu(hp1).opcode:=A_CMOVcc;
|
||||
taicpu(hp1).condition:=condition;
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
GetNextInstruction(hp1,hp1);
|
||||
until not(assigned(hp1)) or
|
||||
not(CanBeCMOV(hp1));
|
||||
while assigned(hp_lblyyy) and
|
||||
{ stop on labels }
|
||||
(hp_lblyyy.typ <> ait_label) do
|
||||
begin
|
||||
{ Keep track of all integer registers that are used }
|
||||
UpdateIntRegsNoDealloc(TmpUsedRegs, tai(hp2.Next));
|
||||
if not MatchInstruction(hp_lblyyy, A_MOV, [S_W, S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) then
|
||||
Break;
|
||||
|
||||
condition:=inverse_cond(condition);
|
||||
if GetLastInstruction(hpmov2,hp1) then
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
hp1 := hpmov2;
|
||||
{ hp1 is now at <several movs 2> }
|
||||
while Assigned(hp1) and CanBeCMOV(hp1) do
|
||||
hp2 := hp_lblyyy;
|
||||
GetNextInstruction(hp_lblyyy, hp_lblyyy);
|
||||
end;
|
||||
|
||||
{ Analyse the second batch of MOVs to see if the setup is valid }
|
||||
hp1 := hpmov2;
|
||||
while assigned(hp1) and
|
||||
(hp1 <> hp_lblyyy) do
|
||||
begin
|
||||
case hp1.typ of
|
||||
ait_instruction:
|
||||
if MatchInstruction(hp1, A_MOV, [S_W, S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) then
|
||||
begin
|
||||
if CanBeCMOV(hp1) then
|
||||
Inc(l)
|
||||
else if not (cs_opt_size in current_settings.optimizerswitches)
|
||||
{ CMOV with constants grows the code size }
|
||||
and TryCMOVConst(hp1, hpmov2, hp_lblyyy, c, l) then
|
||||
begin
|
||||
{ Register was reserved by TryCMOVConst and
|
||||
stored on ConstRegs[c] }
|
||||
end
|
||||
else
|
||||
Break;
|
||||
end
|
||||
else
|
||||
Break;
|
||||
else
|
||||
;
|
||||
end;
|
||||
GetNextInstruction(hp1,hp1);
|
||||
end;
|
||||
|
||||
{ Repurpose TmpUsedRegs to mark registers that we've defined }
|
||||
TmpUsedRegs[R_INTREGISTER].Clear;
|
||||
|
||||
if (l <= MAX_CMOV_INSTRUCTIONS - 1) and
|
||||
(hp1 = hp_lblyyy) and
|
||||
FindLabel(TAsmLabel(taicpu(hp_jump).oper[0]^.ref^.symbol), hp_lblyyy) then
|
||||
begin
|
||||
AllocRegBetween(NR_DEFAULTFLAGS, p, hp_lblyyy, UsedRegs);
|
||||
|
||||
second_condition := taicpu(p).condition;
|
||||
condition := inverse_cond(taicpu(p).condition);
|
||||
UpdateUsedRegs(tai(p.next));
|
||||
|
||||
{ Scan through the first set of MOVs to update UsedRegs,
|
||||
but don't process them yet }
|
||||
hp1 := hpmov1;
|
||||
repeat
|
||||
if not Assigned(hp1) then
|
||||
InternalError(2018062901);
|
||||
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
GetNextInstruction(hp1, hp1);
|
||||
until (hp1 = hp_lblxxx);
|
||||
|
||||
UpdateUsedRegs(tai(hp_lblxxx.next));
|
||||
|
||||
{ Process the second set of MOVs first,
|
||||
because if a destination register is
|
||||
shared between the first and second MOV
|
||||
sets, it is more efficient to turn the
|
||||
first one into a MOV instruction and place
|
||||
it before the CMP if possible, but we
|
||||
won't know which registers are shared
|
||||
until we've processed at least one list,
|
||||
so we might as well make it the second
|
||||
one since that won't be modified again. }
|
||||
|
||||
hp1 := hpmov2;
|
||||
repeat
|
||||
if not Assigned(hp1) then
|
||||
InternalError(2018062902);
|
||||
|
||||
if (hp1.typ = ait_instruction) then
|
||||
begin
|
||||
{ Extra safeguard }
|
||||
if (taicpu(hp1).opcode <> A_MOV) then
|
||||
InternalError(2018062903);
|
||||
|
||||
if taicpu(hp1).oper[0]^.typ = top_const then
|
||||
begin
|
||||
taicpu(hp1).opcode:=A_CMOVcc;
|
||||
taicpu(hp1).condition:=condition;
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
GetNextInstruction(hp1,hp1);
|
||||
RegMatch := False;
|
||||
|
||||
for x := 0 to c - 1 do
|
||||
if (ConstVals[x] = taicpu(hp1).oper[0]^.val) then
|
||||
begin
|
||||
RegMatch := True;
|
||||
|
||||
{ If it's in TmpUsedRegs, then this register
|
||||
is being used more than once and hence has
|
||||
already had its value defined (it gets
|
||||
added to UsedRegs through AllocRegBetween
|
||||
below) }
|
||||
if not TmpUsedRegs[R_INTREGISTER].IsUsed(ConstRegs[x]) then
|
||||
begin
|
||||
hp_new := taicpu.op_const_reg(A_MOV, taicpu(hp1).opsize, taicpu(hp1).oper[0]^.val, ConstRegs[x]);
|
||||
asml.InsertBefore(hp_new, hp_flagalloc);
|
||||
if Assigned(hp_prev2) then
|
||||
TrySwapMovOp(hp_prev2, hp_new);
|
||||
|
||||
IncludeRegInUsedRegs(ConstRegs[x], TmpUsedRegs);
|
||||
end
|
||||
else
|
||||
{ We just need an instruction between hp_prev and hp1
|
||||
where we know the register is marked as in use }
|
||||
hp_new := hpmov2;
|
||||
|
||||
AllocRegBetween(ConstRegs[x], hp_new, hp1, UsedRegs);
|
||||
taicpu(hp1).loadreg(0, ConstRegs[x]);
|
||||
Break;
|
||||
end;
|
||||
|
||||
if not RegMatch then
|
||||
InternalError(2021100411);
|
||||
end;
|
||||
|
||||
hp1 := p;
|
||||
taicpu(hp1).opcode := A_CMOVcc;
|
||||
taicpu(hp1).condition := second_condition;
|
||||
|
||||
{ Get first instruction after label }
|
||||
UpdateUsedRegs(tai(hp3.next));
|
||||
GetNextInstruction(hp3, p);
|
||||
{ Store these writes to search for
|
||||
duplicates later on }
|
||||
RegWrites[w] := taicpu(hp1).oper[1]^.reg;
|
||||
Inc(w);
|
||||
end;
|
||||
|
||||
if assigned(p) and (hp3.typ = ait_align) then
|
||||
GetNextInstruction(p, p);
|
||||
UpdateUsedRegs(tai(hp1.next));
|
||||
GetNextInstruction(hp1, hp1);
|
||||
until (hp1 = hp_lblyyy);
|
||||
|
||||
{ Don't dereference yet, as doing so will cause
|
||||
GetNextInstruction to skip the label and
|
||||
optional align marker. [Kit] }
|
||||
GetNextInstruction(hp2, hp4);
|
||||
{ Now do the first set of MOVs }
|
||||
hp1 := hpmov1;
|
||||
repeat
|
||||
if not Assigned(hp1) then
|
||||
InternalError(2018062904);
|
||||
|
||||
DebugMsg(SPeepholeOptimization+'JccMovJmpMov2CMovCMov',hp1);
|
||||
if (hp1.typ = ait_instruction) then
|
||||
begin
|
||||
RegMatch := False;
|
||||
|
||||
{ remove jCC }
|
||||
RemoveInstruction(hp1);
|
||||
{ Extra safeguard }
|
||||
if (taicpu(hp1).opcode <> A_MOV) then
|
||||
InternalError(2018062905);
|
||||
|
||||
{ Now we can safely decrement it }
|
||||
tasmlabel(symbol).decrefs;
|
||||
{ Search through the RegWrites list to see
|
||||
if there are any opposing CMOV pairs that
|
||||
write to the same register }
|
||||
for x := 0 to w - 1 do
|
||||
if RegWrites[x] = taicpu(hp1).oper[1]^.reg then
|
||||
begin
|
||||
{ We have a match. Move this instruction
|
||||
right to the top }
|
||||
|
||||
{ Remove label xxx (it will have a ref of zero due to the initial check }
|
||||
StripLabelFast(hp4);
|
||||
hp2 := hp1;
|
||||
{ Move ahead in preparation }
|
||||
GetNextInstruction(hp1, hp1);
|
||||
|
||||
{ remove jmp }
|
||||
symbol := taicpu(hp2).oper[0]^.ref^.symbol;
|
||||
asml.Remove(hp2);
|
||||
asml.InsertAfter(hp2, hp_prev);
|
||||
|
||||
RemoveInstruction(hp2);
|
||||
{ Note we can't use the trick of inserting before hp_prev
|
||||
and then calling TrySwapMovOp with hp_prev2, like with
|
||||
the MOV imm,reg optimisations, because hp2 may share a
|
||||
register with the comparison }
|
||||
if (hp_prev <> p) then
|
||||
TrySwapMovCmp(hp_prev, hp2);
|
||||
|
||||
{ As before, now we can safely decrement it }
|
||||
tasmlabel(symbol).decrefs;
|
||||
RegMatch := True;
|
||||
Break;
|
||||
end;
|
||||
|
||||
{ Remove label yyy (and the optional alignment) if its reference falls to zero }
|
||||
if tasmlabel(symbol).getrefs = 0 then
|
||||
StripLabelFast(hp3);
|
||||
if RegMatch then
|
||||
Continue;
|
||||
|
||||
if Assigned(p) then
|
||||
result:=true;
|
||||
exit;
|
||||
end;
|
||||
end;
|
||||
if taicpu(hp1).oper[0]^.typ = top_const then
|
||||
begin
|
||||
RegMatch := False;
|
||||
|
||||
for x := 0 to c - 1 do
|
||||
if (ConstVals[x] = taicpu(hp1).oper[0]^.val) then
|
||||
begin
|
||||
RegMatch := True;
|
||||
|
||||
{ If it's in TmpUsedRegs, then this register
|
||||
is being used more than once and hence has
|
||||
already had its value defined (it gets
|
||||
added to UsedRegs through AllocRegBetween
|
||||
below) }
|
||||
if not TmpUsedRegs[R_INTREGISTER].IsUsed(ConstRegs[x]) then
|
||||
begin
|
||||
hp_new := taicpu.op_const_reg(A_MOV, taicpu(hp1).opsize, taicpu(hp1).oper[0]^.val, ConstRegs[x]);
|
||||
asml.InsertBefore(hp_new, hp_flagalloc);
|
||||
if Assigned(hp_prev2) then
|
||||
TrySwapMovOp(hp_prev2, hp_new);
|
||||
|
||||
IncludeRegInUsedRegs(ConstRegs[x], TmpUsedRegs);
|
||||
end
|
||||
else
|
||||
{ We just need an instruction between hp_prev and hp1
|
||||
where we know the register is marked as in use }
|
||||
hp_new := hpmov1;
|
||||
|
||||
AllocRegBetween(ConstRegs[x], hp_new, hp1, UsedRegs);
|
||||
taicpu(hp1).loadreg(0, ConstRegs[x]);
|
||||
Break;
|
||||
end;
|
||||
|
||||
if not RegMatch then
|
||||
InternalError(2021100412);
|
||||
end;
|
||||
|
||||
taicpu(hp1).opcode := A_CMOVcc;
|
||||
taicpu(hp1).condition := condition;
|
||||
end;
|
||||
|
||||
GetNextInstruction(hp1, hp1);
|
||||
until (hp1 = hp_jump); { Stop at the jump, not lbl xxx }
|
||||
|
||||
UpdateUsedRegs(tai(hp_jump.next));
|
||||
UpdateUsedRegs(tai(hp_lblyyy.next));
|
||||
|
||||
{ Get first instruction after label }
|
||||
hp1 := p;
|
||||
GetNextInstruction(hp_lblyyy, p);
|
||||
|
||||
{ Don't dereference yet, as doing so will cause
|
||||
GetNextInstruction to skip the label and
|
||||
optional align marker. [Kit] }
|
||||
|
||||
DebugMsg(SPeepholeOptimization+'JccMovJmpMov2CMovCMov',hp1);
|
||||
|
||||
{ remove Jcc }
|
||||
RemoveInstruction(hp1);
|
||||
|
||||
{ Now we can safely decrement it }
|
||||
tasmlabel(symbol).decrefs;
|
||||
|
||||
{ Remove label xxx (it will have a ref of zero due to the initial check) }
|
||||
{ Make sure the aligns get stripped too }
|
||||
hp1 := tai(hp_lblxxx.Previous);
|
||||
while Assigned(hp1) and (hp1.typ = ait_align) do
|
||||
begin
|
||||
hp_lblxxx := hp1;
|
||||
hp1 := tai(hp_lblxxx.Previous);
|
||||
end;
|
||||
StripLabelFast(hp_lblxxx);
|
||||
|
||||
{ remove jmp }
|
||||
symbol := taicpu(hp_jump).oper[0]^.ref^.symbol;
|
||||
|
||||
RemoveInstruction(hp_jump);
|
||||
|
||||
{ As before, now we can safely decrement it }
|
||||
TAsmLabel(symbol).decrefs;
|
||||
|
||||
{ Remove label yyy (and the optional alignment) if its reference falls to zero }
|
||||
if TAsmLabel(symbol).getrefs = 0 then
|
||||
begin
|
||||
{ Make sure the aligns get stripped too }
|
||||
hp1 := tai(hp_lblyyy.Previous);
|
||||
while Assigned(hp1) and (hp1.typ = ait_align) do
|
||||
begin
|
||||
hp_lblyyy := hp1;
|
||||
hp1 := tai(hp_lblyyy.Previous);
|
||||
end;
|
||||
StripLabelFast(hp_lblyyy);
|
||||
end;
|
||||
|
||||
if Assigned(p) then
|
||||
result := True;
|
||||
exit;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
{$endif i8086}
|
||||
end;
|
||||
end;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user