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* fixed generic shl/shr operations
+ added register allocation hook calls for arm specific operand types: register set and shifter op
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17c31681c3
commit
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@ -1728,6 +1728,8 @@ implementation
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begin
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new(shifterop);
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shifterop^:=o.shifterop^;
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if assigned(add_reg_instruction_hook) then
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add_reg_instruction_hook(self,shifterop^.rs);
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end;
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{$endif ARM}
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end;
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@ -1946,7 +1948,12 @@ implementation
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end.
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{
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$Log$
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Revision 1.64 2004-01-12 16:37:59 peter
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Revision 1.65 2004-01-23 15:12:49 florian
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* fixed generic shl/shr operations
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+ added register allocation hook calls for arm specific operand types:
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register set and shifter op
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Revision 1.64 2004/01/12 16:37:59 peter
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* moved spilling code from taicpu to rg
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Revision 1.63 2003/12/28 16:20:09 jonas
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@ -109,11 +109,15 @@ implementation
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end;
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shifterop^:=so;
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typ:=top_shifterop;
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if assigned(add_reg_instruction_hook) then
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add_reg_instruction_hook(self,shifterop^.rs);
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end;
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end;
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procedure taicpu.loadregset(opidx:longint;const s:tcpuregisterset);
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var
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i : byte;
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begin
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allocate_oper(opidx+1);
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with oper[opidx]^ do
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@ -123,6 +127,11 @@ implementation
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new(regset);
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regset^:=s;
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typ:=top_regset;
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for i:=RS_R0 to RS_R15 do
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begin
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if assigned(add_reg_instruction_hook) and (i in regset^) then
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add_reg_instruction_hook(self,newreg(R_INTREGISTER,i,R_SUBWHOLE));
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end;
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end;
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end;
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@ -409,7 +418,12 @@ implementation
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end.
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{
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$Log$
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Revision 1.22 2004-01-21 19:01:03 florian
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Revision 1.23 2004-01-23 15:12:49 florian
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* fixed generic shl/shr operations
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+ added register allocation hook calls for arm specific operand types:
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register set and shifter op
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Revision 1.22 2004/01/21 19:01:03 florian
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* fixed handling of max. distance of pc relative symbols
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Revision 1.21 2004/01/20 21:02:55 florian
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@ -446,8 +446,6 @@ implementation
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}
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if right.location.loc<>LOC_REGISTER then
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begin
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if right.location.loc<>LOC_CREGISTER then
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location_release(exprasmlist,right.location);
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hcountreg:=cg.getintregister(exprasmlist,OS_INT);
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freescratch := true;
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cg.a_load_loc_reg(exprasmlist,right.location.size,right.location,hcountreg);
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@ -455,6 +453,8 @@ implementation
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else
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hcountreg:=right.location.register;
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cg.a_op_reg_reg(exprasmlist,op,OS_INT,hcountreg,location.register);
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if right.location.loc<>LOC_REGISTER then
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location_release(exprasmlist,right.location);
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if freescratch then
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cg.ungetregister(exprasmlist,hcountreg);
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end;
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@ -524,7 +524,12 @@ begin
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end.
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{
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$Log$
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Revision 1.24 2004-01-20 12:59:37 florian
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Revision 1.25 2004-01-23 15:12:49 florian
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* fixed generic shl/shr operations
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+ added register allocation hook calls for arm specific operand types:
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register set and shifter op
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Revision 1.24 2004/01/20 12:59:37 florian
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* common addnode code for x86-64 and i386
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Revision 1.23 2003/12/06 01:15:22 florian
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@ -424,8 +424,10 @@ implementation
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else
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procname := procname + 'qword';
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}
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result := ccallnode.createintern(procname,ccallparanode.create(left,
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ccallparanode.create(right,nil)));
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{ this order of parameters works at least for the arm,
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however it should work for any calling conventions (FK) }
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result := ccallnode.createintern(procname,ccallparanode.create(right,
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ccallparanode.create(left,nil)));
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left := nil;
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right := nil;
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firstpass(result);
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@ -839,7 +841,12 @@ begin
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end.
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{
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$Log$
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Revision 1.54 2003-12-09 21:17:04 jonas
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Revision 1.55 2004-01-23 15:12:49 florian
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* fixed generic shl/shr operations
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+ added register allocation hook calls for arm specific operand types:
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register set and shifter op
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Revision 1.54 2003/12/09 21:17:04 jonas
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+ support for evaluating qword constant expressions (both arguments have
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to be a qword, constants have to be explicitly typecasted to qword)
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