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Try to correctly handle m68k exceptions bits inside SetExceptionMask function

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git-svn-id: trunk@43893 -
This commit is contained in:
pierre 2020-01-08 23:08:30 +00:00
parent be301a3aed
commit d8298c9f14
1 changed files with 13 additions and 5 deletions
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18
rtl/m68k/mathu.inc
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@ -88,9 +88,14 @@ end;
function SetExceptionMask(const Mask: TFPUExceptionMask): TFPUExceptionMask;
const
FPCToFPUExceptionFlags: array[TFPUException] of DWord =
( FPU68K_EXCEPT_OPERR, 0, FPU68K_EXCEPT_DZ, FPU68K_EXCEPT_OVFL, FPU68K_EXCEPT_UNFL, FPU68K_EXCEPT_INEX2 );
( {exInvalidOp,} FPU68K_EXCEPT_OPERR or FPU68K_EXCEPT_SNAN or FPU68K_EXCEPT_BSUN,
{exDenormalized,} 0,
{exZeroDivide,} FPU68K_EXCEPT_DZ,
{exOverflow,} FPU68K_EXCEPT_OVFL,
{exUnderflow,} FPU68K_EXCEPT_UNFL,
{exPrecision} FPU68K_EXCEPT_INEX1 or FPU68K_EXCEPT_INEX2 );
FPUToFPCExceptionFlags: array[0..7] of TFPUExceptionMask =
( [], [exPrecision], [exZeroDivide], [exUnderflow], [exOverflow], [exInvalidOp], [], [] );
( [exPrecision], [exPrecision], [exZeroDivide], [exUnderflow], [exOverflow], [exInvalidOp], [exInvalidOp], [exInvalidOp] );
var
oldMode, Mode: DWord;
e: TFPUException;
@ -104,10 +109,13 @@ begin
result:=result+FPUToFPCExceptionFlags[i];
mode:=0;
for e in Mask do
mode:=mode or FPCToFPUExceptionFlags[e];
{ The bits set inside FPCR register are the enabled exceptions,
not the masked exceptions, thus we need to invert list }
for e:=low(TFPUException) to high(TFPUException) do
if not (e in Mask) then
mode:=mode or FPCToFPUExceptionFlags[e];
SetFPCR((GetFPCR and not FPU68K_EXCEPT_MASK) or (mode shl FPU68K_EXCEPT_MASK_SHIFT));
SetFPCR((GetFPCR and not FPU68K_EXCEPT_MASK) or (mode and FPU68K_EXCEPT_MASK));
softfloat_exception_mask:=mask;
end;