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+ i8086 optimization for the code generated for 64-bit shl/shr with a constant in the range 32..47

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git-svn-id: trunk@32059 -
This commit is contained in:
nickysn 2015-10-15 15:59:27 +00:00
parent 44f6f607c5
commit dc92c3eb09
1 changed files with 21 additions and 0 deletions
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21
compiler/i8086/n8086mat.pas
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@ -445,6 +445,27 @@ implementation
cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHR,OS_16,v-48,hreg64lo);
end;
end
{ shifting by 32..47 }
else if (right.nodetype=ordconstn) and (v>=32) and (v<=47) and
((not (cs_opt_size in current_settings.optimizerswitches)) or (v<=33)) then
begin
if nodetype=shln then
begin
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,hreg64lo,hreg64hi);
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,GetNextReg(hreg64lo),GetNextReg(hreg64hi));
cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_16,0,hreg64lo);
cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_16,0,GetNextReg(hreg64lo));
cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_32,v-32,hreg64hi);
end
else
begin
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,hreg64hi,hreg64lo);
cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,GetNextReg(hreg64hi),GetNextReg(hreg64lo));
cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_16,0,hreg64hi);
cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_16,0,GetNextReg(hreg64hi));
cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHR,OS_32,v-32,hreg64lo);
end;
end
else
begin
{ load right operators in a register }