paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-12-15 23:30:40 +01:00
Code Issues Packages Projects Releases Wiki Activity

* properly write RV32E/RV64E architecture tags

Browse Source
This commit is contained in:
florian 2025-01-28 22:37:30 +01:00
parent e86a4a9c1f
commit e17c575123
2 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
compiler/riscv/nrvutil.pas
View File

@ -65,9 +65,15 @@ implementation
current_asmdata.asmlists[al_start].Concat(tai_attribute.create(ait_attribute,tag_stack_align,target_info.stackalign));
current_asmdata.asmlists[al_start].Concat(tai_attribute.create(ait_attribute,tag_unaligned_access,0));
{$if defined(RISCV32)}
attr_arch:='rv32i2p1';
if CPURV_HAS_16REGISTERS in cpu_capabilities[current_settings.cputype] then
attr_arch:='rv32e2p0'
else
attr_arch:='rv32i2p1';
{$elseif defined(RISCV64)}
attr_arch:='rv64i2p1';
if CPURV_HAS_16REGISTERS in cpu_capabilities[current_settings.cputype] then
attr_arch:='rv64e2p0'
else
attr_arch:='rv64i2p1';
{$elseif defined(RISCV128)}
attr_arch:='rv128i2p1';
{$endif defined(RISCV32)}

1
compiler/riscv64/cpuinfo.pas
View File

@ -127,6 +127,7 @@ Const
(CPURV_HAS_MUL,
CPURV_HAS_ATOMIC,
CPURV_HAS_COMPACT,
CPURV_HAS_16REGISTERS,
CPURV_HAS_ZBA,
CPURV_HAS_ZBB,
CPURV_HAS_ZBC,