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+ generic int_to_real type conversion
+ generic unaryminus node
This commit is contained in:
carl
parent
e5895885fe
commit
e212fa90d5
198
compiler/ncgmat.pas
Normal file
198
compiler/ncgmat.pas
Normal file
@ -0,0 +1,198 @@
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{
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$Id$
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Copyright (c) 1998-2002 by Florian Klaempfl
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Generate generic mathematical nodes
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit ncgmat;
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{$i fpcdefs.inc}
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interface
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uses
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node,nmat,cpubase,cgbase,cginfo;
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type
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tcgunaryminusnode = class(tunaryminusnode)
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procedure pass_2;override;
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{ This routine is called to change the sign of the
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floating point value in the floating point
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register r.
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This routine should be overriden, since
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the generic version is not optimal at all. The
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generic version assumes that floating
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point values are stored in the register
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in IEEE-754 format.
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}
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procedure emit_float_sign_change(r: tregister; _size : tcgsize);virtual;
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end;
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implementation
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uses
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globtype,systems,
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cutils,verbose,globals,
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symconst,symdef,aasmbase,aasmtai,aasmcpu,defbase,
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pass_1,pass_2,
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ncon,
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cpuinfo,
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tgobj,ncgutil,cgobj,rgobj,rgcpu,cg64f32;
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{*****************************************************************************
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TCGUNARYMINUSNODE
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*****************************************************************************}
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procedure tcgunaryminusnode.emit_float_sign_change(r: tregister; _size : tcgsize);
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var
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href : treference;
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hreg : tregister;
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begin
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{ get a temporary memory reference to store the floating
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point value
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}
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tg.gettempofsizereference(exprasmlist,tcgsize2size[_size],href);
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{ store the floating point value in the temporary memory area }
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cg.a_loadfpu_reg_ref(exprasmlist,_size,r,href);
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{ only single and double ieee are supported }
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if _size = OS_F64 then
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begin
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{ on little-endian machine the most significant
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32-bit value is stored at the highest address
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}
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if target_info.endian = endian_little then
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inc(href.offset,4);
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end
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else
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if _size <> OS_F32 then
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internalerror(20020814);
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hreg := rg.getregisterint(exprasmlist);
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{ load value }
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cg.a_load_ref_reg(exprasmlist,OS_32,href,hreg);
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{ bitwise complement copied value }
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cg.a_op_reg_reg(exprasmlist,OP_NOT,OS_32,hreg,hreg);
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{ sign-bit is bit 31/63 of single/double }
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cg.a_op_const_reg(exprasmlist,OP_AND,$80000000,hreg);
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{ or with value in reference memory }
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cg.a_op_reg_ref(exprasmlist,OP_OR,OS_32,hreg,href);
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rg.ungetregister(exprasmlist,hreg);
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{ store the floating point value in the temporary memory area }
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if _size = OS_F64 then
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begin
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{ on little-endian machine the most significant
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32-bit value is stored at the highest address
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}
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if target_info.endian = endian_little then
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dec(href.offset,4);
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end;
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cg.a_loadfpu_ref_reg(exprasmlist,_size,href,r);
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end;
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procedure tcgunaryminusnode.pass_2;
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begin
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if is_64bitint(left.resulttype.def) then
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begin
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secondpass(left);
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{ load left operator in a register }
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location_copy(location,left.location);
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location_force_reg(exprasmlist,location,OS_64,false);
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cg64.a_op64_loc_reg(exprasmlist,OP_NEG,
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location,joinreg64(location.registerlow,location.registerhigh));
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end
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else
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begin
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secondpass(left);
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location_reset(location,LOC_REGISTER,OS_INT);
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case left.location.loc of
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LOC_REGISTER:
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begin
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location.register:=left.location.register;
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cg.a_op_reg_reg(exprasmlist,OP_NEG,OS_INT,location.register,
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location.register);
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end;
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LOC_CREGISTER:
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begin
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location.register:=rg.getregisterint(exprasmlist);
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cg.a_load_reg_reg(exprasmlist,OS_INT,left.location.register,
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location.register);
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cg.a_op_reg_reg(exprasmlist,OP_NEG,OS_INT,location.register,
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location.register);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE:
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begin
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reference_release(exprasmlist,left.location.reference);
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if (left.resulttype.def.deftype=floatdef) then
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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location.register:=rg.getregisterfpu(exprasmlist);
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cg.a_loadfpu_ref_reg(exprasmlist,
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def_cgsize(left.resulttype.def),
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left.location.reference,location.register);
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emit_float_sign_change(location.register,def_cgsize(left.resulttype.def));
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end
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else
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begin
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location.register:=rg.getregisterint(exprasmlist);
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{ why is the size is OS_INT, since in pass_1 we convert
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everything to a signed natural value anyways
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}
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cg.a_load_ref_reg(exprasmlist,OS_INT,
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left.location.reference,location.register);
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cg.a_op_reg_reg(exprasmlist,OP_NEG,OS_INT,location.register,
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location.register);
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end;
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end;
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LOC_FPUREGISTER:
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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location.register:=left.location.register;
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emit_float_sign_change(location.register,def_cgsize(left.resulttype.def));
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end;
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LOC_CFPUREGISTER:
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begin
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location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
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location.register:=rg.getregisterfpu(exprasmlist);
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cg.a_loadfpu_reg_reg(exprasmlist,left.location.register,location.register);
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emit_float_sign_change(location.register,def_cgsize(left.resulttype.def));
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end;
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else
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internalerror(200203225);
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end;
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end;
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end;
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begin
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cunaryminusnode:=tcgunaryminusnode;
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end.
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{
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$Log$
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Revision 1.1 2002-08-14 19:26:55 carl
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+ generic int_to_real type conversion
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+ generic unaryminus node
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}
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@ -1355,25 +1355,44 @@ implementation
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function ttypeconvnode.first_int_to_real: tnode;
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var
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fname: string[19];
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typname : string[12];
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begin
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first_int_to_real:=nil;
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{$ifdef m68k}
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if (cs_fp_emulation in aktmoduleswitches) or
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(tfloatdef(resulttype.def).typ=s32real) then
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{ Get the type name }
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{ Normally the typename should be one of the following:
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single, double - carl
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}
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typname := lower(pbestrealtype^.def.gettypename);
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{ converting a 64bit integer to a float requires a helper }
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if is_64bitint(left.resulttype.def) then
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begin
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if registers32<1 then
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registers32:=1;
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if is_signed(left.resulttype.def) then
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fname := 'fpc_int64_to_'+typname
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else
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fname := 'fpc_qword_to_'+typname;
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result := ccallnode.createintern(fname,ccallparanode.create(
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left,nil));
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left:=nil;
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firstpass(result);
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exit;
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end
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else
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if registersfpu<1 then
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registersfpu:=1;
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{$else not m68k}
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if registersfpu<1 then
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registersfpu:=1;
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{$endif not m68k}
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location.loc:=LOC_FPUREGISTER;
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{ other integers are supposed to be 32 bit }
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begin
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if is_signed(left.resulttype.def) then
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fname := 'fpc_longint_to_'+typname
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else
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fname := 'fpc_cardinal_to_'+typname;
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result := ccallnode.createintern(fname,ccallparanode.create(
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left,nil));
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left:=nil;
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firstpass(result);
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exit;
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end;
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end;
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function ttypeconvnode.first_real_to_real : tnode;
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@ -1920,7 +1939,11 @@ begin
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end.
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{
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$Log$
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Revision 1.68 2002-08-11 16:08:55 florian
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Revision 1.69 2002-08-14 19:26:55 carl
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+ generic int_to_real type conversion
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+ generic unaryminus node
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Revision 1.68 2002/08/11 16:08:55 florian
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+ support of explicit type case boolean->char
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Revision 1.67 2002/08/11 15:28:00 florian
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@ -486,7 +486,7 @@ implementation
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if (left.location.loc<>LOC_REGISTER) and
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(registersfpu<1) then
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registersfpu:=1;
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location.loc:=LOC_REGISTER;
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location.loc:=LOC_FPUREGISTER;
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end
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{$ifdef SUPPORT_MMX}
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else if (cs_mmx in aktlocalswitches) and
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@ -718,7 +718,11 @@ begin
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end.
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{
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$Log$
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Revision 1.36 2002-07-20 11:57:54 florian
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Revision 1.37 2002-08-14 19:26:55 carl
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+ generic int_to_real type conversion
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+ generic unaryminus node
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Revision 1.36 2002/07/20 11:57:54 florian
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* types.pas renamed to defbase.pas because D6 contains a types
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unit so this would conflicts if D6 programms are compiled
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+ Willamette/SSE2 instructions to assembler added
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