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https://gitlab.com/freepascal.org/fpc/source.git
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* refactored general loc->cgpara loading code in ncgcal into helpers in
ncgutil it can be used elsewhere too
- removed the code that checks for 64 bit integer types in the float
para loading code, since is_64bit() can never return true for a
floatdef
git-svn-id: trunk@15318 -
This commit is contained in:
Jonas Maebe
parent
ef824c53f8
commit
e9b62c1294
@ -119,11 +119,6 @@ implementation
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procedure tcgcallparanode.push_value_para;
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{$ifdef i386}
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var
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href : treference;
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size : longint;
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{$endif i386}
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begin
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{ we've nothing to push when the size of the parameter is 0 }
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if left.resultdef.size=0 then
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@ -139,173 +134,9 @@ implementation
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be handled by cpupara }
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if left.resultdef.typ=floatdef then
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begin
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{$ifdef i386}
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if tempcgpara.location^.loc<>LOC_REFERENCE then
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internalerror(200309291);
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case left.location.loc of
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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begin
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size:=align(TCGSize2Size[left.location.size],tempcgpara.alignment);
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if tempcgpara.location^.reference.index=NR_STACK_POINTER_REG then
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begin
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cg.g_stackpointer_alloc(current_asmdata.CurrAsmList,size);
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reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
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end
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else
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reference_reset_base(href,tempcgpara.location^.reference.index,tempcgpara.location^.reference.offset,tempcgpara.alignment);
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cg.a_loadfpu_reg_ref(current_asmdata.CurrAsmList,left.location.size,left.location.size,left.location.register,href);
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end;
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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size:=align(tfloatdef(left.resultdef).size,tempcgpara.alignment);
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if tempcgpara.location^.reference.index=NR_STACK_POINTER_REG then
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begin
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cg.g_stackpointer_alloc(current_asmdata.CurrAsmList,size);
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reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
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end
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else
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reference_reset_base(href,tempcgpara.location^.reference.index,tempcgpara.location^.reference.offset,tempcgpara.alignment);
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cg.a_loadmm_reg_ref(current_asmdata.CurrAsmList,left.location.size,left.location.size,left.location.register,href,mms_movescalar);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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size:=align(left.resultdef.size,tempcgpara.alignment);
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if (not use_fixed_stack) and
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(tempcgpara.location^.reference.index=NR_STACK_POINTER_REG) then
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cg.a_load_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara)
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else
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begin
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reference_reset_base(href,tempcgpara.location^.reference.index,tempcgpara.location^.reference.offset,tempcgpara.alignment);
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cg.g_concatcopy(current_asmdata.CurrAsmList,left.location.reference,href,size);
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end;
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end;
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else
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internalerror(2002042430);
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end;
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{$else i386}
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case left.location.loc of
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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case tempcgpara.location^.loc of
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_MMREGISTER,
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LOC_CMMREGISTER,
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LOC_REGISTER,
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LOC_CREGISTER :
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cg.a_loadmm_reg_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara,mms_movescalar);
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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begin
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location_force_fpureg(current_asmdata.CurrAsmList,left.location,false);
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cg.a_loadfpu_reg_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara);
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end;
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else
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internalerror(200204249);
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end;
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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case tempcgpara.location^.loc of
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
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cg.a_loadmm_reg_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara,mms_movescalar);
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end;
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{ Some targets pass floats in normal registers }
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LOC_REGISTER,
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LOC_CREGISTER,
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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cg.a_loadfpu_reg_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.register,tempcgpara);
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else
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internalerror(2002042433);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE:
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case tempcgpara.location^.loc of
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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cg.a_loadmm_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara,mms_movescalar);
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{ Some targets pass floats in normal registers }
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LOC_REGISTER,
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LOC_CREGISTER,
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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cg.a_loadfpu_ref_cgpara(current_asmdata.CurrAsmList,left.location.size,left.location.reference,tempcgpara);
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else
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internalerror(2002042431);
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end;
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LOC_REGISTER,
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LOC_CREGISTER :
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begin
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{$ifndef cpu64bitalu}
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{ use cg64 only for int64, not for 8 byte records }
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if is_64bit(left.resultdef) then
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cg64.a_load64_loc_cgpara(current_asmdata.CurrAsmList,left.location,tempcgpara)
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else
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{$endif not cpu64bitalu}
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begin
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{$ifndef cpu64bitalu}
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{ Only a_load_ref_cgpara supports multiple locations, when the
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value is still a const or in a register then write it
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to a reference first. This situation can be triggered
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by typecasting an int64 constant to a record of 8 bytes }
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if left.location.size in [OS_64,OS_S64] then
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location_force_mem(current_asmdata.CurrAsmList,left.location);
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{$endif not cpu64bitalu}
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cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,tempcgpara);
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end;
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end;
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else
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internalerror(2002042432);
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end;
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{$endif i386}
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end
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gen_loadfpu_loc_cgpara(current_asmdata.CurrAsmList,left.location,tempcgpara,left.resultdef.size)
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else
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begin
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case left.location.loc of
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LOC_CONSTANT,
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LOC_REGISTER,
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LOC_CREGISTER,
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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{$ifndef cpu64bitalu}
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{ use cg64 only for int64, not for 8 byte records }
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if is_64bit(left.resultdef) then
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cg64.a_load64_loc_cgpara(current_asmdata.CurrAsmList,left.location,tempcgpara)
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else
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{$endif not cpu64bitalu}
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begin
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{$ifndef cpu64bitalu}
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{ Only a_load_ref_cgpara supports multiple locations, when the
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value is still a const or in a register then write it
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to a reference first. This situation can be triggered
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by typecasting an int64 constant to a record of 8 bytes }
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if left.location.size in [OS_64,OS_S64] then
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location_force_mem(current_asmdata.CurrAsmList,left.location);
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{$endif not cpu64bitalu}
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cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,tempcgpara);
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end;
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end;
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{$ifdef SUPPORT_MMX}
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LOC_MMXREGISTER,
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LOC_CMMXREGISTER:
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cg.a_loadmm_reg_cgpara(current_asmdata.CurrAsmList,OS_M64,left.location.register,tempcgpara,nil);
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{$endif SUPPORT_MMX}
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else
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internalerror(200204241);
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end;
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end;
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gen_load_locnonfpu_cgpara(current_asmdata.CurrAsmList,left.location,tempcgpara,is_64bit(left.resultdef))
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end;
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@ -65,6 +65,12 @@ interface
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procedure location_force_mem(list:TAsmList;var l:tlocation);
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procedure location_force_mmregscalar(list:TAsmList;var l: tlocation;maybeconst:boolean);
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procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
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{ load a location of a floatdef into a cgpara }
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procedure gen_loadfpu_loc_cgpara(list:TAsmList;const l: tlocation;const cgpara: tcgpara;locintsize: longint);
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{ load a location of a non-floatdef into a cgpara }
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procedure gen_load_locnonfpu_cgpara(list:TAsmList;const l: tlocation;const cgpara: tcgpara; is64bitint: boolean);
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procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
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{ Retrieve the location of the data pointed to in location l, when the location is
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@ -775,6 +781,193 @@ implementation
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end;
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procedure gen_loadfpu_loc_cgpara(list: TAsmList; const l: tlocation;const cgpara: tcgpara;locintsize: longint);
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var
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{$ifdef i386}
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href : treference;
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size : longint;
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{$else i386}
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tmploc : tlocation;
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{$endif i386}
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begin
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{$ifdef i386}
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if cgpara.location^.loc<>LOC_REFERENCE then
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internalerror(200309291);
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case l.loc of
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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begin
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size:=align(locintsize,cgpara.alignment);
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if (not use_fixed_stack) and
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(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
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begin
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cg.g_stackpointer_alloc(list,size);
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reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
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end
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else
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reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
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cg.a_loadfpu_reg_ref(list,l.size,l.size,l.register,href);
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end;
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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{ can't use TCGSize2Size[l.size], because the size of an
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80 bit extended parameter can be either 10 or 12 bytes }
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size:=align(locintsize,cgpara.alignment);
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if (not use_fixed_stack) and
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(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
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begin
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cg.g_stackpointer_alloc(list,size);
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reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
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end
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else
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reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
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cg.a_loadmm_reg_ref(list,l.size,l.size,l.register,href,mms_movescalar);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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size:=align(locintsize,cgpara.alignment);
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if (not use_fixed_stack) and
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(cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
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cg.a_load_ref_cgpara(list,l.size,l.reference,cgpara)
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else
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begin
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reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
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cg.g_concatcopy(list,l.reference,href,size);
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end;
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end;
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else
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internalerror(2002042430);
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end;
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{$else i386}
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case l.loc of
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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case cgpara.location^.loc of
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_MMREGISTER,
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LOC_CMMREGISTER,
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LOC_REGISTER,
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LOC_CREGISTER :
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cg.a_loadmm_reg_cgpara(list,l.size,l.register,cgpara,mms_movescalar);
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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begin
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tmploc:=l;
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location_force_fpureg(list,tmploc,false);
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cg.a_loadfpu_reg_cgpara(list,tmploc.size,tmploc.register,cgpara);
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end;
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else
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internalerror(200204249);
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end;
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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case cgpara.location^.loc of
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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begin
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tmploc:=l;
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location_force_mmregscalar(list,tmploc,false);
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cg.a_loadmm_reg_cgpara(list,tmploc.size,tmploc.register,cgpara,mms_movescalar);
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end;
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{ Some targets pass floats in normal registers }
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LOC_REGISTER,
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LOC_CREGISTER,
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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cg.a_loadfpu_reg_cgpara(list,l.size,l.register,cgpara);
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else
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internalerror(2002042433);
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end;
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LOC_REFERENCE,
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LOC_CREFERENCE:
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case cgpara.location^.loc of
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LOC_MMREGISTER,
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LOC_CMMREGISTER:
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cg.a_loadmm_ref_cgpara(list,l.size,l.reference,cgpara,mms_movescalar);
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{ Some targets pass floats in normal registers }
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LOC_REGISTER,
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LOC_CREGISTER,
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LOC_REFERENCE,
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LOC_CREFERENCE,
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LOC_FPUREGISTER,
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LOC_CFPUREGISTER:
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cg.a_loadfpu_ref_cgpara(list,l.size,l.reference,cgpara);
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else
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internalerror(2002042431);
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end;
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LOC_REGISTER,
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LOC_CREGISTER :
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begin
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{$ifndef cpu64bitalu}
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{ Only a_load_ref_cgpara supports multiple locations, when the
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value is still a const or in a register then write it
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to a reference first. This situation can be triggered
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by typecasting an int64 constant to a record of 8 bytes }
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tmploc:=l;
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if tmploc.size in [OS_64,OS_S64] then
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location_force_mem(list,tmploc);
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cg.a_load_loc_cgpara(list,tmploc,cgpara);
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{$else not cpu64bitalu}
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cg.a_load_loc_cgpara(list,l,cgpara);
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{$endif not cpu64bitalu}
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end;
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else
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internalerror(2002042432);
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end;
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{$endif i386}
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end;
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procedure gen_load_locnonfpu_cgpara(list: TAsmList; const l: tlocation;const cgpara: tcgpara; is64bitint: boolean);
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{$ifndef cpu64bitalu}
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var
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tmploc: tlocation;
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{$endif not cpu64bitalu}
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begin
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case l.loc of
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LOC_CONSTANT,
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LOC_REGISTER,
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LOC_CREGISTER,
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LOC_REFERENCE,
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LOC_CREFERENCE :
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begin
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{$ifndef cpu64bitalu}
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{ use cg64 only for int64, not for 8 byte records }
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if is64bitint then
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cg64.a_load64_loc_cgpara(list,l,cgpara)
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else
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{$endif not cpu64bitalu}
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begin
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{$ifndef cpu64bitalu}
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{ Only a_load_ref_cgpara supports multiple locations, when the
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value is still a const or in a register then write it
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to a reference first. This situation can be triggered
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by typecasting an int64 constant to a record of 8 bytes }
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tmploc:=l;
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if tmploc.size in [OS_64,OS_S64] then
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location_force_mem(list,tmploc);
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cg.a_load_loc_cgpara(list,tmploc,cgpara);
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{$else not cpu64bitalu}
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cg.a_load_loc_cgpara(list,l,cgpara);
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{$endif not cpu64bitalu}
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end;
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end;
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{$ifdef SUPPORT_MMX}
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LOC_MMXREGISTER,
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LOC_CMMXREGISTER:
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cg.a_loadmm_reg_cgpara(list,OS_M64,l.register,cgpara,nil);
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{$endif SUPPORT_MMX}
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else
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internalerror(200204241);
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end;
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end;
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procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
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var
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tmpreg: tregister;
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