mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-08-17 20:49:09 +02:00
+ forgotten pseudo-instructions added
This commit is contained in:
parent
9e70f49745
commit
ec3a04da9b
@ -125,7 +125,7 @@ uses
|
|||||||
A_SFENCE_VM,
|
A_SFENCE_VM,
|
||||||
|
|
||||||
{ pseudo instructions for accessiong control and status registers }
|
{ pseudo instructions for accessiong control and status registers }
|
||||||
A_RDINSTRET,A_RDCYCLE,A_RDTIME,A_CSRR,A_CSRW,A_CSRS,A_CSRC,A_CSRWI,
|
A_RDINSTRET,A_RDINSTRETH,A_RDCYCLE,A_RDCYCLEH,A_RDTIME,A_RDTIMEH,A_CSRR,A_CSRW,A_CSRS,A_CSRC,A_CSRWI,
|
||||||
A_CSRSI,A_CSRCI
|
A_CSRSI,A_CSRCI
|
||||||
);
|
);
|
||||||
|
|
||||||
|
@ -116,7 +116,7 @@ unit itcpugas;
|
|||||||
'sfence.vm',
|
'sfence.vm',
|
||||||
|
|
||||||
{ pseudo instructions for accessiong control and status registers }
|
{ pseudo instructions for accessiong control and status registers }
|
||||||
'rdinstret','rdcycle','rdtime','csrr','csrw','csrs','csrc','csrwi',
|
'rdinstret','rdinstreth','rdcycle','rdcycleh','rdtime','rdtimeh','csrr','csrw','csrs','csrc','csrwi',
|
||||||
'csrsi','csrci'
|
'csrsi','csrci'
|
||||||
);
|
);
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user