paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-29 10:00:31 +02:00
Code Issues Packages Projects Releases Wiki Activity

* Changed memory operand size for VMOVSS instruction to 32 bits, Mantis #29957.

Browse Source 
git-svn-id: trunk@34918 -
This commit is contained in:
sergei 2016-11-18 23:37:01 +00:00
parent 56252d59f0
commit edf943a4f6
7 changed files with 50 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.gitattributes vendored
View File

@ -15201,6 +15201,7 @@ tests/webtbs/tw29912.pp svneol=native#text/plain
tests/webtbs/tw29923.pp svneol=native#text/plain
tests/webtbs/tw29930.pp svneol=native#text/plain
tests/webtbs/tw29933.pp svneol=native#text/plain
tests/webtbs/tw29957.pp svneol=native#text/pascal
tests/webtbs/tw29958.pp svneol=native#text/pascal
tests/webtbs/tw29964.pp svneol=native#text/plain
tests/webtbs/tw2998.pp svneol=native#text/plain

4
compiler/i386/i386tab.inc
View File

@ -9901,7 +9901,7 @@
(
opcode : A_VMOVSS;
ops : 2;
optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
code : #219#242#248#1#16#72;
flags : if_avx or if_sandybridge
),
@ -9915,7 +9915,7 @@
(
opcode : A_VMOVSS;
ops : 2;
optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
optypes : (ot_memory or ot_bits32,ot_xmmreg,ot_none,ot_none);
code : #219#242#248#1#17#65;
flags : if_avx or if_sandybridge
),

4
compiler/i8086/i8086tab.inc
View File

@ -9929,7 +9929,7 @@
(
opcode : A_VMOVSS;
ops : 2;
optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
code : #219#242#248#1#16#72;
flags : if_avx or if_sandybridge
),
@ -9943,7 +9943,7 @@
(
opcode : A_VMOVSS;
ops : 2;
optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
optypes : (ot_memory or ot_bits32,ot_xmmreg,ot_none,ot_none);
code : #219#242#248#1#17#65;
flags : if_avx or if_sandybridge
),

8
compiler/x86/aasmcpu.pas
View File

@ -3610,9 +3610,9 @@ implementation
if current_settings.fputype in fpu_avx_instructionsets then
case getsubreg(r) of
R_SUBMMD:
result:=taicpu.op_ref_reg(A_VMOVSD,reg2opsize(r),tmpref,r);
result:=taicpu.op_ref_reg(A_VMOVSD,S_NO,tmpref,r);
R_SUBMMS:
result:=taicpu.op_ref_reg(A_VMOVSS,reg2opsize(r),tmpref,r);
result:=taicpu.op_ref_reg(A_VMOVSS,S_NO,tmpref,r);
R_SUBQ,
R_SUBMMWHOLE:
result:=taicpu.op_ref_reg(A_VMOVQ,S_NO,tmpref,r);
@ -3668,9 +3668,9 @@ implementation
if current_settings.fputype in fpu_avx_instructionsets then
case getsubreg(r) of
R_SUBMMD:
result:=taicpu.op_reg_ref(A_VMOVSD,reg2opsize(r),r,tmpref);
result:=taicpu.op_reg_ref(A_VMOVSD,S_NO,r,tmpref);
R_SUBMMS:
result:=taicpu.op_reg_ref(A_VMOVSS,reg2opsize(r),r,tmpref);
result:=taicpu.op_reg_ref(A_VMOVSS,S_NO,r,tmpref);
R_SUBQ,
R_SUBMMWHOLE:
result:=taicpu.op_reg_ref(A_VMOVQ,S_NO,r,tmpref);

4
compiler/x86/x86ins.dat
View File

@ -3959,9 +3959,9 @@ ymmreg,ymmrm \333\362\364\370\1\x12\110 AVX,SA
; the three ops must be handle by the compiler internally
(Ch_Wop2, Ch_Rop1, Ch_None)
xmmreg,xmmreg,xmmreg \333\362\370\1\x10\75\120 AVX,SANDYBRIDGE
xmmreg,mem64 \333\362\370\1\x10\110 AVX,SANDYBRIDGE
xmmreg,mem32 \333\362\370\1\x10\110 AVX,SANDYBRIDGE
xmmreg,xmmreg,xmmreg \333\362\370\1\x11\75\102 AVX,SANDYBRIDGE
mem64,xmmreg \333\362\370\1\x11\101 AVX,SANDYBRIDGE
mem32,xmmreg \333\362\370\1\x11\101 AVX,SANDYBRIDGE
[VMOVUPD]
(Ch_Wop2, Ch_Rop1, Ch_None)

4
compiler/x86_64/x8664tab.inc
View File

@ -10006,7 +10006,7 @@
(
opcode : A_VMOVSS;
ops : 2;
optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
code : #219#242#248#1#16#72;
flags : if_avx or if_sandybridge
),
@ -10020,7 +10020,7 @@
(
opcode : A_VMOVSS;
ops : 2;
optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
optypes : (ot_memory or ot_bits32,ot_xmmreg,ot_none,ot_none);
code : #219#242#248#1#17#65;
flags : if_avx or if_sandybridge
),

37
tests/webtbs/tw29957.pp Normal file
View File

@ -0,0 +1,37 @@
{ %cpu=i386,x86_64 }
{$mode objfpc}
{$asmmode intel}
uses cpu;
type
TVector4 = packed record
X, Y, Z, W: Single;
end;
function _VectorDotProductAVX(Vector1, Vector2: TVector4): Single; assembler;
asm
VMOVUPS XMM0, [Vector1]
VMOVUPS XMM1, [Vector2]
VDPPS XMM0, XMM0, XMM1, $71 { Only perform calculations on the X, Y and Z coordinates; only store result in the first element }
VMOVSS Result, XMM0 { Store result - first element of XMM0 }
end;
var
v: tvector4;
r: single;
begin
v.x:=1;
v.y:=1;
v.z:=1;
v.w:=1;
if AVXSupport then
begin
r:=_vectordotproductavx(v,v);
if r<>3 then
halt(1);
writeln('ok');
end
else
writeln('No AVX support');
end.