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* a64: New CSEL block optimisations ported over from x86 CMOV block optimisations
This commit is contained in:
J. Gareth "Curious Kit" Moreton
J. Gareth "Kit" Moreton
parent
2a46596edd
commit
ef1cb852a8
@ -35,7 +35,7 @@ Interface
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globtype, globals,
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globtype, globals,
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cutils,
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cutils,
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cgbase, cpubase, aasmtai, aasmcpu,
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cgbase, cpubase, aasmtai, aasmcpu,
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aopt, aoptcpub, aoptarm;
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aopt, aoptcpub, aoptarm, aoptobj;
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Type
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Type
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TCpuAsmOptimizer = class(TARMAsmOptimizer)
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TCpuAsmOptimizer = class(TARMAsmOptimizer)
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@ -63,19 +63,31 @@ Interface
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function OptPass1B(var p: tai): boolean;
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function OptPass1B(var p: tai): boolean;
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function OptPass1SXTW(var p: tai): Boolean;
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function OptPass1SXTW(var p: tai): Boolean;
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function OptPass2B(var p: tai): Boolean;
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function OptPass2LDRSTR(var p: tai): boolean;
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function OptPass2LDRSTR(var p: tai): boolean;
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function PostPeepholeOptAND(var p: tai): Boolean;
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function PostPeepholeOptAND(var p: tai): Boolean;
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function PostPeepholeOptCMP(var p: tai): boolean;
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function PostPeepholeOptCMP(var p: tai): boolean;
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function PostPeepholeOptTST(var p: tai): Boolean;
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function PostPeepholeOptTST(var p: tai): Boolean;
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protected
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{ Like UpdateUsedRegs, but ignores deallocations }
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class procedure UpdateIntRegsNoDealloc(var AUsedRegs: TAllUsedRegs; p: Tai); static;
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{ Attempts to allocate a volatile integer register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai; DontAlloc: Boolean = False): TRegister;
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End;
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End;
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Implementation
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Implementation
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uses
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uses
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aasmbase,
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aasmbase,
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aoptbase,
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aoptutils,
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aoptutils,
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cgutils,
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cgutils,
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procinfo,
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paramgr,
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verbose;
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verbose;
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{$ifdef DEBUG_AOPTCPU}
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{$ifdef DEBUG_AOPTCPU}
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@ -88,6 +100,60 @@ Implementation
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SPeepholeOptimization = '';
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SPeepholeOptimization = '';
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{$endif DEBUG_AOPTCPU}
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{$endif DEBUG_AOPTCPU}
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MAX_CSEL_INSTRUCTIONS = 8;
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MAX_CSEL_REGISTERS = 30;
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type
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TCSELTrackingState = (tsInvalid, tsSimple, tsDetour, tsBranching,
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tsDouble, tsDoubleBranchSame, tsDoubleBranchDifferent, tsDoubleSecondBranching,
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tsProcessed);
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{ For OptPass2Jcc }
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TCSELTracking = object
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private
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CSELScore, ConstCount: LongInt;
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RegWrites: array[0..MAX_CSEL_INSTRUCTIONS*2 - 1] of TRegister;
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ConstRegs: array[0..MAX_CSEL_REGISTERS - 1] of TRegister;
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ConstVals: array[0..MAX_CSEL_REGISTERS - 1] of TCGInt;
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ConstSizes: array[0..MAX_CSEL_REGISTERS - 1] of TSubRegister; { May not match ConstRegs if one is shared over multiple CSELs. }
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ConstMovs: array[0..MAX_CSEL_REGISTERS - 1] of tai; { Location of initialisation instruction }
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ConstWriteSizes: array[0..first_int_imreg - 1] of TSubRegister; { Largest size of register written. }
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fOptimizer: TCpuAsmOptimizer;
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fLabel: TAsmSymbol;
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fInsertionPoint,
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fCondition,
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fInitialJump,
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fFirstMovBlock,
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fFirstMovBlockStop,
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fSecondJump,
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fThirdJump,
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fSecondMovBlock,
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fSecondMovBlockStop,
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fMidLabel,
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fEndLabel,
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fAllocationRange: tai;
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fState: TCSELTrackingState;
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function TryCSELConst(p, start, stop: tai; var Count: LongInt): Boolean;
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function InitialiseBlock(BlockStart, OneBeforeBlock: tai; out BlockStop: tai; out EndJump: tai): Boolean;
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function AnalyseMOVBlock(BlockStart, BlockStop, SearchStart: tai): LongInt;
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public
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RegisterTracking: TAllUsedRegs;
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constructor Init(Optimizer: TCpuAsmOptimizer; var p_initialjump, p_initialmov: tai; var AFirstLabel: TAsmLabel);
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destructor Done;
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procedure Process(out new_p: tai);
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property State: TCSELTrackingState read fState;
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end;
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PCSELTracking = ^TCSELTracking;
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function CanBeCond(p : tai) : boolean;
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function CanBeCond(p : tai) : boolean;
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begin
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begin
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result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
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result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
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@ -923,6 +989,45 @@ Implementation
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end;
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end;
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function TCpuAsmOptimizer.OptPass2B(var p: tai): Boolean;
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var
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hp1: tai;
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CSELTracking: PCSELTracking;
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begin
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Result := False;
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if (taicpu(p).condition <> C_None) and
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IsJumpToLabel(taicpu(p)) and
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GetNextInstruction(p, hp1) and
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(hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_MOV) then
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begin
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{ check for
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jCC xxx
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<several movs>
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xxx:
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Also spot:
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Jcc xxx
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<several movs>
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jmp xxx
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Change to:
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<several csets with inverted condition>
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jmp xxx (only for the 2nd case)
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}
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CSELTracking := New(PCSELTracking, Init(Self, p, hp1, TAsmLabel(JumpTargetOp(taicpu(p))^.ref^.symbol)));
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if CSELTracking^.State <> tsInvalid then
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begin
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CSELTracking^.Process(p);
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Result := True;
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end;
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CSELTracking^.Done;
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end;
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end;
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function TCpuAsmOptimizer.OptPass2LDRSTR(var p: tai): boolean;
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function TCpuAsmOptimizer.OptPass2LDRSTR(var p: tai): boolean;
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var
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var
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hp1, hp1_last: tai;
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hp1, hp1_last: tai;
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@ -1304,6 +1409,8 @@ Implementation
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case taicpu(p).opcode of
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case taicpu(p).opcode of
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A_AND:
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A_AND:
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Result := OptPass2AND(p);
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Result := OptPass2AND(p);
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A_B:
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Result:=OptPass2B(p);
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A_LDR,
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A_LDR,
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A_STR:
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A_STR:
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Result:=OptPass2LDRSTR(p);
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Result:=OptPass2LDRSTR(p);
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@ -1334,6 +1441,801 @@ Implementation
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end;
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end;
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end;
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end;
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class procedure TCpuAsmOptimizer.UpdateIntRegsNoDealloc(var AUsedRegs: TAllUsedRegs; p: Tai);
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begin
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{ Update integer registers, ignoring deallocations }
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repeat
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while assigned(p) and
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((p.typ in (SkipInstr - [ait_RegAlloc])) or
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(p.typ = ait_label) or
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((p.typ = ait_marker) and
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(tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd]))) do
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p := tai(p.next);
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while assigned(p) and
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(p.typ=ait_RegAlloc) Do
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begin
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if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
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begin
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case tai_regalloc(p).ratype of
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ra_alloc :
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IncludeRegInUsedRegs(tai_regalloc(p).reg, AUsedRegs);
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else
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;
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end;
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end;
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p := tai(p.next);
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end;
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until not(assigned(p)) or
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(not(p.typ in SkipInstr) and
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not((p.typ = ait_label) and
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labelCanBeSkipped(tai_label(p))));
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end;
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{ Attempts to allocate a volatile integer register for use between p and hp,
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using AUsedRegs for the current register usage information. Returns NR_NO
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if no free register could be found }
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function TCpuAsmOptimizer.GetIntRegisterBetween(RegSize: TSubRegister; var AUsedRegs: TAllUsedRegs; p, hp: tai; DontAlloc: Boolean = False): TRegister;
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var
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RegSet: TCPURegisterSet;
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CurrentSuperReg: Integer;
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CurrentReg: TRegister;
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Currentp: tai;
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Breakout: Boolean;
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begin
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Result := NR_NO;
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RegSet :=
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paramanager.get_volatile_registers_int(current_procinfo.procdef.proccalloption) +
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current_procinfo.saved_regs_int;
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(*
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{ Don't use the frame register unless explicitly allowed (fixes i40111) }
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if ([cs_useebp, cs_userbp] * current_settings.optimizerswitches) = [] then
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Exclude(RegSet, RS_FRAME_POINTER_REG);
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*)
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for CurrentSuperReg in RegSet do
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begin
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CurrentReg := newreg(R_INTREGISTER, TSuperRegister(CurrentSuperReg), RegSize);
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if not AUsedRegs[R_INTREGISTER].IsUsed(CurrentReg)
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then
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begin
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Currentp := p;
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Breakout := False;
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while not Breakout and GetNextInstruction(Currentp, Currentp) and (Currentp <> hp) do
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begin
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case Currentp.typ of
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ait_instruction:
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begin
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if RegInInstruction(CurrentReg, Currentp) then
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begin
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Breakout := True;
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Break;
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end;
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{ Cannot allocate across an unconditional jump }
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if is_calljmpmaybeuncondret(taicpu(Currentp).opcode) and (taicpu(Currentp).condition = C_None) then
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Exit;
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end;
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ait_marker:
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{ Don't try anything more if a marker is hit }
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Exit;
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ait_regalloc:
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if (tai_regalloc(Currentp).ratype <> ra_dealloc) and SuperRegistersEqual(CurrentReg, tai_regalloc(Currentp).reg) then
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begin
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Breakout := True;
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Break;
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end;
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else
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;
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end;
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end;
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if Breakout then
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{ Try the next register }
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Continue;
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{ We have a free register available }
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Result := CurrentReg;
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if not DontAlloc then
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AllocRegBetween(CurrentReg, p, hp, AUsedRegs);
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Exit;
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end;
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end;
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end;
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function TCSELTracking.InitialiseBlock(BlockStart, OneBeforeBlock: tai; out BlockStop: tai; out EndJump: tai): Boolean;
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begin
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Result := False;
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EndJump := nil;
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BlockStop := nil;
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while (BlockStart <> fOptimizer.BlockEnd) and
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{ stop on labels }
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(BlockStart.typ <> ait_label) do
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begin
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{ Keep track of all integer registers that are used }
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fOptimizer.UpdateIntRegsNoDealloc(RegisterTracking, tai(OneBeforeBlock.Next));
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if BlockStart.typ = ait_instruction then
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begin
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if MatchInstruction(BlockStart, A_B, [C_None], []) then
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begin
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if not IsJumpToLabel(taicpu(BlockStart)) or
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(JumpTargetOp(taicpu(BlockStart))^.ref^.index <> NR_NO) then
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Exit;
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EndJump := BlockStart;
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Break;
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end
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{ Check to see if we have a valid MOV instruction instead }
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else if (taicpu(BlockStart).opcode <> A_MOV) or
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{ Can't include the stack pointer in CSEL }
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fOptimizer.RegInInstruction(NR_SP, BlockStart) then
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begin
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Exit;
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end
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else
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{ This will be a valid MOV }
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fAllocationRange := BlockStart;
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end;
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OneBeforeBlock := BlockStart;
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fOptimizer.GetNextInstruction(BlockStart, BlockStart);
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end;
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if (BlockStart = fOptimizer.BlockEnd) then
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Exit;
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BlockStop := BlockStart;
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Result := True;
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end;
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function TCSELTracking.AnalyseMOVBlock(BlockStart, BlockStop, SearchStart: tai): LongInt;
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var
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hp1: tai;
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RefModified: Boolean;
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begin
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Result := 0;
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hp1 := BlockStart;
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RefModified := False; { As long as the condition is inverted, this can be reset }
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while assigned(hp1) and
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(hp1 <> BlockStop) do
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begin
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case hp1.typ of
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ait_instruction:
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if MatchInstruction(hp1, A_MOV, []) then
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begin
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Inc(Result);
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if taicpu(hp1).oper[1]^.typ = top_reg then
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begin
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Inc(Result);
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end
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else if not (cs_opt_size in current_settings.optimizerswitches) and
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{ CSEL with constants grows the code size }
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TryCSELConst(hp1, SearchStart, BlockStop, Result) then
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begin
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{ Register was reserved by TryCSELConst and
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stored on ConstRegs }
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end
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else
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begin
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Result := -1;
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Exit;
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end;
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end
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else
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begin
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Result := -1;
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Exit;
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end;
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else
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{ Most likely an align };
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end;
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fOptimizer.GetNextInstruction(hp1, hp1);
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end;
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end;
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constructor TCSELTracking.Init(Optimizer: TCpuAsmOptimizer; var p_initialjump, p_initialmov: tai; var AFirstLabel: TAsmLabel);
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{ For the tsBranching type, increase the weighting score to account for the new conditional jump
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(this is done as a separate stage because the double types are extensions of the branching type,
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but we can't discount the conditional jump until the last step) }
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procedure EvaluateBranchingType;
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begin
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Inc(CSELScore);
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if (CSELScore > MAX_CSEL_INSTRUCTIONS) then
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{ Too many instructions to be worthwhile }
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fState := tsInvalid;
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end;
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var
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hp1: tai;
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Count: Integer;
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begin
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{ Table of valid CSEL block types
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|
Block type 2nd Jump Mid-label 2nd MOVs 3rd Jump End-label
|
||||||
|
---------- --------- --------- --------- --------- ---------
|
||||||
|
tsSimple X Yes X X X
|
||||||
|
tsDetour = 1st X X X X
|
||||||
|
tsBranching <> Mid Yes X X X
|
||||||
|
tsDouble End-label Yes * Yes X Yes
|
||||||
|
tsDoubleBranchSame <> Mid Yes * Yes = 2nd X
|
||||||
|
tsDoubleBranchDifferent <> Mid Yes * Yes <> 2nd X
|
||||||
|
tsDoubleSecondBranching End-label Yes * Yes <> 2nd Yes
|
||||||
|
|
||||||
|
* Only one reference allowed
|
||||||
|
}
|
||||||
|
|
||||||
|
hp1 := nil; { To prevent compiler warnings }
|
||||||
|
|
||||||
|
Optimizer.CopyUsedRegs(RegisterTracking);
|
||||||
|
fOptimizer := Optimizer;
|
||||||
|
fLabel := AFirstLabel;
|
||||||
|
|
||||||
|
CSELScore := 0;
|
||||||
|
ConstCount := 0;
|
||||||
|
|
||||||
|
{ Initialise RegWrites, ConstRegs, ConstVals, ConstSizes, ConstWriteSizes and ConstMovs }
|
||||||
|
FillChar(RegWrites[0], MAX_CSEL_INSTRUCTIONS * 2 * SizeOf(TRegister), 0);
|
||||||
|
FillChar(ConstRegs[0], MAX_CSEL_REGISTERS * SizeOf(TRegister), 0);
|
||||||
|
FillChar(ConstVals[0], MAX_CSEL_REGISTERS * SizeOf(TCGInt), 0);
|
||||||
|
FillChar(ConstSizes[0], MAX_CSEL_REGISTERS * SizeOf(TSubRegister), 0);
|
||||||
|
FillChar(ConstWriteSizes[0], first_int_imreg * SizeOf(TOpSize), 0);
|
||||||
|
FillChar(ConstMovs[0], MAX_CSEL_REGISTERS * SizeOf(taicpu), 0);
|
||||||
|
|
||||||
|
fInsertionPoint := p_initialjump;
|
||||||
|
fCondition := nil;
|
||||||
|
fInitialJump := p_initialjump;
|
||||||
|
fFirstMovBlock := p_initialmov;
|
||||||
|
fFirstMovBlockStop := nil;
|
||||||
|
|
||||||
|
fSecondJump := nil;
|
||||||
|
fSecondMovBlock := nil;
|
||||||
|
fSecondMovBlockStop := nil;
|
||||||
|
|
||||||
|
fMidLabel := nil;
|
||||||
|
|
||||||
|
fSecondJump := nil;
|
||||||
|
fSecondMovBlock := nil;
|
||||||
|
|
||||||
|
fEndLabel := nil;
|
||||||
|
|
||||||
|
fAllocationRange := nil;
|
||||||
|
|
||||||
|
{ Assume it all goes horribly wrong! }
|
||||||
|
fState := tsInvalid;
|
||||||
|
|
||||||
|
{ Look backwards at the comparisons to get an accurate picture of register usage and a better position for any MOV const,reg insertions }
|
||||||
|
if Optimizer.GetLastInstruction(p_initialjump, fCondition) and
|
||||||
|
(
|
||||||
|
MatchInstruction(fCondition, [A_CMP, A_CMN, A_TST], []) or
|
||||||
|
(
|
||||||
|
(fCondition.typ = ait_instruction) and
|
||||||
|
(taicpu(fCondition).opcode = A_AND) and
|
||||||
|
(taicpu(fCondition).oppostfix = PF_S)
|
||||||
|
)
|
||||||
|
) then
|
||||||
|
begin
|
||||||
|
{ Mark all the registers in the comparison as 'in use', even if they've just been deallocated }
|
||||||
|
for Count := 0 to taicpu(fCondition).ops - 1 do
|
||||||
|
with taicpu(fCondition).oper[Count]^ do
|
||||||
|
case typ of
|
||||||
|
top_reg:
|
||||||
|
if getregtype(reg) = R_INTREGISTER then
|
||||||
|
Optimizer.IncludeRegInUsedRegs(reg, RegisterTracking);
|
||||||
|
top_ref:
|
||||||
|
begin
|
||||||
|
if
|
||||||
|
(ref^.base <> NR_NO) then
|
||||||
|
Optimizer.IncludeRegInUsedRegs(ref^.base, RegisterTracking);
|
||||||
|
|
||||||
|
if (ref^.index <> NR_NO) then
|
||||||
|
Optimizer.IncludeRegInUsedRegs(ref^.index, RegisterTracking);
|
||||||
|
end
|
||||||
|
else
|
||||||
|
;
|
||||||
|
end;
|
||||||
|
|
||||||
|
{ When inserting instructions before hp_prev, try to insert them
|
||||||
|
before the allocation of the FLAGS register }
|
||||||
|
if not SetAndTest(Optimizer.FindRegAllocBackward(NR_DEFAULTFLAGS, tai(fCondition.Previous)), fInsertionPoint) or
|
||||||
|
(tai_regalloc(fInsertionPoint).ratype = ra_dealloc) then
|
||||||
|
{ If not found, set it equal to the condition so it's something sensible }
|
||||||
|
fInsertionPoint := fCondition;
|
||||||
|
|
||||||
|
end
|
||||||
|
else
|
||||||
|
fCondition := nil;
|
||||||
|
|
||||||
|
{ When inserting instructions, try to insert them before the allocation of the FLAGS register }
|
||||||
|
if SetAndTest(Optimizer.FindRegAllocBackward(NR_DEFAULTFLAGS, tai(p_initialjump.Previous)), hp1) and
|
||||||
|
(tai_regalloc(hp1).ratype <> ra_dealloc) then
|
||||||
|
{ If not found, set it equal to p so it's something sensible }
|
||||||
|
fInsertionPoint := hp1;
|
||||||
|
|
||||||
|
hp1 := p_initialmov;
|
||||||
|
|
||||||
|
if not InitialiseBlock(p_initialmov, p_initialjump, fFirstMovBlockStop, fSecondJump) then
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
hp1 := fFirstMovBlockStop; { Will either be on a label or a jump }
|
||||||
|
|
||||||
|
if (hp1.typ <> ait_label) then { should be on a jump }
|
||||||
|
begin
|
||||||
|
if not Optimizer.GetNextInstruction(hp1, fMidLabel) or (fMidLabel.typ <> ait_label) then
|
||||||
|
{ Need a label afterwards }
|
||||||
|
Exit;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
fMidLabel := hp1;
|
||||||
|
|
||||||
|
if tai_label(fMidLabel).labsym <> AFirstLabel then
|
||||||
|
{ Not the correct label }
|
||||||
|
fMidLabel := nil;
|
||||||
|
|
||||||
|
if not Assigned(fSecondJump) and not Assigned(fMidLabel) then
|
||||||
|
{ If there's neither a 2nd jump nor correct label, then it's invalid
|
||||||
|
(see above table) }
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
{ Analyse the first block of MOVs more closely }
|
||||||
|
CSELScore := AnalyseMOVBlock(fFirstMovBlock, fFirstMovBlockStop, fInsertionPoint);
|
||||||
|
|
||||||
|
if Assigned(fSecondJump) then
|
||||||
|
begin
|
||||||
|
if (JumpTargetOp(taicpu(fSecondJump))^.ref^.symbol = AFirstLabel) then
|
||||||
|
begin
|
||||||
|
fState := tsDetour
|
||||||
|
end
|
||||||
|
else
|
||||||
|
begin
|
||||||
|
{ Need the correct mid-label for this one }
|
||||||
|
if not Assigned(fMidLabel) then
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
fState := tsBranching;
|
||||||
|
end;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
{ No jump. but mid-label is present }
|
||||||
|
fState := tsSimple;
|
||||||
|
|
||||||
|
if (CSELScore > MAX_CSEL_INSTRUCTIONS) or (CSELScore <= 0) then
|
||||||
|
begin
|
||||||
|
{ Invalid or too many instructions to be worthwhile }
|
||||||
|
fState := tsInvalid;
|
||||||
|
Exit;
|
||||||
|
end;
|
||||||
|
|
||||||
|
|
||||||
|
{ check further for
|
||||||
|
b xxx
|
||||||
|
<several movs 1>
|
||||||
|
bl yyy
|
||||||
|
xxx:
|
||||||
|
<several movs 2>
|
||||||
|
yyy:
|
||||||
|
|
||||||
|
etc.
|
||||||
|
}
|
||||||
|
if (fState = tsBranching) and
|
||||||
|
{ Estimate for required savings for extra jump }
|
||||||
|
(CSELScore <= MAX_CSEL_INSTRUCTIONS - 1) and
|
||||||
|
{ Only one reference is allowed for double blocks }
|
||||||
|
(AFirstLabel.getrefs = 1) then
|
||||||
|
begin
|
||||||
|
Optimizer.GetNextInstruction(fMidLabel, hp1);
|
||||||
|
fSecondMovBlock := hp1;
|
||||||
|
|
||||||
|
if not InitialiseBlock(fSecondMovBlock, fMidLabel, fSecondMovBlockStop, fThirdJump) then
|
||||||
|
begin
|
||||||
|
EvaluateBranchingType;
|
||||||
|
Exit;
|
||||||
|
end;
|
||||||
|
|
||||||
|
hp1 := fSecondMovBlockStop; { Will either be on a label or a jump }
|
||||||
|
|
||||||
|
if (hp1.typ <> ait_label) then { should be on a jump }
|
||||||
|
begin
|
||||||
|
if not Optimizer.GetNextInstruction(hp1, fEndLabel) or (fEndLabel.typ <> ait_label) then
|
||||||
|
begin
|
||||||
|
{ Need a label afterwards }
|
||||||
|
EvaluateBranchingType;
|
||||||
|
Exit;
|
||||||
|
end;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
fEndLabel := hp1;
|
||||||
|
|
||||||
|
if tai_label(fEndLabel).labsym <> JumpTargetOp(taicpu(fSecondJump))^.ref^.symbol then
|
||||||
|
{ Second jump doesn't go to the end }
|
||||||
|
fEndLabel := nil;
|
||||||
|
|
||||||
|
if not Assigned(fThirdJump) and not Assigned(fEndLabel) then
|
||||||
|
begin
|
||||||
|
{ If there's neither a 3rd jump nor correct end label, then it's
|
||||||
|
not a invalid double block, but is a valid single branching
|
||||||
|
block (see above table) }
|
||||||
|
EvaluateBranchingType;
|
||||||
|
Exit;
|
||||||
|
end;
|
||||||
|
|
||||||
|
Count := AnalyseMOVBlock(fSecondMovBlock, fSecondMovBlockStop, fMidLabel);
|
||||||
|
|
||||||
|
if (Count > MAX_CSEL_INSTRUCTIONS) or (Count <= 0) then
|
||||||
|
{ Invalid or too many instructions to be worthwhile }
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
Inc(CSELScore, Count);
|
||||||
|
|
||||||
|
if Assigned(fThirdJump) then
|
||||||
|
begin
|
||||||
|
if not Assigned(fSecondJump) then
|
||||||
|
fState := tsDoubleSecondBranching
|
||||||
|
else if (JumpTargetOp(taicpu(fSecondJump))^.ref^.symbol = JumpTargetOp(taicpu(fThirdJump))^.ref^.symbol) then
|
||||||
|
fState := tsDoubleBranchSame
|
||||||
|
else
|
||||||
|
fState := tsDoubleBranchDifferent;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
fState := tsDouble;
|
||||||
|
end;
|
||||||
|
|
||||||
|
if fState = tsBranching then
|
||||||
|
EvaluateBranchingType;
|
||||||
|
end;
|
||||||
|
|
||||||
|
{ Tries to convert a mov const,%reg instruction into a CSEL by reserving a
|
||||||
|
new register to store the constant }
|
||||||
|
function TCSELTracking.TryCSELConst(p, start, stop: tai; var Count: LongInt): Boolean;
|
||||||
|
var
|
||||||
|
RegSize: TSubRegister;
|
||||||
|
CurrentVal: TCGInt;
|
||||||
|
ANewReg: TRegister;
|
||||||
|
X: ShortInt;
|
||||||
|
begin
|
||||||
|
Result := False;
|
||||||
|
|
||||||
|
if not MatchOpType(taicpu(p), top_reg, top_const) then
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
if ConstCount >= MAX_CSEL_REGISTERS then
|
||||||
|
{ Arrays are full }
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
{ See if the value has already been reserved for another CSEL instruction }
|
||||||
|
CurrentVal := taicpu(p).oper[1]^.val;
|
||||||
|
RegSize := getsubreg(taicpu(p).oper[0]^.reg);
|
||||||
|
for X := 0 to ConstCount - 1 do
|
||||||
|
if ConstVals[X] = CurrentVal then
|
||||||
|
begin
|
||||||
|
ConstRegs[ConstCount] := ConstRegs[X];
|
||||||
|
ConstSizes[ConstCount] := RegSize;
|
||||||
|
ConstVals[ConstCount] := CurrentVal;
|
||||||
|
|
||||||
|
Inc(ConstCount);
|
||||||
|
Inc(Count);
|
||||||
|
|
||||||
|
Result := True;
|
||||||
|
Exit;
|
||||||
|
end;
|
||||||
|
|
||||||
|
ANewReg := fOptimizer.GetIntRegisterBetween(R_SUBWHOLE, RegisterTracking, start, stop, True);
|
||||||
|
if ANewReg = NR_NO then
|
||||||
|
{ No free registers }
|
||||||
|
Exit;
|
||||||
|
|
||||||
|
{ Reserve the register so subsequent TryCSELConst calls don't all end
|
||||||
|
up vying for the same register }
|
||||||
|
fOptimizer.IncludeRegInUsedRegs(ANewReg, RegisterTracking);
|
||||||
|
|
||||||
|
ConstRegs[ConstCount] := ANewReg;
|
||||||
|
ConstSizes[ConstCount] := RegSize;
|
||||||
|
ConstVals[ConstCount] := CurrentVal;
|
||||||
|
|
||||||
|
Inc(ConstCount);
|
||||||
|
Inc(Count);
|
||||||
|
|
||||||
|
Result := True;
|
||||||
|
end;
|
||||||
|
|
||||||
|
destructor TCSELTracking.Done;
|
||||||
|
begin
|
||||||
|
TAOptObj.ReleaseUsedRegs(RegisterTracking);
|
||||||
|
end;
|
||||||
|
|
||||||
|
procedure TCSELTracking.Process(out new_p: tai);
|
||||||
|
var
|
||||||
|
Count, Writes: LongInt;
|
||||||
|
RegMatch: Boolean;
|
||||||
|
hp1, hp_new: tai;
|
||||||
|
inverted_condition, condition: TAsmCond;
|
||||||
|
begin
|
||||||
|
if (fState in [tsInvalid, tsProcessed]) then
|
||||||
|
InternalError(2023110702);
|
||||||
|
|
||||||
|
{ Repurpose RegisterTracking to mark registers that we've defined }
|
||||||
|
RegisterTracking[R_INTREGISTER].Clear;
|
||||||
|
|
||||||
|
Count := 0;
|
||||||
|
Writes := 0;
|
||||||
|
condition := taicpu(fInitialJump).condition;
|
||||||
|
inverted_condition := inverse_cond(condition);
|
||||||
|
|
||||||
|
{ Exclude tsDoubleBranchDifferent from this check, as the second block
|
||||||
|
doesn't get CSELs in this case }
|
||||||
|
if (fState in [tsDouble, tsDoubleBranchSame, tsDoubleSecondBranching]) then
|
||||||
|
begin
|
||||||
|
{ Include the jump in the flag tracking }
|
||||||
|
if Assigned(fThirdJump) then
|
||||||
|
begin
|
||||||
|
if (fState = tsDoubleBranchSame) then
|
||||||
|
begin
|
||||||
|
{ Will be an unconditional jump, so track to the instruction before it }
|
||||||
|
if not fOptimizer.GetLastInstruction(fThirdJump, hp1) then
|
||||||
|
InternalError(2023110712);
|
||||||
|
end
|
||||||
|
else
|
||||||
|
hp1 := fThirdJump;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
hp1 := fSecondMovBlockStop;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
begin
|
||||||
|
{ Include a conditional jump in the flag tracking }
|
||||||
|
if Assigned(fSecondJump) then
|
||||||
|
begin
|
||||||
|
if (fState = tsDetour) then
|
||||||
|
begin
|
||||||
|
{ Will be an unconditional jump, so track to the instruction before it }
|
||||||
|
if not fOptimizer.GetLastInstruction(fSecondJump, hp1) then
|
||||||
|
InternalError(2023110713);
|
||||||
|
end
|
||||||
|
else
|
||||||
|
hp1 := fSecondJump;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
hp1 := fFirstMovBlockStop;
|
||||||
|
end;
|
||||||
|
|
||||||
|
fOptimizer.AllocRegBetween(NR_DEFAULTFLAGS, fInitialJump, hp1, fOptimizer.UsedRegs);
|
||||||
|
|
||||||
|
{ Process the second set of MOVs first, because if a destination
|
||||||
|
register is shared between the first and second MOV sets, it is more
|
||||||
|
efficient to turn the first one into a MOV instruction and place it
|
||||||
|
before the CMP if possible, but we won't know which registers are
|
||||||
|
shared until we've processed at least one list, so we might as well
|
||||||
|
make it the second one since that won't be modified again. }
|
||||||
|
|
||||||
|
if (fState in [tsDouble, tsDoubleBranchSame, tsDoubleBranchDifferent, tsDoubleSecondBranching]) then
|
||||||
|
begin
|
||||||
|
hp1 := fSecondMovBlock;
|
||||||
|
repeat
|
||||||
|
if not Assigned(hp1) then
|
||||||
|
InternalError(2018062902);
|
||||||
|
|
||||||
|
if (hp1.typ = ait_instruction) then
|
||||||
|
begin
|
||||||
|
{ Extra safeguard }
|
||||||
|
if (taicpu(hp1).opcode <> A_MOV) then
|
||||||
|
InternalError(2018062903);
|
||||||
|
|
||||||
|
{ Note: tsDoubleBranchDifferent is essentially identical to
|
||||||
|
tsBranching and the 2nd block is best left largely
|
||||||
|
untouched, but we need to evaluate which registers the MOVs
|
||||||
|
write to in order to track what would be complementary CSEL
|
||||||
|
pairs that can be further optimised. [Kit] }
|
||||||
|
if fState <> tsDoubleBranchDifferent then
|
||||||
|
begin
|
||||||
|
if taicpu(hp1).oper[1]^.typ = top_const then
|
||||||
|
begin
|
||||||
|
RegMatch := False;
|
||||||
|
|
||||||
|
for Count := 0 to ConstCount - 1 do
|
||||||
|
if (ConstVals[Count] = taicpu(hp1).oper[1]^.val) and
|
||||||
|
(getsubreg(taicpu(hp1).oper[0]^.reg) = ConstSizes[Count]) then
|
||||||
|
begin
|
||||||
|
RegMatch := True;
|
||||||
|
|
||||||
|
{ If it's in RegisterTracking, then this register
|
||||||
|
is being used more than once and hence has
|
||||||
|
already had its value defined (it gets added to
|
||||||
|
UsedRegs through AllocRegBetween below) }
|
||||||
|
if not RegisterTracking[R_INTREGISTER].IsUsed(ConstRegs[Count]) then
|
||||||
|
begin
|
||||||
|
hp_new := tai(hp1.getcopy);
|
||||||
|
taicpu(hp_new).oper[0]^.reg := ConstRegs[Count];
|
||||||
|
taicpu(hp_new).fileinfo := taicpu(fInitialJump).fileinfo;
|
||||||
|
|
||||||
|
fOptimizer.asml.InsertBefore(hp_new, fInsertionPoint);
|
||||||
|
fOptimizer.IncludeRegInUsedRegs(ConstRegs[Count], RegisterTracking);
|
||||||
|
|
||||||
|
ConstMovs[Count] := hp_new;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
{ We just need an instruction between hp_prev and hp1
|
||||||
|
where we know the register is marked as in use }
|
||||||
|
hp_new := fSecondMovBlock;
|
||||||
|
|
||||||
|
{ Keep track of largest write for this register so it can be optimised later }
|
||||||
|
if (getsubreg(taicpu(hp1).oper[0]^.reg) > ConstWriteSizes[getsupreg(ConstRegs[Count])]) then
|
||||||
|
ConstWriteSizes[getsupreg(ConstRegs[Count])] := getsubreg(taicpu(hp1).oper[0]^.reg);
|
||||||
|
|
||||||
|
fOptimizer.AllocRegBetween(ConstRegs[Count], hp_new, hp1, fOptimizer.UsedRegs);
|
||||||
|
taicpu(hp1).loadreg(1, newreg(R_INTREGISTER, getsupreg(ConstRegs[Count]), ConstSizes[Count]));
|
||||||
|
Break;
|
||||||
|
end;
|
||||||
|
|
||||||
|
if not RegMatch then
|
||||||
|
InternalError(2021100413);
|
||||||
|
end;
|
||||||
|
|
||||||
|
taicpu(hp1).opcode := A_CSEL;
|
||||||
|
taicpu(hp1).ops := 4;
|
||||||
|
taicpu(hp1).loadreg(2, taicpu(hp1).oper[0]^.reg);
|
||||||
|
taicpu(hp1).loadconditioncode(3, condition);
|
||||||
|
end;
|
||||||
|
|
||||||
|
{ Store these writes to search for duplicates later on }
|
||||||
|
RegWrites[Writes] := taicpu(hp1).oper[0]^.reg;
|
||||||
|
Inc(Writes);
|
||||||
|
end;
|
||||||
|
|
||||||
|
fOptimizer.GetNextInstruction(hp1, hp1);
|
||||||
|
until (hp1 = fSecondMovBlockStop);
|
||||||
|
end;
|
||||||
|
|
||||||
|
{ Now do the first set of MOVs }
|
||||||
|
hp1 := fFirstMovBlock;
|
||||||
|
repeat
|
||||||
|
if not Assigned(hp1) then
|
||||||
|
InternalError(2018062904);
|
||||||
|
|
||||||
|
if (hp1.typ = ait_instruction) then
|
||||||
|
begin
|
||||||
|
RegMatch := False;
|
||||||
|
|
||||||
|
{ Extra safeguard }
|
||||||
|
if (taicpu(hp1).opcode <> A_MOV) then
|
||||||
|
InternalError(2018062905);
|
||||||
|
|
||||||
|
{ Search through the RegWrites list to see if there are any
|
||||||
|
opposing CSEL pairs that write to the same register }
|
||||||
|
for Count := 0 to Writes - 1 do
|
||||||
|
if (RegWrites[Count] = taicpu(hp1).oper[0]^.reg) then
|
||||||
|
begin
|
||||||
|
{ We have a match. Keep this as a MOV }
|
||||||
|
|
||||||
|
{ Move ahead in preparation }
|
||||||
|
fOptimizer.GetNextInstruction(hp1, hp1);
|
||||||
|
|
||||||
|
RegMatch := True;
|
||||||
|
Break;
|
||||||
|
end;
|
||||||
|
|
||||||
|
if RegMatch then
|
||||||
|
Continue;
|
||||||
|
|
||||||
|
if taicpu(hp1).oper[1]^.typ = top_const then
|
||||||
|
begin
|
||||||
|
for Count := 0 to ConstCount - 1 do
|
||||||
|
if (ConstVals[Count] = taicpu(hp1).oper[1]^.val) and
|
||||||
|
(getsubreg(taicpu(hp1).oper[0]^.reg) = ConstSizes[Count]) then
|
||||||
|
begin
|
||||||
|
RegMatch := True;
|
||||||
|
|
||||||
|
{ If it's in RegisterTracking, then this register is
|
||||||
|
being used more than once and hence has already had
|
||||||
|
its value defined (it gets added to UsedRegs through
|
||||||
|
AllocRegBetween below) }
|
||||||
|
if not RegisterTracking[R_INTREGISTER].IsUsed(ConstRegs[Count]) then
|
||||||
|
begin
|
||||||
|
hp_new := tai(hp1.getcopy);
|
||||||
|
taicpu(hp_new).oper[0]^.reg := ConstRegs[Count];
|
||||||
|
taicpu(hp_new).fileinfo := taicpu(fInitialJump).fileinfo;
|
||||||
|
|
||||||
|
fOptimizer.asml.InsertBefore(hp_new, fInsertionPoint);
|
||||||
|
fOptimizer.IncludeRegInUsedRegs(ConstRegs[Count], RegisterTracking);
|
||||||
|
|
||||||
|
ConstMovs[Count] := hp_new;
|
||||||
|
end
|
||||||
|
else
|
||||||
|
{ We just need an instruction between hp_prev and hp1
|
||||||
|
where we know the register is marked as in use }
|
||||||
|
hp_new := fFirstMovBlock;
|
||||||
|
|
||||||
|
{ Keep track of largest write for this register so it can be optimised later }
|
||||||
|
if (getsubreg(taicpu(hp1).oper[0]^.reg) > ConstWriteSizes[getsupreg(ConstRegs[Count])]) then
|
||||||
|
ConstWriteSizes[getsupreg(ConstRegs[Count])] := getsubreg(taicpu(hp1).oper[0]^.reg);
|
||||||
|
|
||||||
|
fOptimizer.AllocRegBetween(ConstRegs[Count], hp_new, hp1, fOptimizer.UsedRegs);
|
||||||
|
taicpu(hp1).loadreg(1, newreg(R_INTREGISTER, getsupreg(ConstRegs[Count]), ConstSizes[Count]));
|
||||||
|
Break;
|
||||||
|
end;
|
||||||
|
|
||||||
|
if not RegMatch then
|
||||||
|
InternalError(2021100412);
|
||||||
|
end;
|
||||||
|
|
||||||
|
taicpu(hp1).opcode := A_CSEL;
|
||||||
|
taicpu(hp1).ops := 4;
|
||||||
|
taicpu(hp1).loadreg(2, taicpu(hp1).oper[0]^.reg);
|
||||||
|
taicpu(hp1).loadconditioncode(3, inverted_condition);
|
||||||
|
|
||||||
|
if (fState = tsDoubleBranchDifferent) then
|
||||||
|
begin
|
||||||
|
{ Store these writes to search for duplicates later on }
|
||||||
|
RegWrites[Writes] := taicpu(hp1).oper[0]^.reg;
|
||||||
|
Inc(Writes);
|
||||||
|
end;
|
||||||
|
end;
|
||||||
|
|
||||||
|
fOptimizer.GetNextInstruction(hp1, hp1);
|
||||||
|
until (hp1 = fFirstMovBlockStop);
|
||||||
|
|
||||||
|
{ Update initialisation MOVs to the smallest possible size }
|
||||||
|
for Count := 0 to ConstCount - 1 do
|
||||||
|
if Assigned(ConstMovs[Count]) then
|
||||||
|
setsubreg(taicpu(ConstMovs[Count]).oper[0]^.reg, ConstWriteSizes[Word(ConstRegs[Count])]);
|
||||||
|
|
||||||
|
case fState of
|
||||||
|
tsSimple:
|
||||||
|
begin
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Simple type)', fInitialJump);
|
||||||
|
{ No branch to delete }
|
||||||
|
end;
|
||||||
|
tsDetour:
|
||||||
|
begin
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Detour type)', fInitialJump);
|
||||||
|
{ Preserve jump }
|
||||||
|
end;
|
||||||
|
tsBranching, tsDoubleBranchDifferent:
|
||||||
|
begin
|
||||||
|
if (fState = tsBranching) then
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Branching type)', fInitialJump)
|
||||||
|
else
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Double branching (different) type)', fInitialJump);
|
||||||
|
taicpu(fSecondJump).condition := inverted_condition;
|
||||||
|
end;
|
||||||
|
tsDouble, tsDoubleBranchSame:
|
||||||
|
begin
|
||||||
|
if (fState = tsDouble) then
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Double type)', fInitialJump)
|
||||||
|
else
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Double branching (same) type)', fInitialJump);
|
||||||
|
{ Delete second jump }
|
||||||
|
JumpTargetOp(taicpu(fSecondJump))^.ref^.symbol.decrefs;
|
||||||
|
fOptimizer.RemoveInstruction(fSecondJump);
|
||||||
|
end;
|
||||||
|
tsDoubleSecondBranching:
|
||||||
|
begin
|
||||||
|
fOptimizer.DebugMsg(SPeepholeOptimization + 'CSEL Block (Double, second branching type)', fInitialJump);
|
||||||
|
{ Delete second jump, preserve third jump as conditional }
|
||||||
|
JumpTargetOp(taicpu(fSecondJump))^.ref^.symbol.decrefs;
|
||||||
|
fOptimizer.RemoveInstruction(fSecondJump);
|
||||||
|
taicpu(fThirdJump).condition := condition;
|
||||||
|
end;
|
||||||
|
else
|
||||||
|
InternalError(2023110721);
|
||||||
|
end;
|
||||||
|
|
||||||
|
{ Now we can safely decrement the reference count }
|
||||||
|
tasmlabel(fLabel).decrefs;
|
||||||
|
|
||||||
|
fOptimizer.UpdateUsedRegs(tai(fInitialJump.next));
|
||||||
|
|
||||||
|
{ Remove the original jump }
|
||||||
|
fOptimizer.RemoveInstruction(fInitialJump); { Note, the choice to not use RemoveCurrentp is deliberate }
|
||||||
|
|
||||||
|
new_p := fFirstMovBlock; { Appears immediately after the initial jump }
|
||||||
|
|
||||||
|
fState := tsProcessed;
|
||||||
|
end;
|
||||||
|
|
||||||
begin
|
begin
|
||||||
casmoptimizer:=TCpuAsmOptimizer;
|
casmoptimizer:=TCpuAsmOptimizer;
|
||||||
End.
|
End.
|
||||||
|
|||||||
@ -324,6 +324,7 @@ unit cpubase;
|
|||||||
function reg_cgsize(const reg: tregister) : tcgsize;
|
function reg_cgsize(const reg: tregister) : tcgsize;
|
||||||
function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
|
function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
|
||||||
function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
|
function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
|
||||||
|
function is_calljmpmaybeuncondret(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
|
||||||
procedure inverse_flags(var f: TResFlags);
|
procedure inverse_flags(var f: TResFlags);
|
||||||
function flags_to_cond(const f: TResFlags) : TAsmCond;
|
function flags_to_cond(const f: TResFlags) : TAsmCond;
|
||||||
function findreg_by_number(r:Tregister):tregisterindex;
|
function findreg_by_number(r:Tregister):tregisterindex;
|
||||||
@ -451,6 +452,13 @@ unit cpubase;
|
|||||||
end;
|
end;
|
||||||
|
|
||||||
|
|
||||||
|
function is_calljmpmaybeuncondret(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
|
||||||
|
begin
|
||||||
|
{ Note that the caller still has to check the instruction's condition }
|
||||||
|
is_calljmpmaybeuncondret:=(o in [A_B,A_BL,A_BLR,A_RET]);
|
||||||
|
end;
|
||||||
|
|
||||||
|
|
||||||
procedure inverse_flags(var f: TResFlags);
|
procedure inverse_flags(var f: TResFlags);
|
||||||
const
|
const
|
||||||
inv_flags: array[TResFlags] of TResFlags =
|
inv_flags: array[TResFlags] of TResFlags =
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user