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* x86: Converted BTR and BTS tests to use a new utility function to check if BTx instructions are acceptable to use
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
8220221866
commit
f2bd099afb
@ -131,6 +131,10 @@ unit aoptx86;
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class function CanBeCMOV(p : tai) : boolean; static;
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{ Returns true if the given logic instruction can be converted into a BTx instruction (BT not included) }
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class function IsBTXAcceptable(p : tai) : boolean; static;
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{ Converts the LEA instruction to ADD/INC/SUB/DEC. Returns True if the
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conversion was successful }
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function ConvertLEA(const p : taicpu): Boolean;
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@ -13528,6 +13532,42 @@ unit aoptx86;
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end;
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{ Returns true if the given logic instruction can be converted into a BTx instruction (BT not included) }
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class function TX86AsmOptimizer.IsBTXAcceptable(p : tai) : boolean;
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begin
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Result := False;
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if not (CPUX86_HAS_BTX in cpu_capabilities[current_settings.optimizecputype]) then
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Exit;
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{ For sizes less than S_L, the byte size is equal or larger with BTx,
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so don't bother optimising }
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if not MatchInstruction(p, A_AND, A_OR, A_XOR, [S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) then
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Exit;
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if (taicpu(p).oper[0]^.typ <> top_const) or
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{ If the value can fit into an 8-bit signed integer, a smaller
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instruction can be encoded with AND/OR/XOR, so don't optimise if it
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falls within this range }
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(
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(taicpu(p).oper[0]^.val > -128) and
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(taicpu(p).oper[0]^.val <= 127)
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) then
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Exit;
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{ If we're optimising for size, this is acceptable }
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if (cs_opt_size in current_settings.optimizerswitches) then
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Exit(True);
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if (taicpu(p).oper[1]^.typ = top_reg) and
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(CPUX86_HINT_FAST_BTX_REG_IMM in cpu_optimization_hints[current_settings.optimizecputype]) then
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Exit(True);
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if (taicpu(p).oper[1]^.typ <> top_reg) and
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(CPUX86_HINT_FAST_BTX_MEM_IMM in cpu_optimization_hints[current_settings.optimizecputype]) then
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Exit(True);
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end;
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function TX86AsmOptimizer.PostPeepholeOptAnd(var p : tai) : boolean;
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var
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hp1: tai;
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@ -13562,57 +13602,40 @@ unit aoptx86;
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Result := True;
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Exit; { and -> btr won't happen because an opsize of S_W won't be optimised anyway }
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end;
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end;
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{ If "not x" is a power of 2 (popcnt = 1), change:
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and $x, %reg/ref
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{ If "not x" is a power of 2 (popcnt = 1), change:
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and $x, %reg/ref
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To:
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btr lb(x), %reg/ref
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}
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if
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{$ifndef x86_64}
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(
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(cs_opt_size in current_settings.optimizerswitches) or
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{ BTR takes more than 1 cycle on earlier processors }
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(current_settings.optimizecputype >= cpu_Pentium2)
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) and
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{$endif not x86_64}
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{ For sizes less than S_L, the byte size is equal or larger with BT,
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so don't bother optimising }
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(taicpu(p).opsize >= S_L) and
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{ "btx $x,mem" is unacceptably slow, but oper[1] being top_reg is already checked }
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(
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{ If the value can bit into an 8-bit signed integer, a smaller
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instruction can be encded with OR, so don't optimise if it falls
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within this range }
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(taicpu(p).oper[0]^.val < -128) or
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(taicpu(p).oper[0]^.val >= 127)
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) and
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(
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{ Make sure a TEST doesn't follow that plays with the register }
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not GetNextInstruction(p, hp1) or
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not MatchInstruction(hp1, A_TEST, A_CMP, [taicpu(p).opsize]) or
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not MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^.reg)
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) then
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begin
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To:
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btr lb(x), %reg/ref
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}
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if IsBTXAcceptable(p) and
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(
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{ Make sure a TEST doesn't follow that plays with the register }
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not GetNextInstruction(p, hp1) or
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not MatchInstruction(hp1, A_TEST, A_CMP, [taicpu(p).opsize]) or
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not MatchOperand(taicpu(hp1).oper[1]^, taicpu(p).oper[1]^.reg)
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) then
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begin
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{$push}{$R-}{$Q-}
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{ Value is a sign-extended 32-bit integer - just correct it
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if it's represented as an unsigned value }
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Value := not taicpu(p).oper[0]^.val;
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{ Value is a sign-extended 32-bit integer - just correct it
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if it's represented as an unsigned value. Also, IsBTXAcceptable
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checks to see if this operand is an immediate. }
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Value := not taicpu(p).oper[0]^.val;
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{$pop}
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{$ifdef x86_64}
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if taicpu(p).opsize = S_L then
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if taicpu(p).opsize = S_L then
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{$endif x86_64}
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Value := Value and $FFFFFFFF;
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Value := Value and $FFFFFFFF;
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if (PopCnt(QWord(Value)) = 1) then
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begin
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DebugMsg(SPeepholeOptimization + 'Changed AND (not $0x' + hexstr(taicpu(p).oper[0]^.val, 2) + ') to BTR ' + debug_tostr(BsrQWord(Value)) + ' to shrink instruction size (And2Btr)', p);
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taicpu(p).opcode := A_BTR;
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taicpu(p).oper[0]^.val := BsrQWord(Value); { Essentially the base 2 logarithm }
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Result := True;
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Exit;
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end;
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if (PopCnt(QWord(Value)) = 1) then
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begin
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DebugMsg(SPeepholeOptimization + 'Changed AND (not $0x' + hexstr(taicpu(p).oper[0]^.val, 2) + ') to BTR ' + debug_tostr(BsrQWord(Value)) + ' to shrink instruction size (And2Btr)', p);
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taicpu(p).opcode := A_BTR;
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taicpu(p).oper[0]^.val := BsrQWord(Value); { Essentially the base 2 logarithm }
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Result := True;
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Exit;
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end;
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end;
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end;
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@ -14090,25 +14113,9 @@ unit aoptx86;
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bts lb(x), %reg/ref
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}
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if (taicpu(p).opcode = A_OR) and
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{$ifndef x86_64}
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(
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(cs_opt_size in current_settings.optimizerswitches) or
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{ BTS takes more than 1 cycle on earlier processors }
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(current_settings.optimizecputype >= cpu_Pentium2)
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) and
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{$endif not x86_64}
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MatchOpType(taicpu(p), top_const, top_reg) and { "btx $x,mem" is unacceptably slow }
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IsBTXAcceptable(p) and
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{ IsBTXAcceptable checks to see if oper[0] is an immediate }
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(PopCnt(QWord(taicpu(p).oper[0]^.val)) = 1) and
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{ For sizes less than S_L, the byte size is equal or larger with BT,
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so don't bother optimising }
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(taicpu(p).opsize >= S_L) and
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(
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{ If the value can bit into an 8-bit signed integer, a smaller
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instruction can be encded with OR, so don't optimise if it falls
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within this range }
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(taicpu(p).oper[0]^.val < -128) or
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(taicpu(p).oper[0]^.val >= 127)
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) and
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(
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{ Don't optimise if a test instruction follows }
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not GetNextInstruction(p, hp1) or
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@ -14137,11 +14144,11 @@ unit aoptx86;
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(cs_opt_size in current_settings.optimizerswitches) or
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(
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(taicpu(p).oper[1]^.typ = top_reg) and
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(CPUX86_HAS_FAST_BTX in cpu_capabilities[current_settings.optimizecputype])
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(CPUX86_HINT_FAST_BT_REG_IMM in cpu_optimization_hints[current_settings.optimizecputype])
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) or
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(
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(taicpu(p).oper[1]^.typ <> top_reg) and
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(CPUX86_HAS_FAST_BT_MEM in cpu_capabilities[current_settings.optimizecputype])
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(CPUX86_HINT_FAST_BT_MEM_IMM in cpu_optimization_hints[current_settings.optimizecputype])
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)
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) and
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(PopCnt(QWord(taicpu(p).oper[0]^.val)) = 1) and
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