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* FPC uses meanwhile more mov instructions, so extended taicpu.is_same_reg_move to support them

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git-svn-id: trunk@38264 -
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florian 2018-02-17 09:45:19 +00:00
parent cd41312a8f
commit f66a91499d
1 changed files with 18 additions and 9 deletions
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27
compiler/x86/aasmcpu.pas
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@ -3718,15 +3718,24 @@ implementation
(oper[1]^.typ=top_reg) and
(oper[0]^.reg=oper[1]^.reg)
) or
(((opcode=A_MOVSS) or (opcode=A_MOVSD) or (opcode=A_MOVQ) or
(opcode=A_MOVAPS) or (opcode=A_MOVAPD) or
(opcode=A_VMOVSS) or (opcode=A_VMOVSD) or (opcode=A_VMOVQ) or
(opcode=A_VMOVAPS) or (opcode=A_VMOVAPD)) and
(regtype = R_MMREGISTER) and
(ops=2) and
(oper[0]^.typ=top_reg) and
(oper[1]^.typ=top_reg) and
(oper[0]^.reg=oper[1]^.reg)
({ checking the opcodes is a long "or" chain, so check first the registers which is more selective }
((regtype = R_MMREGISTER) and
(ops=2) and
(oper[0]^.typ=top_reg) and
(oper[1]^.typ=top_reg) and
(oper[0]^.reg=oper[1]^.reg)) and
(
(opcode=A_MOVSS) or (opcode=A_MOVSD) or
(opcode=A_MOVQ) or (opcode=A_MOVD) or
(opcode=A_MOVAPS) or (opcode=A_MOVAPD) or
(opcode=A_MOVUPS) or (opcode=A_MOVUPD) or
(opcode=A_MOVDQA) or (opcode=A_MOVDQU) or
(opcode=A_VMOVSS) or (opcode=A_VMOVSD) or
(opcode=A_VMOVQ) or (opcode=A_VMOVD) or
(opcode=A_VMOVAPS) or (opcode=A_VMOVAPD) or
(opcode=A_VMOVUPS) or (opcode=A_VMOVUPD) or
(opcode=A_VMOVDQA) or (opcode=A_VMOVDQU)
)
);
end;