* fix typo

* properly pass zba, zbb, zbs to march
This commit is contained in:
florian 2025-02-21 22:47:44 +01:00
parent 4664e510e6
commit fecd25bac1
2 changed files with 4 additions and 4 deletions

View File

@ -231,14 +231,14 @@ unit agrvgas;
function TRVGNUAssembler.MakeCmdLine: TCmdStr;
const
arch_str: array[boolean,tcputype] of string[10] = (
arch_str: array[boolean,tcputype] of string[18] = (
{$ifdef RISCV32}
('','rv32imac','rv32ima','rv32im','rv32i','rv32e','rv32imc','rv32imafdc','rv32imafd','rv32ec','rv32gc'),
('','rv32imafdc','rv32imafd','rv32imfd','rv32ifd','rv32efd','rv32imcfd','rv32imafdc','rv32imafd','rv32ecfd','rv32gc')
{$endif RISCV32}
{$ifdef RISCV64}
('','rv64imac','rv64ima','rv64im','rv64i','rv64imafdc','rv64imafd','rv64gc','rv64gcb'),
('','rv64imafdc','rv64imafd','rv64imfd','rv64ifd','rv64imafdc','rv64imafd','rv64gc','rv64gcb')
('','rv64imac','rv64ima','rv64im','rv64i','rv64imafdc','rv64imafd','rv64gc','rv64gc_zba_zbb_zbs'),
('','rv64imafdc','rv64imafd','rv64imfd','rv64ifd','rv64imafdc','rv64imafd','rv64gc','rv64gc_zba_zbb_zbs')
{$endif RISCV64}
);
begin

View File

@ -90,7 +90,7 @@ implementation
if CPURV_HAS_ZICOND in cpu_capabilities[current_settings.cputype] then
attr_arch:=attr_arch+'_zicond1p0';
if CPURV_HAS_CSR_INSTRUCTIONS in cpu_capabilities[current_settings.cputype] then
attr_arch:=attr_arch+'_zicrs2p0';
attr_arch:=attr_arch+'_zicsr2p0';
if CPURV_HAS_FETCH_FENCE in cpu_capabilities[current_settings.cputype] then
attr_arch:=attr_arch+'_zifencei2p0';
if CPURV_HAS_ZMMUL in cpu_capabilities[current_settings.cputype] then