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+ prefetch support for arm
git-svn-id: trunk@6561 -
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746e4770a6
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@ -161,6 +161,7 @@ uses
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constructor op_none(op : tasmop);
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constructor op_reg(op : tasmop;_op1 : tregister);
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constructor op_ref(op : tasmop;const _op1 : treference);
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constructor op_const(op : tasmop;_op1 : longint);
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constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
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@ -298,6 +299,15 @@ implementation
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end;
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{ for pld }
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constructor taicpu.op_ref(op : tasmop;const _op1 : treference);
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begin
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inherited create(op);
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ops:=1;
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loadref(0,_op1);
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end;
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constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
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begin
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inherited create(op);
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@ -48,6 +48,7 @@ interface
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procedure second_cos_real; override;
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procedure second_sin_real; override;
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}
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procedure second_prefetch; override;
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private
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procedure load_fpu_location;
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end;
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@ -58,6 +59,7 @@ implementation
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uses
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globtype,systems,
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cutils,verbose,globals,fmodule,
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cpuinfo,
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symconst,symdef,
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aasmbase,aasmtai,aasmdata,aasmcpu,
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cgbase,cgutils,
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@ -211,6 +213,30 @@ implementation
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end;
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}
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procedure tarminlinenode.second_prefetch;
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var
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ref : treference;
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r : tregister;
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begin
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if current_settings.cputype>=cpu_armv5 then
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begin
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secondpass(left);
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case left.location.loc of
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LOC_CREFERENCE,
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LOC_REFERENCE:
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begin
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r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
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cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
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reference_reset_base(ref,r,0);
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{ since the address might be nil we can't use ldr for older cpus }
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PLD,ref));
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end;
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else
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internalerror(200402021);
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end;
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end;
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end;
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begin
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cinlinenode:=tarminlinenode;
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end.
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