+ prefetch support for arm

git-svn-id: trunk@6561 -
This commit is contained in:
florian 2007-02-19 17:27:07 +00:00
parent 746e4770a6
commit ffd79553a0
2 changed files with 36 additions and 0 deletions

View File

@ -161,6 +161,7 @@ uses
constructor op_none(op : tasmop);
constructor op_reg(op : tasmop;_op1 : tregister);
constructor op_ref(op : tasmop;const _op1 : treference);
constructor op_const(op : tasmop;_op1 : longint);
constructor op_reg_reg(op : tasmop;_op1,_op2 : tregister);
@ -298,6 +299,15 @@ implementation
end;
{ for pld }
constructor taicpu.op_ref(op : tasmop;const _op1 : treference);
begin
inherited create(op);
ops:=1;
loadref(0,_op1);
end;
constructor taicpu.op_reg(op : tasmop;_op1 : tregister);
begin
inherited create(op);

View File

@ -48,6 +48,7 @@ interface
procedure second_cos_real; override;
procedure second_sin_real; override;
}
procedure second_prefetch; override;
private
procedure load_fpu_location;
end;
@ -58,6 +59,7 @@ implementation
uses
globtype,systems,
cutils,verbose,globals,fmodule,
cpuinfo,
symconst,symdef,
aasmbase,aasmtai,aasmdata,aasmcpu,
cgbase,cgutils,
@ -211,6 +213,30 @@ implementation
end;
}
procedure tarminlinenode.second_prefetch;
var
ref : treference;
r : tregister;
begin
if current_settings.cputype>=cpu_armv5 then
begin
secondpass(left);
case left.location.loc of
LOC_CREFERENCE,
LOC_REFERENCE:
begin
r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
reference_reset_base(ref,r,0);
{ since the address might be nil we can't use ldr for older cpus }
current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PLD,ref));
end;
else
internalerror(200402021);
end;
end;
end;
begin
cinlinenode:=tarminlinenode;
end.