Commit Graph

10 Commits

Author SHA1 Message Date
Robert Roland
7cefe8a822 Adding AArch64 CurrentEL register
CurrentEL is used to determine the current "exception level" in the CPU.

It has four possible results:

0b00 - EL0 - Application
0b01 - EL1 - Rich OS
0b10 - EL2 - Hypervisor
0b11 - EL3 - Firmware

https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/CurrentEL--Current-Exception-Level
https://developer.arm.com/documentation/102412/0100/Privilege-and-Exception-levels
2022-07-25 19:05:00 +00:00
Robert Roland
a19add9c88 Add cntfrq_el0 and cntpct_el0 AArch64 registers 2022-07-05 20:40:27 +00:00
Robert Roland
53e5a4a03a Adding aaarch64-embedded target
This adds support for aarch64-embedded, specifically for the Raspberry Pi 3.

Uses UART0 at 115200 baud 8N1 for console IO.
2022-01-05 12:29:00 +00:00
Jonas Maebe
9376f5a43a * AArch64: added SIMD instructions (only plain ARMv8-A for now)
o added AArch64 regset parsing support in assembler reader, means that "{"
     no longer starts comments there (like in the ARM assembler reader)
   o added AArch64 indexed SIMD register support and removed old cg hacks
     that worked around its absence

git-svn-id: trunk@47116 -
2020-10-15 20:29:36 +00:00
florian
69786ffe73 somehow committing went wrong, second part of last commit:
+ AArch64: support for vX.8b/vX.16b register names
+ support for more than 256 registers in the register dat files
- removed totherregisterset
+ AArch64: use vmov to load immediates if possible
+ AArch64: use eor to clear mm registers

git-svn-id: trunk@42917 -
2019-09-03 21:07:33 +00:00
Jonas Maebe
f1fb880f18 * fixed debug register values for vector registers
git-svn-id: trunk@29942 -
2015-02-23 22:54:15 +00:00
Jonas Maebe
9c55fa6f6c + FPCR, FPSR and TPIDR registers
git-svn-id: trunk@29878 -
2015-02-23 22:50:44 +00:00
Jonas Maebe
f1b619a942 * made (X|W)ZR and (W)SP separate registers, because a number of
instructions can use either depending on the encoding

git-svn-id: trunk@29831 -
2015-02-23 22:48:21 +00:00
florian
ca75588989 + first cpubase implementation for aarch64
git-svn-id: trunk@22901 -
2012-11-01 17:18:25 +00:00
florian
5af1d48158 + register definitions for AArch64 aka ARM64
+ Lazarus project for AArch64

Since AArch64 is very different from 32 Bit ARM, both won't share code in the compiler

git-svn-id: trunk@22894 -
2012-10-31 21:46:01 +00:00