Kirill Kranz
2f5cbbacb7
DynArrays works
...
because of InitHeap3, malloc3 and free3 functions from the psy-q-sdk
2024-09-29 16:58:12 +03:00
sergei
4e7c908b0d
+ MIPS: added movn and movz instructions.
...
git-svn-id: trunk@28007 -
2014-06-19 22:44:17 +00:00
sergei
c77225d2c4
+ MIPS: added some instructions.
...
git-svn-id: trunk@27991 -
2014-06-17 22:52:35 +00:00
florian
b2b26f84cf
* partially merged the mips-embedded branch of Michael Ring:
...
- startup code/controller units are not merged yet
- assembler call does not pass the needed CPU type yet
git-svn-id: trunk@27188 -
2014-03-19 21:25:38 +00:00
sergei
828309e61d
- MIPS: removed opcodes that are not in any known documentation.
...
git-svn-id: trunk@25023 -
2013-07-01 06:09:53 +00:00
sergei
2868a30cce
+ Added mips32r2 opcodes needed for pic32.
...
* Output registers of type R_SPECIALREGISTER as numbers.
+ For MTC0/MFC0 instructions, set type of first operand to R_SPECIALREGISTER, since it designates a coprocessor register.
git-svn-id: trunk@24799 -
2013-06-03 20:01:30 +00:00
sergei
2944fc8839
* MIPS improvements:
...
* reworked condition codes, changed BC1T and BC1F from separate instructions to condition jumps.
- removed A_P_SW, A_P_LW and A_SPARC8UNIMP
+ support '.set at' and '.set noat' directives
+ prepare to support bgtz,bgez,bltz,blez instructions.
git-svn-id: trunk@24631 -
2013-05-29 17:35:56 +00:00
pierre
87b6bb5053
+ Add .cpXXX pseudo-instruction for PIC code
...
git-svn-id: trunk@21772 -
2012-07-04 16:23:16 +00:00
pierre
93e0dd9c2f
* Patch from Fuxin Zhang: other mips and mipsel CPUs changes
...
git-svn-id: trunk@21538 -
2012-06-07 23:20:06 +00:00
florian
25e82bb1af
* fix stack frame generation on mips(el)
...
git-svn-id: trunk@21121 -
2012-04-29 21:29:06 +00:00
florian
aadeba4d1a
* started to fix stack frame generation on MIPS(EL)
...
git-svn-id: trunk@21118 -
2012-04-29 16:58:19 +00:00
florian
f54365db94
* adapted more fpc-mips stuff to trunk
...
git-svn-id: trunk@14230 -
2009-11-20 21:13:53 +00:00
