pierre
4e4f55ac0e
Comparison nodes are always in LOC_REGISTER, never in LOC_JUMP for riscv32 or riscv64 CPUs
...
git-svn-id: trunk@43614 -
2019-11-29 23:28:05 +00:00
pierre
8ea92a8280
Use correct macro to for 64-bit riscv CPU
...
git-svn-id: trunk@43561 -
2019-11-22 21:29:19 +00:00
florian
b3ed34592f
+ software handling of exceptions on arm
...
* reworked software handling of exceptions so they can be check lazily
git-svn-id: trunk@42525 -
2019-07-28 21:06:36 +00:00
Jeppe Johansen
a1a17447ff
- Fix bug in 64bit softfloat double negation.
...
- Clean up handling of CPU/FPU type handling in RISCV.
- Do more fixes to get RISCV32 working.
- Fix most soft multiplication handling for generic RISCV code. Still missing a few.
- Add RISCV embedded targets.
git-svn-id: trunk@42335 -
2019-07-07 11:32:27 +00:00
pierre
11851d274c
Fix riscv32 compilation error introduced in last commit
...
git-svn-id: trunk@40323 -
2018-11-16 10:24:27 +00:00
pierre
7c92412c74
Avoid overflow error in riscv code generator
...
git-svn-id: trunk@40318 -
2018-11-15 16:57:57 +00:00
Jeppe Johansen
2af0ca8546
Fix bugs caused by swapping of operands in float comparisons.
...
git-svn-id: branches/laksen/riscv_new@39697 -
2018-09-01 19:47:28 +00:00
florian
999cbd94b8
+ support to generate software based floating point exception checking
...
(enabled by -CE)
git-svn-id: branches/laksen/riscv_new@39639 -
2018-08-19 10:56:47 +00:00
Jeppe Johansen
ceb38833f2
Added RiscV32/64 target, from a cleaned up version of branches/laksen/riscv/trunk.
...
git-svn-id: branches/laksen/riscv_new@39474 -
2018-07-20 08:21:15 +00:00
