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0d3ec87492
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26750 Commits

Author SHA1 Message Date
florian
0d3ec87492 * also initalize default helper variables of initialization sections, resolves #40183 2023-03-19 21:19:10 +01:00
Jonas Maebe
0ea0b69a30 LLVM: cleaned up some comments 2023-03-18 23:14:25 +01:00
Jonas Maebe
e41bfa0495 LLVM: LLVM 16 support 
No changes compared to LLVM 15 that affect us
 2023-03-18 23:13:58 +01:00
Jonas Maebe
839849085b LLVM: don't use type names in ctor/dtor arrays 
Workaround for https://github.com/llvm/llvm-project/issues/56809
 2023-03-18 23:13:03 +01:00
Jonas Maebe
0e46041717 WPO: also consider NewInstance to detect class instancing 
Resolves #40200
 2023-03-18 21:18:25 +01:00
florian
64319dc019 * PopCount takes care only of the bit pattern, so take the uvalue to avoid an internal error, resolves #40190 2023-03-17 22:30:36 +01:00
Sven/Sarah Barth
c1ecfc323a * ensure that a procvar (especially a "REFERENCE TO") begins either with FUNCTION or PROCEDURE 
+ added test
 2023-03-15 23:39:59 +01:00
florian
7909f00c83 * project files updated 2023-03-15 23:01:44 +01:00
florian
2b0317f400 * compilation fixed with -Oodfa 2023-03-14 23:10:32 +01:00
florian
30cb20bccd + riscv32-freertos: first version of TlinkerFreeRTOS.GenerateDefaultLinkerScripts 2023-03-14 22:22:01 +01:00
J. Gareth "Curious Kit" Moreton
3f25438d35 * x86: TEST/Jcc/TEST optimisations can now look beyond the next instruction under -O3 2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
d372286159 * x86: RegModifiedByInstruction and RegInInstruction 
are now more accurate for (I)MUL and (I)DIV.
 2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
3635f7cd6f * x86: Fixed oversight in RegModifiedByInstruction not checking W0, W1 and WU-type flags 2023-03-11 22:10:35 +00:00
J. Gareth "Curious Kit" Moreton
b637a3a022 * x86: Fix to MOV/CMP register deallocation positioning 2023-03-11 22:10:35 +00:00
ccrause
f83a8f0f8f Only perform OpCp2Op optimization when the first Op is ANDI and comparison is against 0. 2023-03-09 18:19:20 +02:00
J. Gareth "Curious Kit" Moreton
77f53ebde3 * x86: The LEA/LEA optimisations can now work with a different 
destination register and the intermediate register still in
	 use.
 2023-03-08 21:54:41 +00:00
J. Gareth "Curious Kit" Moreton
931bda5633 * x86: LeaLea2Lea now handles cases where the second LEA instruction 
has a second register in the reference.
 2023-03-08 21:54:41 +00:00
florian
66ff7a928c + added debug messages 2023-03-08 22:54:17 +01:00
florian
99b01f6634 * second mul might get called with a zero operand if the other has a side effect, 
handle this correctly in ti386addnode.second_mul64bit, resolves #40182
 2023-03-06 23:19:34 +01:00
florian
bf8746ed10 * fixed comment 
* shortened code
 2023-03-05 21:24:50 +01:00
florian
ccbdfa9150 + x86: AND/CMP -> CMP optimiziation 2023-03-04 21:20:52 +01:00
J. Gareth "Curious Kit" Moreton
b8933dd267 * x86: Some refactoring to use aoc_ForceNewIteration instead of manually advancing p 2023-03-04 18:40:27 +00:00
J. Gareth "Curious Kit" Moreton
7854152304 * Adjustment to TBLockNode.pass_1 to actually strip nothing nodes 2023-03-03 21:07:31 +00:00
J. Gareth "Curious Kit" Moreton
ecf2ad3e53 x86: Some oversights fixed where another iteration of pass 1 wasn't performed when it should have been 2023-03-03 20:47:24 +00:00
florian
708aaa7b97 * fix (hopefully) build without an ld.bfd variant 2023-03-02 22:56:23 +01:00
florian
40f23030dc * check if a linker with the postfix .bfd exists, if yes, use it, resolves #40175 2023-03-01 23:01:19 +01:00
J. Gareth "Curious Kit" Moreton
c4899b5dc0 * Dead code in TAddNode.Simplify has been stripped 2023-02-28 20:56:38 +00:00
J. Gareth "Curious Kit" Moreton
487ca08cf3 * In TAddNode.Simplify, commutative operations now ensure integer constant operands go on the right for simplicity 2023-02-28 20:56:38 +00:00
Sergey Larin
de58691e75 Allow WideChar const to UTF8String const conversion 2023-02-24 22:59:39 +00:00
J. Gareth "Curious Kit" Moreton
4d33e5f137 * x86: OptPass1_V_MOVAP now uses GetNextInstructionUsingReg and UpdateUsedRegsBetween 2023-02-24 19:39:39 +00:00
J. Gareth "Curious Kit" Moreton
9ee672f9eb * New UpdateUsedRegsBetween utility subroutine 2023-02-24 19:39:39 +00:00
florian
95e5eeb226 * fix compilation with -dEXTDEBUG 2023-02-24 20:39:13 +01:00
J. Gareth "Curious Kit" Moreton
a5702d89e8 * More complex uses of the pruning methods in TAddNode.Simplify 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
9d8fd6d55e * TAddNode.Simplify now uses pruning methods 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
7488f1e3f8 * New node pruning methods 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
2a44ffe51b * x86: BZHI optimisation now sets the subtract and shift nodes to 'do not execute' as they are skipped over. 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
16bd996e74 * x86: 'and not' optimisation now sets the NOT node to 'do not execute' as it is skipped over 2023-02-21 20:44:02 +00:00
J. Gareth "Curious Kit" Moreton
1b43913408 * New 'do not execute' flag for notes and respective internal error triggering 2023-02-21 20:44:02 +00:00
florian
586a7d30ab * patch by ccrause: fixes another .fpc* section problem for AVR, resolves #40162 2023-02-20 22:48:15 +01:00
J. Gareth "Curious Kit" Moreton
dd7320ec13 * x86: PostPeepholeOptCmp and PostPeepholeOptTestOr 
now do a final attempt of TrySwapMovCmp to
	 clean up Pass 2 optimisations
 2023-02-19 20:22:49 +00:00
J. Gareth "Curious Kit" Moreton
4d676cd6fa * x86: JccMovJmpMov2CMovCMov will no longer move 
MOV instructions (fixes i40122)
 2023-02-19 20:22:49 +00:00
florian
8f7e61eef6 * patch by ccrause: do not load .fpc* sections into avr microcontroller to save space, resolves #40160 2023-02-19 20:19:20 +01:00
J. Gareth "Curious Kit" Moreton
4e8ef448ed * i386: Bug fix where EBP was marked as preserved when it wasn't, causing faulty optimisations 2023-02-19 16:49:29 +00:00
florian
a221f2af79 * completed post/pre inc/decrement addressing mode instructions in TAoptBaseCpu.RegModifiedByInstruction 2023-02-18 11:15:39 +01:00
florian
22f1289b2a * post/pre inc/decrement references modify obviously the base register on avr, resolves #40153 2023-02-17 23:02:40 +01:00
florian
ece59f2534 * also count the use of enum syms in preprocessor expressions correctly 2023-02-16 23:02:47 +01:00
florian
811c683775 * set rangedef of dyn. arrays correctly, resolves #40149 2023-02-15 22:14:55 +01:00
Pierre Muller
b49c3fe4f8 Aslo check that live_end is assigned before refering to it 2023-02-13 15:50:04 +01:00
Pierre Muller
c8b2a36bb1 Add support for -Ploongarch64 option 2023-02-13 13:01:21 +00:00
florian
63199a0966 * memory sizes updated 2023-02-12 20:55:38 +01:00