Currently the register spiller can not handle the "bond" between IT* and
a following instruction, sometimes breaking them apart, which breaks the
build or worse the result.
So for now we're not emitting A_IT* in second_cmp64bit anymore but use a
conditional jump instead.
This fixes Mantis #22520
git-svn-id: trunk@22009 -
In r21686 I've introduced optimized 64bit shifts for ARM. But the
methods did not check for which machine it has to generate the code.
This patch disables the optimized code for now if the target is in
cpu_thumb2 and falls back to the generic code.
There are 2 problems with the current code:
1.) Thumb-2 does not support shift by register on all data instruction
as ARM does.
2.) The code does not generate the required IT-block for the conditional
executed code.
git-svn-id: trunk@21997 -
The old code generated a strange IT-sequence:
IT EQ
MOVEQ r0, #1
IT NE
MOVNE r0, #1
Now we generate:
ITE EQ
MOVEQ r0, #1
MOVNE r0, #1
IT stands for IfThen, ITE for IfThenElse it has a couple of other forms
where the instruction gets extended to handle more of the following
instructions. So we have ITEE, ITETE etc, up to 4 instructions can be
handled.
git-svn-id: trunk@21996 -
+ Dedicated constructor TElfObjSection.create_reloc for relocation sections.
+ pass symbol name offset separately to TElfSymtab.writeSymbol, this is necessary for two-pass writing of dynamic symbol tables.
git-svn-id: trunk@21989 -
* check "A op B" and "B op A" again for operators that can be commutative (all binary ones except shl, shr, div, mod, **, / and -)
* also check for Nil for classrefdefs if left side is a pointer (allows "TClass var" <>/= Nil again, after the above changes)
* don't allow overloads for "implicit pointer type <>/= pointer" and the other way around (this fixes non compiling Objective Pascal test tobjc21.pp and also the new toperator87.pp test)
* some formating corrections
+ added test for "TObject <> Pointer"
+ added test for "TClass <>/= Nil"
git-svn-id: trunk@21983 -
The changes are built up in a way that all operators on two given types are not allowed if a default implementation for that operator exists. This implies that there is a possibility to have a overload work for (in this order) type A and B, but not for B and A. This is for example the case for Set + Enum (which seems to have a default implementation) where Enum + Set is allowed. The added tests try to detect as many default implementations as feasible, but can't cover everything...
git-svn-id: trunk@21975 -
hierarchies from other units that were compiled without debug information
in case not all classes from the hierarchy are explicitly used
(mantis #22495, #21503, #21259)
git-svn-id: trunk@21972 -
+ Two stubs (TExeOutput.Load_DynamicObject and TObjInput.CanReadObjData) to override in ELF linker.
+ Stop linking if errors were detected while loading object files.
* Changed TStaticLibrary to TObject. It is never looked up by name, so hashing is redundant; moreover its name has been changed to TCmdStr, which may be trimmed by TFPHashList.
git-svn-id: trunk@21968 -
function result parameter, because reference counted function results
are not guaranteed to be initialized (we sometimes even pass the,
non-finalized, left-hand side of an assignment as hidden function
result parameter)
git-svn-id: trunk@21955 -
r21885 added a new peephole optimizer. The associated code refactoring
missed a check for
tai(hp1).typ = tai_instruction
Which can lead to an access violation later on, because the rest of the
code expects to find a taicpu in hp1.
git-svn-id: trunk@21949 -
(tf_safecall_clearstack is set for it) -> also use pocalls_cdecl for it
and adjust the safecall tests not to try parameter scenarios that are
unsupported for cdecl
git-svn-id: trunk@21948 -
order to minimise memory losses due to alignment padding. Not yet enabled
by default at any optimization level, but can be (de)activated separately
via -Oo(no)orderfields
o added separate tdef.structalignment method that returns the alignment
of a type when it appears in a record/object/class (factors out
AIX-specific double alignment in structs)
o changed the handling of the offset of a delegate interface
implemented via a field, by taking the field offset on demand
rather than at declaration time (because the ordering optimization
causes the offsets of fields to be unknown until the entire
declaration has been parsed)
git-svn-id: trunk@21947 -
after all, although for some reason the problems only showed up with the
external assembler on x86-64 platforms other than Darwin. Now we never use
GOT entries on x86-64 anymore for local symbols, regardless of their nature,
and instead use plain RIP-relative addressing for them.
git-svn-id: trunk@21924 -
the drawback of this is that get_caller_frame and get_caller_addr might not work
anymore because they make the wrong assumption (i.e. not required by the abi)
that ebp contains always a valid (not necessarily the current) frame pointer
git-svn-id: trunk@21918 -
Like MOV these instructions support 2 operands, with the second beeing a
shifterop.
Without this patch the asm reader would fail on something like
cmp r0, r1, lsr 16
with
Error: Unknown identifier "LSR"
git-svn-id: trunk@21911 -
used across multiple levels of inheritance such as on MIPS (and the code
has to be reusable for a_call_ref/reeg in the future anyway)
git-svn-id: trunk@21906 -
defines INTERNAL_BACKTRACE (which assumes get_frame to be internal rather
than a system unit procedure)
* changed fpc_assert() declaration for jvm to be the same as for other
targets, so the same code can be used to call it in ninl now that's
called from the first pass
git-svn-id: trunk@21903 -
ARM can not reference an arbitrary offset so it needs some special
handling if the offset goes beyond abs(4095).
The code for do_spill_read and do_spill written used to be very similar.
I've partially factored out the code into spilling_create_load_store.
The former code loaded the offset from a constant pool, which is a waste
of memory-bandwidth and cache lines. The new code tries to find a way to
adjust the baseregister so the memory location can be reached more
easily, this allows us to handle at least +-1MB with just a single
additional ADD or SUB instruction. If that fails we'll resort to the normal
constant loading code, which on it's own will fallback to loading the
constant from a constant-pool.
So instead of:
ldr r1, =16388
ldr r0, [r13, r1]
which will at least uses 4 cycles (2 Instruction cycles + 2 stall
cycles) on most cores.
We try to generate:
add r1, r13, #16384
ldr r0, [r1, #4]
which most armv5+ cores will execute in 2 cycles. We'll also save on
DCache usage.
git-svn-id: trunk@21889 -
knows that the frame pointer needs to be available (and the code is also
much simpler this way), fixes test/units/system/tassert7 after r21843
git-svn-id: trunk@21869 -
If the needed adjustment is not expressible in a shifterconst, the old code
loaded a temporary register (fixed to r12) via a_load_const_reg and used it
to adjust the SP. Resulting in:
mov r12, #44
orr r12, r12, #4096
sub sp, sp, r12
The new code will try to split the adjustment into 2 shifterconstants and
will do two seperate adjustments:
sub sp, sp, #44
sub sp, sp, #4096
If that doesn't work we'll fall back to the old code. But that should
happen VERY rarely, only for stacks bigger than 256k which are not
expressible in 2 shifter constants.
git-svn-id: trunk@21863 -
result location (NR_FUNCTION_RESULT_REG is not valid on all platforms)
o this requires passing the forced function result type (if any) to this
method
o a generic, basic thlcg.a_call_name() is now available that sets the
function result location; can be called by descendants
* the availability under all circumstances of the correct function return
type enables g_call_system_proc() on the JVM platform to now determine
by itself how many stack slots are removed by the call -> do so, instead
of manually counting them (or forgetting to do so and messing up the
maximum evaluation stack height calculations)
git-svn-id: trunk@21862 -
method by one with a lower visibility, because calling the overriding
method results in a java.lang.AbstractMethodError in that case
git-svn-id: trunk@21839 -
psub.pas: Use new fpc_compiler_has_fixup_jmps conditional.
mips/aasmcpu.pas: MIPS specific fixup_jmps function,
The insttruction distance calculation is not exact as
some pseudo-instruction can be expanded to a variable number of real instructions
real calculation would only be possible if we first
convert pseudo-instuctions to real instructions before calling fixup_jmps.
ncgutil.pas: Revert commit r21791
ncgcon.pas: Revert commit r21786
mips/cgcpu.pas: Partial revert of commit r21798, no need to always use A_J,
as fixup_jmps now handles out of range branches.
git-svn-id: trunk@21822 -
The old code forced dst and src to be the same, which is highly x86
specific and creates bad register utilization on other architectures
like arm.
The new version will use more imaginary registers, allowing the register
allocator to do a better job.
I've merged second_sar and second_rox into a single procedure
second_rox_sar because they were very similar.
git-svn-id: trunk@21809 -
RegInOp did not check for a register beeing part of a shifterop
(op.shifterop^.rs) which could result in trashed registers (But that did
not seem to happen yet anyway).
I've also implemented support for top_regset, but it is currently not
generated outside of proc_entry/proc_exit anyway.
git-svn-id: trunk@21808 -
This removes the duplications in a_op_reg_reg_reg_checkoverflow.
OP_ROL stays seperate because it needs some special treatment again.
The code for OP_ROL was changed, previously it generated:
mov tempreg, #32
sub src1, tempreg, src1
mov dst, src2, ror src1
This would trash src1, which MIGHT be a problem, but i'm not totally
sure. But the mov/sub was replaced with rsb, so the new code looks like
this.
rsb tempreg, src1, #32
mov dst, src2, ror tempreg
If src1 gets freed afterwards the regallocator should be able to change
that into:
rsb src1, src1, #32
mov dst, src2, ror src1
git-svn-id: trunk@21804 -
The previous code was full with duplicated code, this new version just
maps the OP_* to the correct SM_* and does some special handling for
OP_ROL which is done via OP_ROR.
git-svn-id: trunk@21801 -
symtable.pas, searchsym_in_class:
* if we found a helper method that has overload defined we should not forget the symbol as there can be a case that no method with that name is defined in the extended class hierarchy
symtable.pas, searchsym_in_record:
* analogous to the above
+ added test given in the issue
+ added analogous test for record helpers
git-svn-id: trunk@21764 -
pgenutil.pas, specialization_init:
* don't add implementation units of the generic's unit to the symtable stack if we are specializing in a different unit (thus the generic needs to be defined in the interface section) as there is the possibility that the globalsymtable of an implementation unit is not yet defined if the specialization unit is used in the interface section of an implementation unit
git-svn-id: trunk@21763 -
This fixes 64bit shifts on arm with a constant shift value of 0.
The old code would have emitted something like this
mov r0, r0, lsl #32
as 32 is an invalid shift value (and would be wrong anyway) the
assembler declined to assemble the produced source.
The new code will just not emit any code for a shift value of 0.
tests/test/tint642.pp now tests shl/shr 0 on 64 bit values.
tests/webtbs/tw22326.pp is also added as an additional test.
git-svn-id: trunk@21746 -
* Changed type of symbols created by link script from AT_FUNCTION to AT_DATA. This isn't significant for COFF, but matters for ELF targets.
* Changed alignment of .gnu_debuglink section from 0 to 1, this matches behavior of ld.
git-svn-id: trunk@21741 -
with the enum instance corresponding to ordinal 0 in JVM constructors,
because a virtual method called by a parent constructor may already
have assigned a different value (see tests/test/jvm/tenum2.pp). This
will result in null pointer exceptions when using such fields without
first explicitly assigning a value to them though.
The old behaviour can be restored with the new -CTenumfieldinit command
line parameter
git-svn-id: trunk@21736 -
fist(t)pq instructions (mantis #22331)
* also internalerror in case the internal fpu stack position counter
becomes larger than 7, so we don't have to wait for the entire
byte to overflow before we detect a problem
git-svn-id: trunk@21734 -
- PE_FILE_RELOCS_STRIPPED flag is meaningless for object files.
- Don't write PE_FILE_BYTES_REVERSED_LO as well, it is deprecated and GNU tools don't write it either.
- Don't set PE_FILE_32_BIT_MACHINE flag in x86_64 object files.
git-svn-id: trunk@21710 -
* Also simplified COFF symbol loading, separate array of symbol sizes is not needed because these sizes never change during the load.
git-svn-id: trunk@21704 -
getintparaloc + adapted all call sites of getintparaloc. This
led to a number of additional, related changes:
o corrected the type information for some getintparaloc parameters
o don't allocate some intparalocs in cases they aren't used
o changed "const tvardata" parameter into "constref tvardata" for
fpc_variant_copy_overwrite to make pass-by-reference semantics
explicit
o moved a number of routines that now have to call find_system_type()
from cgobj to hlcgobj so that cgobj doesn't have to start depending
on the symtable unit
o added versions of the cpureg alloc/dealloc methods to hlcgobj that
call through to their cgobj counter parts, so we can call save/restore
the cpu registers before/after calling system helpers from hlcgobj
(not implemented in hlcgobj itself, because all basic register
allocator functionality is still part of cgobj/cgcpu)
git-svn-id: trunk@21696 -
