Commit Graph

13979 Commits

Author SHA1 Message Date
sergei
346fbef445 * Factored a common linker script building block into separate method.
git-svn-id: trunk@21730 -
2012-06-28 17:18:02 +00:00
Jonas Maebe
fdbe35aadf * only try to call procvars while choosing overloads in case they don't
require any parameters (mantis #22320)

git-svn-id: trunk@21729 -
2012-06-28 14:41:31 +00:00
sergei
80bbd388f9 * Made removal of unused ExeSymbols a separate procedure, call it earlier and regardless of presence of the 'SYMBOLS' directive in the linker script.
git-svn-id: trunk@21727 -
2012-06-27 20:26:49 +00:00
Jonas Maebe
d472a6d5d0 * changed tregset into tcpuregisterset so it's faster and uses less memory
git-svn-id: trunk@21717 -
2012-06-26 19:01:11 +00:00
florian
3733a000a4 * fix compilation with -dextdebug
git-svn-id: trunk@21716 -
2012-06-26 17:22:09 +00:00
Jonas Maebe
571b3feab1 * fixed internalerror on win64 after r21696 (source register size depends on
the platform, mantis #22316)

git-svn-id: trunk@21715 -
2012-06-26 17:01:34 +00:00
pierre
3a082f8c29 Add defautl mips name and use mips instead of mipseb
git-svn-id: trunk@21711 -
2012-06-26 07:20:12 +00:00
sergei
0c32756ef3 - removed TCoffObjData.afteralloc, calculating MemPos there is useless because every call to afteralloc is immediately followed by call to TObjData.resetsections that resets all MemPos back to zero.
- PE_FILE_RELOCS_STRIPPED flag is meaningless for object files.
- Don't write PE_FILE_BYTES_REVERSED_LO as well, it is deprecated and GNU tools don't write it either.
- Don't set PE_FILE_32_BIT_MACHINE flag in x86_64 object files.

git-svn-id: trunk@21710 -
2012-06-25 23:26:07 +00:00
florian
117c083003 * call inherited Destroy in TAsmOptimizer to avoid memory leak
git-svn-id: trunk@21706 -
2012-06-25 20:19:19 +00:00
florian
6ae2a43161 * fix compilation with extdebug
git-svn-id: trunk@21705 -
2012-06-25 20:01:35 +00:00
sergei
8c8883cc35 * Once TExeOutput is accessible in TObjSection.fixuprelocs, its ImageBase can be used directly, without a need to have a copy in every TObjSection.
* Also simplified COFF symbol loading, separate array of symbol sizes is not needed because these sizes never change during the load.

git-svn-id: trunk@21704 -
2012-06-25 18:39:46 +00:00
pierre
aee68923e8 Fix .pdr generation by adding .end pseudo-instruction, limit .ent to text section for mips cpu
git-svn-id: trunk@21700 -
2012-06-24 21:54:31 +00:00
Jonas Maebe
7c21cba1e2 * migrated g_copyshortstring, g_incrrefcount and g_array_rtti_helper to thlcg
git-svn-id: trunk@21699 -
2012-06-24 21:36:28 +00:00
Jonas Maebe
60aedb19d6 * removed superfluous (de)allocallcpuregisters calls
git-svn-id: trunk@21698 -
2012-06-24 21:36:15 +00:00
Jonas Maebe
7a0ae38700 + also specify the parameter def when allocating a parameter via
getintparaloc + adapted all call sites of getintparaloc. This
    led to a number of additional, related changes:
   o corrected the type information for some getintparaloc parameters
   o don't allocate some intparalocs in cases they aren't used
   o changed "const tvardata" parameter into "constref tvardata" for
     fpc_variant_copy_overwrite to make pass-by-reference semantics
     explicit
   o moved a number of routines that now have to call find_system_type()
     from cgobj to hlcgobj so that cgobj doesn't have to start depending
     on the symtable unit
   o added versions of the cpureg alloc/dealloc methods to hlcgobj that
     call through to their cgobj counter parts, so we can call save/restore
     the cpu registers before/after calling system helpers from hlcgobj
     (not implemented in hlcgobj itself, because all basic register
      allocator functionality is still part of cgobj/cgcpu)

git-svn-id: trunk@21696 -
2012-06-24 15:02:12 +00:00
Jonas Maebe
adf66eed8b * don't turn constref shortstring parameters into openstrings (they can't
be changed just like const parameters, so there's no use for the hidden
    high parameter)

git-svn-id: trunk@21695 -
2012-06-24 15:02:03 +00:00
Jonas Maebe
325c60866f * use tcgpara.def instead of extra size parameters
git-svn-id: trunk@21694 -
2012-06-24 15:01:59 +00:00
Jonas Maebe
c3ea451aea * set tcgpara.vardef when creating parameter info
git-svn-id: trunk@21693 -
2012-06-24 15:01:54 +00:00
Jonas Maebe
2d48396587 - removed redundant checks
git-svn-id: trunk@21692 -
2012-06-24 15:01:48 +00:00
Jonas Maebe
587244c088 * factored out common code from get_funcretloc()
* set tcgpara.def for the function return location (field introduced for and
    already used by the JVM code generator, required for future hlcg
    functionality)

git-svn-id: trunk@21691 -
2012-06-24 15:01:42 +00:00
svenbarth
f9211271d5 Fix for Mantis #22154:
* ptype.pas, read_named_type, array_dec: 
  allow border checks if both range elements are orddefs; for normal arrays
  using e.g. "0..15" this will allow to declare the correct amount of
  elements in the initialization while for generic arrays (e.g. "0..SizeOf(T)") 
  this will mean that only one element can be declared, which was already the 
  case before this change (maybe in such cases a constant initialization should 
  be forbidden in the future...)
+ added test

git-svn-id: trunk@21690 -
2012-06-24 10:43:28 +00:00
svenbarth
cc65ac20c5 Fix for Mantis #22220
ptype.pas:
  * read_named_type:
      allow specializations for pointers in Delphi modes
  * single_type: 
      correctly handle forwarddefs; as we can only specialize generics if
      they are completely defined (srsym<>nil) we don't need to return a 
      forward def, but instead return the specialized def itself
+ added tests to "test" instead of "webtbs" as no explicit tests were given 
  in the report

git-svn-id: trunk@21689 -
2012-06-24 10:35:21 +00:00
svenbarth
8c95ea039f Fix for Mantis #22219
ptype.pas:
  * read_named_type: 
      after reading the type we're pointing to we need to make sure that
      we didn't get a generic dummy symbol; this can happen when parsing
      a pointer declaration as the type in a constant or variable 
      declaration
  * resolve_forward_types:
      when resolving forward types we need to make sure that we weren't
      given a generic dummy to which no non-generic definition was
      given (possible in Delphi mode); for non-Delphi modes we can not
      rely on the generic dummy flag as the typedef of the symbol will
      the generic def
+ added test from the bug reports as well as three additional ones to
  make sure that nothing breaks regarding to forward pointer 
  declarations
      

git-svn-id: trunk@21687 -
2012-06-24 10:08:17 +00:00
masta
ca70207bc0 Support 64-bit shifts on ARM.
This code generate different versions of assembly depending on the
amount to shift.

Variable Amount: 6 cycles (5 if last shift can be folded)
Constant 1     : 2 cycles
Constant 2-31  : 3 cycles (2 if last shift can foldable)
Constant 32    : 1 cycle  (depends on the register allocator)
Constant 33-64 : 2 cycles

This should speed up softfpu on arm a bit.

git-svn-id: trunk@21686 -
2012-06-23 20:36:27 +00:00
masta
3566956389 Fix ARM-Assembler output for RRX-Shifterops
RRX (Rotate Right with eXtend) does a single bit right rotation through
the carry. So it does not take any arguments, neither constant nor
register.

Also remove redundant shiftmode2str and replace usage of it with gas_shiftmode2str.

git-svn-id: trunk@21685 -
2012-06-23 20:36:16 +00:00
sergei
5be97c7c9e - Removed TDJCoffObjSection,TPECoffObjSection,TCoffExeSection,TPECoffExeSection,TDJCoffExeSection. These only add complication and no value.
git-svn-id: trunk@21684 -
2012-06-23 14:59:45 +00:00
masta
59c726c829 Support ABS intrinsic on ARM
This code will generate the following sequence on arm:
r1=dst
r0=src

movs r1, r0
rsbmi r1, r0, #0

movs will set the N-flag when the MSB of r0 is set, if it is set, rsb
will calculate dst:=0-src;

git-svn-id: trunk@21678 -
2012-06-21 20:12:36 +00:00
masta
aeb15ba2b6 Fixed postfix check in taicpu.is_same_reg_move
The old version did not check the S-Postfix for MOV, which results in
removing instructions like:

movs r0, r0

which breaks later flag usage.

git-svn-id: trunk@21676 -
2012-06-21 20:12:25 +00:00
Jonas Maebe
512351043c * properly handle loading a value from a larger to a smaller subsetreg
if the source value comes from a bit position > sizeof(smaller subsetreg)
    (fixes internalerror 68991 when compiling fpcompactimg.inc for ppc64)

git-svn-id: trunk@21675 -
2012-06-21 17:05:38 +00:00
pierre
74eb121d1c Fix big endian issues
git-svn-id: trunk@21672 -
2012-06-21 11:52:57 +00:00
pierre
aa8747f5c9 Add more information to TMipsProcInfo class
git-svn-id: trunk@21671 -
2012-06-21 11:52:08 +00:00
pierre
f9930e3f46 Use ldc1 and sdc1 for big endian mips CPU directly
git-svn-id: trunk@21670 -
2012-06-21 11:51:07 +00:00
pierre
d2dc860b1b Use 4 for mips(eb/el) recordalignmax field
git-svn-id: trunk@21669 -
2012-06-21 11:49:49 +00:00
pierre
0c97a49a0e * Change back mipseb-linux to mips-linux
git-svn-id: trunk@21667 -
2012-06-21 07:59:27 +00:00
pierre
15252b546d * Restore 'mips' name as cpumipseb source_cpu_string
git-svn-id: trunk@21666 -
2012-06-20 23:51:36 +00:00
pierre
23a3275291 * Define both mipseb and mips for non endian-little MIPS compiler
git-svn-id: trunk@21663 -
2012-06-20 16:11:00 +00:00
sergei
bd7ebdce18 * ELF relocation cleanup/improvement:
+ Store size of relocation and explicit addend in TObjRelocation (reusing 'orgsize' field for the latter). This removes need for reading addends back from section data, addends are stored in full 64 bits and therefore not truncated.
  + Relocation style is now controlled by relocs_use_addend variable instead of $ifdef's.
  - Removed (never working) checks forbidding relocations of readonly sections. At the linking stage readonly sections *can* have relocations, executable stage is different matter to be handled elsewhere.
  - removed ugly hack with mapping 32-bit absolute relocations to RELOC_RVA.
  + support 64-bit relative relocations.
  * actualized list of x86_64 relocations.

git-svn-id: trunk@21662 -
2012-06-20 14:16:48 +00:00
sergei
98fffb7981 * Overloaded MemPos_ExeSection and DataPos_ExeSection accepting a TExeSection instead of name.
git-svn-id: trunk@21661 -
2012-06-20 13:33:18 +00:00
masta
2768e0fc12 Folded Add/Sub/Or Splitter, lots of debug output
git-svn-id: trunk@21660 -
2012-06-20 12:39:28 +00:00
masta
5498456269 Add LsrAndLsr Peephole Optimizer for ARM
Remove the superfluous and in:
mov r0, r0, lsr #24
and r0, r0, #255

Doing this allows for better shift-folding later

git-svn-id: trunk@21659 -
2012-06-20 12:39:19 +00:00
masta
92c47148cc Optimize 8/16 OP_NOT on ARM
This now generates:

mvn r0, r0, lsl #24/#16
mov r0, r0, lsr/asr #24/#16

The lsr/asr might be folded into a following instruction, making the
whole operation 1 cycle instead of 2-3 with the previous solution.

git-svn-id: trunk@21658 -
2012-06-20 12:39:09 +00:00
svenbarth
f90e686be2 Always try to present file/line information for generics even if no source is available or the unit was compiled as release unit. This allows IDE like Lazarus to correctly navigate to an error or warning even if the unit containing the generic was compiled as a release unit.
* pscanner.pas, tscannerfile.replaytoken: remove the checks for "sources_avail" and always update the read file/line information 
* fppu.pas, tppumodule.readsourcefiles: always load at least the filenames which were used when compiling the unit from the ppu file, so that file/line information will be correctly shown, but don't touch the "sources_avail" flag of the tppumodule

git-svn-id: trunk@21657 -
2012-06-20 09:01:28 +00:00
svenbarth
75bf094e3f Fix for Mantis #21064.
* pgenutil.pas: factor out the reading of generic specialization parameters (parse_generic_specialization_types) and the generation of a generic type name (generate_generic_name)
* pdecsub.pas, parse_proc_head:
    * also allow an interface alias declaration if an identifier is followed by a "<" (which starts a specialization)
    + add a procedure "consume_generic_interface" which parses such a specialization (by using "parse_generic_specialization_types") - this is needed, because "consume_generic_type_parameter" can (and should not!) handle "ISomeIntf<Integer, T>" or (somewhen in the future) "ISomeIntf<TSomeOtherGeneric<T>>" - and finds the correct symbol for the interface (by utilizing the "generate_generic_name" function)
    * generate the correct mapping entry (for the generic it's only needed for checking (if any), but for a specialization it's essential that we reference the correct specialization)

+ add tests which were included with the issue and also two additional ones

Note: In non-Delphi modes an interface alias can be done like in Delphi mode; "specialization" is not necessary and furthermore not even allowed!

git-svn-id: trunk@21656 -
2012-06-20 08:35:57 +00:00
svenbarth
e0b41141d2 "SizeInt" inside the compiler references the "size of an int" on the Host platform. What we want for writing size information in PPUs for Generics is "ASizeInt" which is the "size of an int" of the target platform. This fixes Mantis #20947.
* pscanner.pas: change SizeInt to ASizeInt for tokenreadsizeint and tokenwritesizeint and change necessary other locations for record- and replaytokenbuffers
+ Added a test in the hope that some test-platforms do cross platform (e.g. win32 => win64) compilation.

git-svn-id: trunk@21651 -
2012-06-19 08:47:30 +00:00
sergei
a2f0e54dc6 * Fixed internal linker entering infinite loop if script contains empty lines or comments.
git-svn-id: trunk@21650 -
2012-06-18 17:03:35 +00:00
masta
0f3441a9c2 Split OP_ADD, OP_SUB, OP_AND and OP_ORR into multiple instructions if that can avoid constant construction or even loading from a pool.
OP_ADD, OP_SUB, OP_ORR will be split into two intructions if possible when a load/const
construction is required.

OP_AND is a bit different, because we can't just split it up, but we try
to find a two instruction BIC-equivalent to it.

Till now code like

a:= a and $FFFF;

produced code like

mov r0, $FF00
orr r0, r0, $FF
and r1, r1, r0

With this addition we produce code like:

bic r0, r0, $FF00
bic r0, r0, $FF

Saving us at least a cycle and in some cases also a load from the
constant-pool.

This uses the new split_into_shifter_const function.

git-svn-id: trunk@21647 -
2012-06-18 16:59:29 +00:00
masta
f11fbe527e Improve loading of ARM constant values
*  use split_into_shifter_const to reduce the MOV/ORR combination to a
   single check and allow a broader rang of combinations.
*  Introduce MVN/BIC combination to load values which have more 1 than 0
   bits set (like small negative values)

git-svn-id: trunk@21646 -
2012-06-18 16:59:24 +00:00
masta
d987cee96a Introduce split_into_shifter_const to ARM-Code Generator
This functions tries to split up a 32-bit value into two shifter
constants. This approach finds a broader range for two shifter constant
combinations.

git-svn-id: trunk@21645 -
2012-06-18 16:59:19 +00:00
masta
3205169ab9 Use roldword intrinsic instead of function rotl.
These days we don't need the hand coded rol anymore.

git-svn-id: trunk@21644 -
2012-06-18 16:59:13 +00:00
sergei
7cda919547 * Pass ExeOutput as argument to TObjSection.fixuprelocs, needed for ELF targets to relocate the complex GOT stuff.
* TExeSection.AddObjSection made virtual.
- TExeSymbol.ExeSection is nowhere used, removed.

git-svn-id: trunk@21626 -
2012-06-16 22:33:26 +00:00